b39bc4636632706e959f497de8aba3df02f97fb8
[mesa.git] / src / mesa / drivers / dri / intel / intel_screen.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include <errno.h>
29 #include <time.h>
30 #include "main/glheader.h"
31 #include "main/context.h"
32 #include "main/framebuffer.h"
33 #include "main/renderbuffer.h"
34 #include "main/hash.h"
35 #include "main/fbobject.h"
36 #include "main/mfeatures.h"
37 #include "main/version.h"
38 #include "swrast/s_renderbuffer.h"
39
40 #include "utils.h"
41 #include "xmlpool.h"
42
43 PUBLIC const char __driConfigOptions[] =
44 DRI_CONF_BEGIN
45 DRI_CONF_SECTION_PERFORMANCE
46 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC)
47 /* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
48 * DRI_CONF_BO_REUSE_ALL
49 */
50 DRI_CONF_OPT_BEGIN_V(bo_reuse, enum, 1, "0:1")
51 DRI_CONF_DESC_BEGIN(en, "Buffer object reuse")
52 DRI_CONF_ENUM(0, "Disable buffer object reuse")
53 DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")
54 DRI_CONF_DESC_END
55 DRI_CONF_OPT_END
56
57 DRI_CONF_OPT_BEGIN(texture_tiling, bool, true)
58 DRI_CONF_DESC(en, "Enable texture tiling")
59 DRI_CONF_OPT_END
60
61 DRI_CONF_OPT_BEGIN(hiz, bool, true)
62 DRI_CONF_DESC(en, "Enable Hierarchical Z on gen6+")
63 DRI_CONF_OPT_END
64
65 DRI_CONF_OPT_BEGIN(early_z, bool, false)
66 DRI_CONF_DESC(en, "Enable early Z in classic mode (unstable, 945-only).")
67 DRI_CONF_OPT_END
68
69 DRI_CONF_OPT_BEGIN(fragment_shader, bool, true)
70 DRI_CONF_DESC(en, "Enable limited ARB_fragment_shader support on 915/945.")
71 DRI_CONF_OPT_END
72
73 DRI_CONF_SECTION_END
74 DRI_CONF_SECTION_QUALITY
75 DRI_CONF_FORCE_S3TC_ENABLE(false)
76 DRI_CONF_ALLOW_LARGE_TEXTURES(2)
77 DRI_CONF_SECTION_END
78 DRI_CONF_SECTION_DEBUG
79 DRI_CONF_NO_RAST(false)
80 DRI_CONF_ALWAYS_FLUSH_BATCH(false)
81 DRI_CONF_ALWAYS_FLUSH_CACHE(false)
82 DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN(false)
83 DRI_CONF_DISABLE_GLSL_LINE_CONTINUATIONS(false)
84 DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED(false)
85
86 DRI_CONF_OPT_BEGIN(stub_occlusion_query, bool, false)
87 DRI_CONF_DESC(en, "Enable stub ARB_occlusion_query support on 915/945.")
88 DRI_CONF_OPT_END
89
90 DRI_CONF_OPT_BEGIN(shader_precompile, bool, true)
91 DRI_CONF_DESC(en, "Perform code generation at shader link time.")
92 DRI_CONF_OPT_END
93 DRI_CONF_SECTION_END
94 DRI_CONF_END;
95
96 const GLuint __driNConfigOptions = 16;
97
98 #include "intel_batchbuffer.h"
99 #include "intel_buffers.h"
100 #include "intel_bufmgr.h"
101 #include "intel_chipset.h"
102 #include "intel_fbo.h"
103 #include "intel_mipmap_tree.h"
104 #include "intel_screen.h"
105 #include "intel_tex.h"
106 #include "intel_regions.h"
107
108 #include "i915_drm.h"
109
110 #ifdef USE_NEW_INTERFACE
111 static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
112 #endif /*USE_NEW_INTERFACE */
113
114 /**
115 * For debugging purposes, this returns a time in seconds.
116 */
117 double
118 get_time(void)
119 {
120 struct timespec tp;
121
122 clock_gettime(CLOCK_MONOTONIC, &tp);
123
124 return tp.tv_sec + tp.tv_nsec / 1000000000.0;
125 }
126
127 void
128 aub_dump_bmp(struct gl_context *ctx)
129 {
130 struct gl_framebuffer *fb = ctx->DrawBuffer;
131
132 for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
133 struct intel_renderbuffer *irb =
134 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
135
136 if (irb && irb->mt) {
137 enum aub_dump_bmp_format format;
138
139 switch (irb->Base.Base.Format) {
140 case MESA_FORMAT_ARGB8888:
141 case MESA_FORMAT_XRGB8888:
142 format = AUB_DUMP_BMP_FORMAT_ARGB_8888;
143 break;
144 default:
145 continue;
146 }
147
148 assert(irb->mt->region->pitch % irb->mt->region->cpp == 0);
149 drm_intel_gem_bo_aub_dump_bmp(irb->mt->region->bo,
150 irb->draw_x,
151 irb->draw_y,
152 irb->Base.Base.Width,
153 irb->Base.Base.Height,
154 format,
155 irb->mt->region->pitch,
156 0);
157 }
158 }
159 }
160
161 static const __DRItexBufferExtension intelTexBufferExtension = {
162 .base = { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
163
164 .setTexBuffer = intelSetTexBuffer,
165 .setTexBuffer2 = intelSetTexBuffer2,
166 .releaseTexBuffer = NULL,
167 };
168
169 static void
170 intelDRI2Flush(__DRIdrawable *drawable)
171 {
172 GET_CURRENT_CONTEXT(ctx);
173 struct intel_context *intel = intel_context(ctx);
174 if (intel == NULL)
175 return;
176
177 if (intel->gen < 4)
178 INTEL_FIREVERTICES(intel);
179
180 intel_downsample_for_dri2_flush(intel, drawable);
181 intel->need_throttle = true;
182
183 if (intel->batch.used)
184 intel_batchbuffer_flush(intel);
185
186 if (INTEL_DEBUG & DEBUG_AUB) {
187 aub_dump_bmp(ctx);
188 }
189 }
190
191 static const struct __DRI2flushExtensionRec intelFlushExtension = {
192 .base = { __DRI2_FLUSH, 3 },
193
194 .flush = intelDRI2Flush,
195 .invalidate = dri2InvalidateDrawable,
196 };
197
198 static struct intel_image_format intel_image_formats[] = {
199 { __DRI_IMAGE_FOURCC_ARGB8888, __DRI_IMAGE_COMPONENTS_RGBA, 1,
200 { { 0, 0, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } },
201
202 { __DRI_IMAGE_FOURCC_XRGB8888, __DRI_IMAGE_COMPONENTS_RGB, 1,
203 { { 0, 0, 0, __DRI_IMAGE_FORMAT_XRGB8888, 4 }, } },
204
205 { __DRI_IMAGE_FOURCC_YUV410, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
206 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
207 { 1, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 },
208 { 2, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 } } },
209
210 { __DRI_IMAGE_FOURCC_YUV411, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
211 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
212 { 1, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 },
213 { 2, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
214
215 { __DRI_IMAGE_FOURCC_YUV420, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
216 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
217 { 1, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 },
218 { 2, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 } } },
219
220 { __DRI_IMAGE_FOURCC_YUV422, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
221 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
222 { 1, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 },
223 { 2, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
224
225 { __DRI_IMAGE_FOURCC_YUV444, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
226 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
227 { 1, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
228 { 2, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
229
230 { __DRI_IMAGE_FOURCC_NV12, __DRI_IMAGE_COMPONENTS_Y_UV, 2,
231 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
232 { 1, 1, 1, __DRI_IMAGE_FORMAT_GR88, 2 } } },
233
234 { __DRI_IMAGE_FOURCC_NV16, __DRI_IMAGE_COMPONENTS_Y_UV, 2,
235 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
236 { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88, 2 } } },
237
238 /* For YUYV buffers, we set up two overlapping DRI images and treat
239 * them as planar buffers in the compositors. Plane 0 is GR88 and
240 * samples YU or YV pairs and places Y into the R component, while
241 * plane 1 is ARGB and samples YUYV clusters and places pairs and
242 * places U into the G component and V into A. This lets the
243 * texture sampler interpolate the Y components correctly when
244 * sampling from plane 0, and interpolate U and V correctly when
245 * sampling from plane 1. */
246 { __DRI_IMAGE_FOURCC_YUYV, __DRI_IMAGE_COMPONENTS_Y_XUXV, 2,
247 { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88, 2 },
248 { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } }
249 };
250
251 static __DRIimage *
252 intel_allocate_image(int dri_format, void *loaderPrivate)
253 {
254 __DRIimage *image;
255
256 image = calloc(1, sizeof *image);
257 if (image == NULL)
258 return NULL;
259
260 image->dri_format = dri_format;
261 image->offset = 0;
262
263 switch (dri_format) {
264 case __DRI_IMAGE_FORMAT_RGB565:
265 image->format = MESA_FORMAT_RGB565;
266 break;
267 case __DRI_IMAGE_FORMAT_XRGB8888:
268 image->format = MESA_FORMAT_XRGB8888;
269 break;
270 case __DRI_IMAGE_FORMAT_ARGB8888:
271 image->format = MESA_FORMAT_ARGB8888;
272 break;
273 case __DRI_IMAGE_FORMAT_ABGR8888:
274 image->format = MESA_FORMAT_RGBA8888_REV;
275 break;
276 case __DRI_IMAGE_FORMAT_XBGR8888:
277 image->format = MESA_FORMAT_RGBX8888_REV;
278 break;
279 case __DRI_IMAGE_FORMAT_R8:
280 image->format = MESA_FORMAT_R8;
281 break;
282 case __DRI_IMAGE_FORMAT_GR88:
283 image->format = MESA_FORMAT_GR88;
284 break;
285 case __DRI_IMAGE_FORMAT_NONE:
286 image->format = MESA_FORMAT_NONE;
287 break;
288 default:
289 free(image);
290 return NULL;
291 }
292
293 image->internal_format = _mesa_get_format_base_format(image->format);
294 image->data = loaderPrivate;
295
296 return image;
297 }
298
299 static __DRIimage *
300 intel_create_image_from_name(__DRIscreen *screen,
301 int width, int height, int format,
302 int name, int pitch, void *loaderPrivate)
303 {
304 struct intel_screen *intelScreen = screen->driverPrivate;
305 __DRIimage *image;
306 int cpp;
307
308 image = intel_allocate_image(format, loaderPrivate);
309 if (image->format == MESA_FORMAT_NONE)
310 cpp = 1;
311 else
312 cpp = _mesa_get_format_bytes(image->format);
313 image->region = intel_region_alloc_for_handle(intelScreen,
314 cpp, width, height,
315 pitch, name, "image");
316 if (image->region == NULL) {
317 free(image);
318 return NULL;
319 }
320
321 return image;
322 }
323
324 static __DRIimage *
325 intel_create_image_from_renderbuffer(__DRIcontext *context,
326 int renderbuffer, void *loaderPrivate)
327 {
328 __DRIimage *image;
329 struct intel_context *intel = context->driverPrivate;
330 struct gl_renderbuffer *rb;
331 struct intel_renderbuffer *irb;
332
333 rb = _mesa_lookup_renderbuffer(&intel->ctx, renderbuffer);
334 if (!rb) {
335 _mesa_error(&intel->ctx,
336 GL_INVALID_OPERATION, "glRenderbufferExternalMESA");
337 return NULL;
338 }
339
340 irb = intel_renderbuffer(rb);
341 image = calloc(1, sizeof *image);
342 if (image == NULL)
343 return NULL;
344
345 image->internal_format = rb->InternalFormat;
346 image->format = rb->Format;
347 image->offset = 0;
348 image->data = loaderPrivate;
349 intel_region_reference(&image->region, irb->mt->region);
350
351 switch (image->format) {
352 case MESA_FORMAT_RGB565:
353 image->dri_format = __DRI_IMAGE_FORMAT_RGB565;
354 break;
355 case MESA_FORMAT_XRGB8888:
356 image->dri_format = __DRI_IMAGE_FORMAT_XRGB8888;
357 break;
358 case MESA_FORMAT_ARGB8888:
359 image->dri_format = __DRI_IMAGE_FORMAT_ARGB8888;
360 break;
361 case MESA_FORMAT_RGBA8888_REV:
362 image->dri_format = __DRI_IMAGE_FORMAT_ABGR8888;
363 break;
364 case MESA_FORMAT_R8:
365 image->dri_format = __DRI_IMAGE_FORMAT_R8;
366 break;
367 case MESA_FORMAT_RG88:
368 image->dri_format = __DRI_IMAGE_FORMAT_GR88;
369 break;
370 }
371
372 return image;
373 }
374
375 static void
376 intel_destroy_image(__DRIimage *image)
377 {
378 intel_region_release(&image->region);
379 free(image);
380 }
381
382 static __DRIimage *
383 intel_create_image(__DRIscreen *screen,
384 int width, int height, int format,
385 unsigned int use,
386 void *loaderPrivate)
387 {
388 __DRIimage *image;
389 struct intel_screen *intelScreen = screen->driverPrivate;
390 uint32_t tiling;
391 int cpp;
392
393 tiling = I915_TILING_X;
394 if (use & __DRI_IMAGE_USE_CURSOR) {
395 if (width != 64 || height != 64)
396 return NULL;
397 tiling = I915_TILING_NONE;
398 }
399
400 image = intel_allocate_image(format, loaderPrivate);
401 cpp = _mesa_get_format_bytes(image->format);
402 image->region =
403 intel_region_alloc(intelScreen, tiling, cpp, width, height, true);
404 if (image->region == NULL) {
405 free(image);
406 return NULL;
407 }
408
409 return image;
410 }
411
412 static GLboolean
413 intel_query_image(__DRIimage *image, int attrib, int *value)
414 {
415 switch (attrib) {
416 case __DRI_IMAGE_ATTRIB_STRIDE:
417 *value = image->region->pitch;
418 return true;
419 case __DRI_IMAGE_ATTRIB_HANDLE:
420 *value = image->region->bo->handle;
421 return true;
422 case __DRI_IMAGE_ATTRIB_NAME:
423 return intel_region_flink(image->region, (uint32_t *) value);
424 case __DRI_IMAGE_ATTRIB_FORMAT:
425 *value = image->dri_format;
426 return true;
427 case __DRI_IMAGE_ATTRIB_WIDTH:
428 *value = image->region->width;
429 return true;
430 case __DRI_IMAGE_ATTRIB_HEIGHT:
431 *value = image->region->height;
432 return true;
433 case __DRI_IMAGE_ATTRIB_COMPONENTS:
434 if (image->planar_format == NULL)
435 return false;
436 *value = image->planar_format->components;
437 return true;
438 default:
439 return false;
440 }
441 }
442
443 static __DRIimage *
444 intel_dup_image(__DRIimage *orig_image, void *loaderPrivate)
445 {
446 __DRIimage *image;
447
448 image = calloc(1, sizeof *image);
449 if (image == NULL)
450 return NULL;
451
452 intel_region_reference(&image->region, orig_image->region);
453 if (image->region == NULL) {
454 free(image);
455 return NULL;
456 }
457
458 image->internal_format = orig_image->internal_format;
459 image->planar_format = orig_image->planar_format;
460 image->dri_format = orig_image->dri_format;
461 image->format = orig_image->format;
462 image->offset = orig_image->offset;
463 image->data = loaderPrivate;
464
465 memcpy(image->strides, orig_image->strides, sizeof(image->strides));
466 memcpy(image->offsets, orig_image->offsets, sizeof(image->offsets));
467
468 return image;
469 }
470
471 static GLboolean
472 intel_validate_usage(__DRIimage *image, unsigned int use)
473 {
474 if (use & __DRI_IMAGE_USE_CURSOR) {
475 if (image->region->width != 64 || image->region->height != 64)
476 return GL_FALSE;
477 }
478
479 return GL_TRUE;
480 }
481
482 static __DRIimage *
483 intel_create_image_from_names(__DRIscreen *screen,
484 int width, int height, int fourcc,
485 int *names, int num_names,
486 int *strides, int *offsets,
487 void *loaderPrivate)
488 {
489 struct intel_image_format *f = NULL;
490 __DRIimage *image;
491 int i, index;
492
493 if (screen == NULL || names == NULL || num_names != 1)
494 return NULL;
495
496 for (i = 0; i < ARRAY_SIZE(intel_image_formats); i++) {
497 if (intel_image_formats[i].fourcc == fourcc) {
498 f = &intel_image_formats[i];
499 }
500 }
501
502 if (f == NULL)
503 return NULL;
504
505 image = intel_create_image_from_name(screen, width, height,
506 __DRI_IMAGE_FORMAT_NONE,
507 names[0], strides[0],
508 loaderPrivate);
509
510 if (image == NULL)
511 return NULL;
512
513 image->planar_format = f;
514 for (i = 0; i < f->nplanes; i++) {
515 index = f->planes[i].buffer_index;
516 image->offsets[index] = offsets[index];
517 image->strides[index] = strides[index];
518 }
519
520 return image;
521 }
522
523 static __DRIimage *
524 intel_from_planar(__DRIimage *parent, int plane, void *loaderPrivate)
525 {
526 int width, height, offset, stride, dri_format, index;
527 struct intel_image_format *f;
528 uint32_t mask_x, mask_y;
529 __DRIimage *image;
530
531 if (parent == NULL || parent->planar_format == NULL)
532 return NULL;
533
534 f = parent->planar_format;
535
536 if (plane >= f->nplanes)
537 return NULL;
538
539 width = parent->region->width >> f->planes[plane].width_shift;
540 height = parent->region->height >> f->planes[plane].height_shift;
541 dri_format = f->planes[plane].dri_format;
542 index = f->planes[plane].buffer_index;
543 offset = parent->offsets[index];
544 stride = parent->strides[index];
545
546 image = intel_allocate_image(dri_format, loaderPrivate);
547 if (offset + height * stride > parent->region->bo->size) {
548 _mesa_warning(NULL, "intel_create_sub_image: subimage out of bounds");
549 free(image);
550 return NULL;
551 }
552
553 image->region = calloc(sizeof(*image->region), 1);
554 if (image->region == NULL) {
555 free(image);
556 return NULL;
557 }
558
559 image->region->cpp = _mesa_get_format_bytes(image->format);
560 image->region->width = width;
561 image->region->height = height;
562 image->region->pitch = stride;
563 image->region->refcount = 1;
564 image->region->bo = parent->region->bo;
565 drm_intel_bo_reference(image->region->bo);
566 image->region->tiling = parent->region->tiling;
567 image->region->screen = parent->region->screen;
568 image->offset = offset;
569
570 intel_region_get_tile_masks(image->region, &mask_x, &mask_y, false);
571 if (offset & mask_x)
572 _mesa_warning(NULL,
573 "intel_create_sub_image: offset not on tile boundary");
574
575 return image;
576 }
577
578 static struct __DRIimageExtensionRec intelImageExtension = {
579 .base = { __DRI_IMAGE, 5 },
580
581 .createImageFromName = intel_create_image_from_name,
582 .createImageFromRenderbuffer = intel_create_image_from_renderbuffer,
583 .destroyImage = intel_destroy_image,
584 .createImage = intel_create_image,
585 .queryImage = intel_query_image,
586 .dupImage = intel_dup_image,
587 .validateUsage = intel_validate_usage,
588 .createImageFromNames = intel_create_image_from_names,
589 .fromPlanar = intel_from_planar
590 };
591
592 static const __DRIextension *intelScreenExtensions[] = {
593 &intelTexBufferExtension.base,
594 &intelFlushExtension.base,
595 &intelImageExtension.base,
596 &dri2ConfigQueryExtension.base,
597 NULL
598 };
599
600 static bool
601 intel_get_param(__DRIscreen *psp, int param, int *value)
602 {
603 int ret;
604 struct drm_i915_getparam gp;
605
606 memset(&gp, 0, sizeof(gp));
607 gp.param = param;
608 gp.value = value;
609
610 ret = drmCommandWriteRead(psp->fd, DRM_I915_GETPARAM, &gp, sizeof(gp));
611 if (ret) {
612 if (ret != -EINVAL)
613 _mesa_warning(NULL, "drm_i915_getparam: %d", ret);
614 return false;
615 }
616
617 return true;
618 }
619
620 static bool
621 intel_get_boolean(__DRIscreen *psp, int param)
622 {
623 int value = 0;
624 return intel_get_param(psp, param, &value) && value;
625 }
626
627 static void
628 nop_callback(GLuint key, void *data, void *userData)
629 {
630 }
631
632 static void
633 intelDestroyScreen(__DRIscreen * sPriv)
634 {
635 struct intel_screen *intelScreen = sPriv->driverPrivate;
636
637 dri_bufmgr_destroy(intelScreen->bufmgr);
638 driDestroyOptionInfo(&intelScreen->optionCache);
639
640 /* Some regions may still have references to them at this point, so
641 * flush the hash table to prevent _mesa_DeleteHashTable() from
642 * complaining about the hash not being empty; */
643 _mesa_HashDeleteAll(intelScreen->named_regions, nop_callback, NULL);
644 _mesa_DeleteHashTable(intelScreen->named_regions);
645
646 free(intelScreen);
647 sPriv->driverPrivate = NULL;
648 }
649
650
651 /**
652 * This is called when we need to set up GL rendering to a new X window.
653 */
654 static GLboolean
655 intelCreateBuffer(__DRIscreen * driScrnPriv,
656 __DRIdrawable * driDrawPriv,
657 const struct gl_config * mesaVis, GLboolean isPixmap)
658 {
659 struct intel_renderbuffer *rb;
660 struct intel_screen *screen = (struct intel_screen*) driScrnPriv->driverPrivate;
661 gl_format rgbFormat;
662 unsigned num_samples = intel_quantize_num_samples(screen, mesaVis->samples);
663 struct gl_framebuffer *fb;
664
665 if (isPixmap)
666 return false;
667
668 fb = CALLOC_STRUCT(gl_framebuffer);
669 if (!fb)
670 return false;
671
672 _mesa_initialize_window_framebuffer(fb, mesaVis);
673
674 if (mesaVis->redBits == 5)
675 rgbFormat = MESA_FORMAT_RGB565;
676 else if (mesaVis->sRGBCapable)
677 rgbFormat = MESA_FORMAT_SARGB8;
678 else if (mesaVis->alphaBits == 0)
679 rgbFormat = MESA_FORMAT_XRGB8888;
680 else
681 rgbFormat = MESA_FORMAT_ARGB8888;
682
683 /* setup the hardware-based renderbuffers */
684 rb = intel_create_renderbuffer(rgbFormat, num_samples);
685 _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &rb->Base.Base);
686
687 if (mesaVis->doubleBufferMode) {
688 rb = intel_create_renderbuffer(rgbFormat, num_samples);
689 _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &rb->Base.Base);
690 }
691
692 /*
693 * Assert here that the gl_config has an expected depth/stencil bit
694 * combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(),
695 * which constructs the advertised configs.)
696 */
697 if (mesaVis->depthBits == 24) {
698 assert(mesaVis->stencilBits == 8);
699
700 if (screen->hw_has_separate_stencil) {
701 rb = intel_create_private_renderbuffer(MESA_FORMAT_X8_Z24,
702 num_samples);
703 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
704 rb = intel_create_private_renderbuffer(MESA_FORMAT_S8,
705 num_samples);
706 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
707 } else {
708 /*
709 * Use combined depth/stencil. Note that the renderbuffer is
710 * attached to two attachment points.
711 */
712 rb = intel_create_private_renderbuffer(MESA_FORMAT_S8_Z24,
713 num_samples);
714 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
715 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
716 }
717 }
718 else if (mesaVis->depthBits == 16) {
719 assert(mesaVis->stencilBits == 0);
720 rb = intel_create_private_renderbuffer(MESA_FORMAT_Z16,
721 num_samples);
722 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
723 }
724 else {
725 assert(mesaVis->depthBits == 0);
726 assert(mesaVis->stencilBits == 0);
727 }
728
729 /* now add any/all software-based renderbuffers we may need */
730 _swrast_add_soft_renderbuffers(fb,
731 false, /* never sw color */
732 false, /* never sw depth */
733 false, /* never sw stencil */
734 mesaVis->accumRedBits > 0,
735 false, /* never sw alpha */
736 false /* never sw aux */ );
737 driDrawPriv->driverPrivate = fb;
738
739 return true;
740 }
741
742 static void
743 intelDestroyBuffer(__DRIdrawable * driDrawPriv)
744 {
745 struct gl_framebuffer *fb = driDrawPriv->driverPrivate;
746
747 _mesa_reference_framebuffer(&fb, NULL);
748 }
749
750 /* There are probably better ways to do this, such as an
751 * init-designated function to register chipids and createcontext
752 * functions.
753 */
754 extern bool
755 i830CreateContext(int api,
756 const struct gl_config *mesaVis,
757 __DRIcontext *driContextPriv,
758 unsigned major_version,
759 unsigned minor_version,
760 unsigned *error,
761 void *sharedContextPrivate);
762
763 extern bool
764 i915CreateContext(int api,
765 const struct gl_config *mesaVis,
766 __DRIcontext *driContextPriv,
767 unsigned major_version,
768 unsigned minor_version,
769 unsigned *error,
770 void *sharedContextPrivate);
771 extern bool
772 brwCreateContext(int api,
773 const struct gl_config *mesaVis,
774 __DRIcontext *driContextPriv,
775 unsigned major_version,
776 unsigned minor_version,
777 uint32_t flags,
778 unsigned *error,
779 void *sharedContextPrivate);
780
781 static GLboolean
782 intelCreateContext(gl_api api,
783 const struct gl_config * mesaVis,
784 __DRIcontext * driContextPriv,
785 unsigned major_version,
786 unsigned minor_version,
787 uint32_t flags,
788 unsigned *error,
789 void *sharedContextPrivate)
790 {
791 bool success = false;
792
793 #ifdef I915
794 __DRIscreen *sPriv = driContextPriv->driScreenPriv;
795 struct intel_screen *intelScreen = sPriv->driverPrivate;
796
797 if (IS_9XX(intelScreen->deviceID)) {
798 success = i915CreateContext(api, mesaVis, driContextPriv,
799 major_version, minor_version, error,
800 sharedContextPrivate);
801 } else {
802 intelScreen->no_vbo = true;
803 success = i830CreateContext(api, mesaVis, driContextPriv,
804 major_version, minor_version, error,
805 sharedContextPrivate);
806 }
807 #else
808 success = brwCreateContext(api, mesaVis,
809 driContextPriv,
810 major_version, minor_version, flags,
811 error, sharedContextPrivate);
812 #endif
813
814 if (success)
815 return true;
816
817 if (driContextPriv->driverPrivate != NULL)
818 intelDestroyContext(driContextPriv);
819
820 return false;
821 }
822
823 static bool
824 intel_init_bufmgr(struct intel_screen *intelScreen)
825 {
826 __DRIscreen *spriv = intelScreen->driScrnPriv;
827 int num_fences = 0;
828
829 intelScreen->no_hw = getenv("INTEL_NO_HW") != NULL;
830
831 intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ);
832 if (intelScreen->bufmgr == NULL) {
833 fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
834 __func__, __LINE__);
835 return false;
836 }
837
838 if (!intel_get_param(spriv, I915_PARAM_NUM_FENCES_AVAIL, &num_fences) ||
839 num_fences == 0) {
840 fprintf(stderr, "[%s: %u] Kernel 2.6.29 required.\n", __func__, __LINE__);
841 return false;
842 }
843
844 drm_intel_bufmgr_gem_enable_fenced_relocs(intelScreen->bufmgr);
845
846 intelScreen->named_regions = _mesa_NewHashTable();
847
848 intelScreen->relaxed_relocations = 0;
849 intelScreen->relaxed_relocations |=
850 intel_get_boolean(spriv, I915_PARAM_HAS_RELAXED_DELTA) << 0;
851
852 return true;
853 }
854
855 /**
856 * Override intel_screen.hw_has_separate_stencil with environment variable
857 * INTEL_SEPARATE_STENCIL.
858 *
859 * Valid values for INTEL_SEPARATE_STENCIL are "0" and "1". If an invalid
860 * valid value is encountered, a warning is emitted and INTEL_SEPARATE_STENCIL
861 * is ignored.
862 */
863 static void
864 intel_override_separate_stencil(struct intel_screen *screen)
865 {
866 const char *s = getenv("INTEL_SEPARATE_STENCIL");
867 if (!s) {
868 return;
869 } else if (!strncmp("0", s, 2)) {
870 screen->hw_has_separate_stencil = false;
871 } else if (!strncmp("1", s, 2)) {
872 screen->hw_has_separate_stencil = true;
873 } else {
874 fprintf(stderr,
875 "warning: env variable INTEL_SEPARATE_STENCIL=\"%s\" has "
876 "invalid value and is ignored", s);
877 }
878 }
879
880 static bool
881 intel_detect_swizzling(struct intel_screen *screen)
882 {
883 drm_intel_bo *buffer;
884 unsigned long flags = 0;
885 unsigned long aligned_pitch;
886 uint32_t tiling = I915_TILING_X;
887 uint32_t swizzle_mode = 0;
888
889 buffer = drm_intel_bo_alloc_tiled(screen->bufmgr, "swizzle test",
890 64, 64, 4,
891 &tiling, &aligned_pitch, flags);
892 if (buffer == NULL)
893 return false;
894
895 drm_intel_bo_get_tiling(buffer, &tiling, &swizzle_mode);
896 drm_intel_bo_unreference(buffer);
897
898 if (swizzle_mode == I915_BIT_6_SWIZZLE_NONE)
899 return false;
900 else
901 return true;
902 }
903
904 static __DRIconfig**
905 intel_screen_make_configs(__DRIscreen *dri_screen)
906 {
907 static const gl_format formats[] = {
908 MESA_FORMAT_RGB565,
909 MESA_FORMAT_ARGB8888
910 };
911
912 /* GLX_SWAP_COPY_OML is not supported due to page flipping. */
913 static const GLenum back_buffer_modes[] = {
914 GLX_SWAP_UNDEFINED_OML, GLX_NONE,
915 };
916
917 static const uint8_t singlesample_samples[1] = {0};
918 static const uint8_t multisample_samples[2] = {4, 8};
919
920 struct intel_screen *screen = dri_screen->driverPrivate;
921 uint8_t depth_bits[4], stencil_bits[4];
922 __DRIconfig **configs = NULL;
923
924 /* Generate singlesample configs without accumulation buffer. */
925 for (int i = 0; i < ARRAY_SIZE(formats); i++) {
926 __DRIconfig **new_configs;
927 int num_depth_stencil_bits = 2;
928
929 /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
930 * buffer that has a different number of bits per pixel than the color
931 * buffer, gen >= 6 supports this.
932 */
933 depth_bits[0] = 0;
934 stencil_bits[0] = 0;
935
936 if (formats[i] == MESA_FORMAT_RGB565) {
937 depth_bits[1] = 16;
938 stencil_bits[1] = 0;
939 if (screen->gen >= 6) {
940 depth_bits[2] = 24;
941 stencil_bits[2] = 8;
942 num_depth_stencil_bits = 3;
943 }
944 } else {
945 depth_bits[1] = 24;
946 stencil_bits[1] = 8;
947 }
948
949 new_configs = driCreateConfigs(formats[i],
950 depth_bits,
951 stencil_bits,
952 num_depth_stencil_bits,
953 back_buffer_modes, 2,
954 singlesample_samples, 1,
955 false);
956 configs = driConcatConfigs(configs, new_configs);
957 }
958
959 /* Generate the minimum possible set of configs that include an
960 * accumulation buffer.
961 */
962 for (int i = 0; i < ARRAY_SIZE(formats); i++) {
963 __DRIconfig **new_configs;
964
965 if (formats[i] == MESA_FORMAT_RGB565) {
966 depth_bits[0] = 16;
967 stencil_bits[0] = 0;
968 } else {
969 depth_bits[0] = 24;
970 stencil_bits[0] = 8;
971 }
972
973 new_configs = driCreateConfigs(formats[i],
974 depth_bits, stencil_bits, 1,
975 back_buffer_modes, 1,
976 singlesample_samples, 1,
977 true);
978 configs = driConcatConfigs(configs, new_configs);
979 }
980
981 /* Generate multisample configs.
982 *
983 * This loop breaks early, and hence is a no-op, on gen < 6.
984 *
985 * Multisample configs must follow the singlesample configs in order to
986 * work around an X server bug present in 1.12. The X server chooses to
987 * associate the first listed RGBA888-Z24S8 config, regardless of its
988 * sample count, with the 32-bit depth visual used for compositing.
989 *
990 * Only doublebuffer configs with GLX_SWAP_UNDEFINED_OML behavior are
991 * supported. Singlebuffer configs are not supported because no one wants
992 * them.
993 */
994 for (int i = 0; i < ARRAY_SIZE(formats); i++) {
995 if (screen->gen < 6)
996 break;
997
998 __DRIconfig **new_configs;
999 const int num_depth_stencil_bits = 2;
1000 int num_msaa_modes = 0;
1001
1002 depth_bits[0] = 0;
1003 stencil_bits[0] = 0;
1004
1005 if (formats[i] == MESA_FORMAT_RGB565) {
1006 depth_bits[1] = 16;
1007 stencil_bits[1] = 0;
1008 } else {
1009 depth_bits[1] = 24;
1010 stencil_bits[1] = 8;
1011 }
1012
1013 if (screen->gen >= 7)
1014 num_msaa_modes = 2;
1015 else if (screen->gen == 6)
1016 num_msaa_modes = 1;
1017
1018 new_configs = driCreateConfigs(formats[i],
1019 depth_bits,
1020 stencil_bits,
1021 num_depth_stencil_bits,
1022 back_buffer_modes, 1,
1023 multisample_samples,
1024 num_msaa_modes,
1025 false);
1026 configs = driConcatConfigs(configs, new_configs);
1027 }
1028
1029 if (configs == NULL) {
1030 fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
1031 __LINE__);
1032 return NULL;
1033 }
1034
1035 return configs;
1036 }
1037
1038 static void
1039 set_max_gl_versions(struct intel_screen *screen)
1040 {
1041 switch (screen->gen) {
1042 case 7:
1043 if (screen->kernel_has_gen7_sol_reset) {
1044 screen->max_gl_core_version = 31;
1045 screen->max_gl_compat_version = 30;
1046 screen->max_gl_es1_version = 11;
1047 screen->max_gl_es2_version = 30;
1048 } else {
1049 screen->max_gl_core_version = 0;
1050 screen->max_gl_compat_version = 21;
1051 screen->max_gl_es1_version = 11;
1052 screen->max_gl_es2_version = 20;
1053 }
1054 break;
1055 case 6:
1056 screen->max_gl_core_version = 31;
1057 screen->max_gl_compat_version = 30;
1058 screen->max_gl_es1_version = 11;
1059 screen->max_gl_es2_version = 20;
1060 break;
1061 case 5:
1062 case 4:
1063 screen->max_gl_core_version = 0;
1064 screen->max_gl_compat_version = 21;
1065 screen->max_gl_es1_version = 11;
1066 screen->max_gl_es2_version = 20;
1067 break;
1068 case 3: {
1069 bool has_fragment_shader = driQueryOptionb(&screen->optionCache, "fragment_shader");
1070 bool has_occlusion_query = driQueryOptionb(&screen->optionCache, "stub_occlusion_query");
1071
1072 screen->max_gl_core_version = 0;
1073 screen->max_gl_es1_version = 11;
1074
1075 if (has_fragment_shader && has_occlusion_query) {
1076 screen->max_gl_compat_version = 21;
1077 } else {
1078 screen->max_gl_compat_version = 14;
1079 }
1080
1081 if (has_fragment_shader) {
1082 screen->max_gl_es2_version = 20;
1083 } else {
1084 screen->max_gl_es2_version = 0;
1085 }
1086
1087 break;
1088 }
1089 case 2:
1090 screen->max_gl_core_version = 0;
1091 screen->max_gl_compat_version = 13;
1092 screen->max_gl_es1_version = 11;
1093 screen->max_gl_es2_version = 0;
1094 break;
1095 default:
1096 assert(!"unrecognized intel_screen::gen");
1097 break;
1098 }
1099
1100 #ifndef FEATURE_ES1
1101 screen->max_gl_es1_version = 0;
1102 #endif
1103
1104 #ifndef FEATURE_ES2
1105 screen->max_gl_es2_version = 0;
1106 #endif
1107 }
1108
1109 /**
1110 * This is the driver specific part of the createNewScreen entry point.
1111 * Called when using DRI2.
1112 *
1113 * \return the struct gl_config supported by this driver
1114 */
1115 static const
1116 __DRIconfig **intelInitScreen2(__DRIscreen *psp)
1117 {
1118 struct intel_screen *intelScreen;
1119
1120 if (psp->dri2.loader->base.version <= 2 ||
1121 psp->dri2.loader->getBuffersWithFormat == NULL) {
1122 fprintf(stderr,
1123 "\nERROR! DRI2 loader with getBuffersWithFormat() "
1124 "support required\n");
1125 return false;
1126 }
1127
1128 /* Allocate the private area */
1129 intelScreen = calloc(1, sizeof *intelScreen);
1130 if (!intelScreen) {
1131 fprintf(stderr, "\nERROR! Allocating private area failed\n");
1132 return false;
1133 }
1134 /* parse information in __driConfigOptions */
1135 driParseOptionInfo(&intelScreen->optionCache,
1136 __driConfigOptions, __driNConfigOptions);
1137
1138 intelScreen->driScrnPriv = psp;
1139 psp->driverPrivate = (void *) intelScreen;
1140
1141 if (!intel_init_bufmgr(intelScreen))
1142 return false;
1143
1144 intelScreen->deviceID = drm_intel_bufmgr_gem_get_devid(intelScreen->bufmgr);
1145
1146 intelScreen->kernel_has_gen7_sol_reset =
1147 intel_get_boolean(intelScreen->driScrnPriv,
1148 I915_PARAM_HAS_GEN7_SOL_RESET);
1149
1150 if (IS_GEN7(intelScreen->deviceID)) {
1151 intelScreen->gen = 7;
1152 } else if (IS_GEN6(intelScreen->deviceID)) {
1153 intelScreen->gen = 6;
1154 } else if (IS_GEN5(intelScreen->deviceID)) {
1155 intelScreen->gen = 5;
1156 } else if (IS_965(intelScreen->deviceID)) {
1157 intelScreen->gen = 4;
1158 } else if (IS_9XX(intelScreen->deviceID)) {
1159 intelScreen->gen = 3;
1160 } else {
1161 intelScreen->gen = 2;
1162 }
1163
1164 intelScreen->hw_has_separate_stencil = intelScreen->gen >= 6;
1165 intelScreen->hw_must_use_separate_stencil = intelScreen->gen >= 7;
1166
1167 int has_llc = 0;
1168 bool success = intel_get_param(intelScreen->driScrnPriv, I915_PARAM_HAS_LLC,
1169 &has_llc);
1170 if (success && has_llc)
1171 intelScreen->hw_has_llc = true;
1172 else if (!success && intelScreen->gen >= 6)
1173 intelScreen->hw_has_llc = true;
1174
1175 intel_override_separate_stencil(intelScreen);
1176
1177 intelScreen->hw_has_swizzling = intel_detect_swizzling(intelScreen);
1178
1179 set_max_gl_versions(intelScreen);
1180
1181 psp->api_mask = (1 << __DRI_API_OPENGL);
1182 if (intelScreen->max_gl_es1_version > 0)
1183 psp->api_mask |= (1 << __DRI_API_GLES);
1184 if (intelScreen->max_gl_es2_version > 0)
1185 psp->api_mask |= (1 << __DRI_API_GLES2);
1186 if (intelScreen->max_gl_es2_version >= 30)
1187 psp->api_mask |= (1 << __DRI_API_GLES3);
1188
1189 psp->extensions = intelScreenExtensions;
1190
1191 return (const __DRIconfig**) intel_screen_make_configs(psp);
1192 }
1193
1194 struct intel_buffer {
1195 __DRIbuffer base;
1196 struct intel_region *region;
1197 };
1198
1199 static __DRIbuffer *
1200 intelAllocateBuffer(__DRIscreen *screen,
1201 unsigned attachment, unsigned format,
1202 int width, int height)
1203 {
1204 struct intel_buffer *intelBuffer;
1205 struct intel_screen *intelScreen = screen->driverPrivate;
1206
1207 assert(attachment == __DRI_BUFFER_FRONT_LEFT ||
1208 attachment == __DRI_BUFFER_BACK_LEFT);
1209
1210 intelBuffer = calloc(1, sizeof *intelBuffer);
1211 if (intelBuffer == NULL)
1212 return NULL;
1213
1214 /* The front and back buffers are color buffers, which are X tiled. */
1215 intelBuffer->region = intel_region_alloc(intelScreen,
1216 I915_TILING_X,
1217 format / 8,
1218 width,
1219 height,
1220 true);
1221
1222 if (intelBuffer->region == NULL) {
1223 free(intelBuffer);
1224 return NULL;
1225 }
1226
1227 intel_region_flink(intelBuffer->region, &intelBuffer->base.name);
1228
1229 intelBuffer->base.attachment = attachment;
1230 intelBuffer->base.cpp = intelBuffer->region->cpp;
1231 intelBuffer->base.pitch = intelBuffer->region->pitch;
1232
1233 return &intelBuffer->base;
1234 }
1235
1236 static void
1237 intelReleaseBuffer(__DRIscreen *screen, __DRIbuffer *buffer)
1238 {
1239 struct intel_buffer *intelBuffer = (struct intel_buffer *) buffer;
1240
1241 intel_region_release(&intelBuffer->region);
1242 free(intelBuffer);
1243 }
1244
1245
1246 const struct __DriverAPIRec driDriverAPI = {
1247 .InitScreen = intelInitScreen2,
1248 .DestroyScreen = intelDestroyScreen,
1249 .CreateContext = intelCreateContext,
1250 .DestroyContext = intelDestroyContext,
1251 .CreateBuffer = intelCreateBuffer,
1252 .DestroyBuffer = intelDestroyBuffer,
1253 .MakeCurrent = intelMakeCurrent,
1254 .UnbindContext = intelUnbindContext,
1255 .AllocateBuffer = intelAllocateBuffer,
1256 .ReleaseBuffer = intelReleaseBuffer
1257 };
1258
1259 /* This is the table of extensions that the loader will dlsym() for. */
1260 PUBLIC const __DRIextension *__driDriverExtensions[] = {
1261 &driCoreExtension.base,
1262 &driDRI2Extension.base,
1263 NULL
1264 };