intel: In the i915 driver, the chipset cannot be i965
[mesa.git] / src / mesa / drivers / dri / intel / intel_screen.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include <errno.h>
29 #include "main/glheader.h"
30 #include "main/context.h"
31 #include "main/framebuffer.h"
32 #include "main/renderbuffer.h"
33 #include "main/hash.h"
34 #include "main/fbobject.h"
35 #include "main/mfeatures.h"
36 #include "main/version.h"
37 #include "swrast/s_renderbuffer.h"
38
39 #include "utils.h"
40 #include "xmlpool.h"
41
42 PUBLIC const char __driConfigOptions[] =
43 DRI_CONF_BEGIN
44 DRI_CONF_SECTION_PERFORMANCE
45 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC)
46 /* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
47 * DRI_CONF_BO_REUSE_ALL
48 */
49 DRI_CONF_OPT_BEGIN_V(bo_reuse, enum, 1, "0:1")
50 DRI_CONF_DESC_BEGIN(en, "Buffer object reuse")
51 DRI_CONF_ENUM(0, "Disable buffer object reuse")
52 DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")
53 DRI_CONF_DESC_END
54 DRI_CONF_OPT_END
55
56 DRI_CONF_OPT_BEGIN(texture_tiling, bool, true)
57 DRI_CONF_DESC(en, "Enable texture tiling")
58 DRI_CONF_OPT_END
59
60 DRI_CONF_OPT_BEGIN(hiz, bool, true)
61 DRI_CONF_DESC(en, "Enable Hierarchical Z on gen6+")
62 DRI_CONF_OPT_END
63
64 DRI_CONF_OPT_BEGIN(early_z, bool, false)
65 DRI_CONF_DESC(en, "Enable early Z in classic mode (unstable, 945-only).")
66 DRI_CONF_OPT_END
67
68 DRI_CONF_OPT_BEGIN(fragment_shader, bool, true)
69 DRI_CONF_DESC(en, "Enable limited ARB_fragment_shader support on 915/945.")
70 DRI_CONF_OPT_END
71
72 DRI_CONF_SECTION_END
73 DRI_CONF_SECTION_QUALITY
74 DRI_CONF_FORCE_S3TC_ENABLE(false)
75 DRI_CONF_ALLOW_LARGE_TEXTURES(2)
76 DRI_CONF_SECTION_END
77 DRI_CONF_SECTION_DEBUG
78 DRI_CONF_NO_RAST(false)
79 DRI_CONF_ALWAYS_FLUSH_BATCH(false)
80 DRI_CONF_ALWAYS_FLUSH_CACHE(false)
81 DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN(false)
82 DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED(false)
83
84 DRI_CONF_OPT_BEGIN(stub_occlusion_query, bool, false)
85 DRI_CONF_DESC(en, "Enable stub ARB_occlusion_query support on 915/945.")
86 DRI_CONF_OPT_END
87
88 DRI_CONF_OPT_BEGIN(shader_precompile, bool, false)
89 DRI_CONF_DESC(en, "Perform code generation at shader link time.")
90 DRI_CONF_OPT_END
91 DRI_CONF_SECTION_END
92 DRI_CONF_END;
93
94 const GLuint __driNConfigOptions = 15;
95
96 #include "intel_batchbuffer.h"
97 #include "intel_buffers.h"
98 #include "intel_bufmgr.h"
99 #include "intel_chipset.h"
100 #include "intel_fbo.h"
101 #include "intel_mipmap_tree.h"
102 #include "intel_screen.h"
103 #include "intel_tex.h"
104 #include "intel_regions.h"
105
106 #include "i915_drm.h"
107
108 #ifdef USE_NEW_INTERFACE
109 static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
110 #endif /*USE_NEW_INTERFACE */
111
112 /**
113 * For debugging purposes, this returns a time in seconds.
114 */
115 double
116 get_time(void)
117 {
118 struct timespec tp;
119
120 clock_gettime(CLOCK_MONOTONIC, &tp);
121
122 return tp.tv_sec + tp.tv_nsec / 1000000000.0;
123 }
124
125 void
126 aub_dump_bmp(struct gl_context *ctx)
127 {
128 struct gl_framebuffer *fb = ctx->DrawBuffer;
129
130 for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
131 struct intel_renderbuffer *irb =
132 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
133
134 if (irb && irb->mt) {
135 enum aub_dump_bmp_format format;
136
137 switch (irb->Base.Base.Format) {
138 case MESA_FORMAT_ARGB8888:
139 case MESA_FORMAT_XRGB8888:
140 format = AUB_DUMP_BMP_FORMAT_ARGB_8888;
141 break;
142 default:
143 continue;
144 }
145
146 drm_intel_gem_bo_aub_dump_bmp(irb->mt->region->bo,
147 irb->draw_x,
148 irb->draw_y,
149 irb->Base.Base.Width,
150 irb->Base.Base.Height,
151 format,
152 irb->mt->region->pitch *
153 irb->mt->region->cpp,
154 0);
155 }
156 }
157 }
158
159 static const __DRItexBufferExtension intelTexBufferExtension = {
160 { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
161 intelSetTexBuffer,
162 intelSetTexBuffer2,
163 };
164
165 static void
166 intel_downsample_for_dri2_flush(struct intel_context *intel,
167 __DRIdrawable *drawable)
168 {
169 if (intel->gen < 6) {
170 /* MSAA is not supported, so don't waste time checking for
171 * a multisample buffer.
172 */
173 return;
174 }
175
176 struct gl_framebuffer *fb = drawable->driverPrivate;
177 struct intel_renderbuffer *rb;
178
179 /* Usually, only the back buffer will need to be downsampled. However,
180 * the front buffer will also need it if the user has rendered into it.
181 */
182 static const gl_buffer_index buffers[2] = {
183 BUFFER_BACK_LEFT,
184 BUFFER_FRONT_LEFT,
185 };
186
187 for (int i = 0; i < 2; ++i) {
188 rb = intel_get_renderbuffer(fb, buffers[i]);
189 if (rb == NULL || rb->mt == NULL)
190 continue;
191 intel_miptree_downsample(intel, rb->mt);
192 }
193 }
194
195 static void
196 intelDRI2Flush(__DRIdrawable *drawable)
197 {
198 GET_CURRENT_CONTEXT(ctx);
199 struct intel_context *intel = intel_context(ctx);
200 if (intel == NULL)
201 return;
202
203 if (intel->gen < 4)
204 INTEL_FIREVERTICES(intel);
205
206 intel_downsample_for_dri2_flush(intel, drawable);
207 intel->need_throttle = true;
208
209 if (intel->batch.used)
210 intel_batchbuffer_flush(intel);
211
212 if (INTEL_DEBUG & DEBUG_AUB) {
213 aub_dump_bmp(ctx);
214 }
215 }
216
217 static const struct __DRI2flushExtensionRec intelFlushExtension = {
218 { __DRI2_FLUSH, __DRI2_FLUSH_VERSION },
219 intelDRI2Flush,
220 dri2InvalidateDrawable,
221 };
222
223 static __DRIimage *
224 intel_allocate_image(int dri_format, void *loaderPrivate)
225 {
226 __DRIimage *image;
227
228 image = CALLOC(sizeof *image);
229 if (image == NULL)
230 return NULL;
231
232 image->dri_format = dri_format;
233 image->offset = 0;
234
235 switch (dri_format) {
236 case __DRI_IMAGE_FORMAT_RGB565:
237 image->format = MESA_FORMAT_RGB565;
238 break;
239 case __DRI_IMAGE_FORMAT_XRGB8888:
240 image->format = MESA_FORMAT_XRGB8888;
241 break;
242 case __DRI_IMAGE_FORMAT_ARGB8888:
243 image->format = MESA_FORMAT_ARGB8888;
244 break;
245 case __DRI_IMAGE_FORMAT_ABGR8888:
246 image->format = MESA_FORMAT_RGBA8888_REV;
247 break;
248 case __DRI_IMAGE_FORMAT_XBGR8888:
249 image->format = MESA_FORMAT_RGBX8888_REV;
250 break;
251 case __DRI_IMAGE_FORMAT_R8:
252 image->format = MESA_FORMAT_R8;
253 break;
254 case __DRI_IMAGE_FORMAT_GR88:
255 image->format = MESA_FORMAT_GR88;
256 break;
257 case __DRI_IMAGE_FORMAT_NONE:
258 image->format = MESA_FORMAT_NONE;
259 break;
260 default:
261 free(image);
262 return NULL;
263 }
264
265 image->internal_format = _mesa_get_format_base_format(image->format);
266 image->data = loaderPrivate;
267
268 return image;
269 }
270
271 static __DRIimage *
272 intel_create_image_from_name(__DRIscreen *screen,
273 int width, int height, int format,
274 int name, int pitch, void *loaderPrivate)
275 {
276 struct intel_screen *intelScreen = screen->driverPrivate;
277 __DRIimage *image;
278 int cpp;
279
280 image = intel_allocate_image(format, loaderPrivate);
281 if (image->format == MESA_FORMAT_NONE)
282 cpp = 0;
283 else
284 cpp = _mesa_get_format_bytes(image->format);
285 image->region = intel_region_alloc_for_handle(intelScreen,
286 cpp, width, height,
287 pitch, name, "image");
288 if (image->region == NULL) {
289 FREE(image);
290 return NULL;
291 }
292
293 return image;
294 }
295
296 static __DRIimage *
297 intel_create_image_from_renderbuffer(__DRIcontext *context,
298 int renderbuffer, void *loaderPrivate)
299 {
300 __DRIimage *image;
301 struct intel_context *intel = context->driverPrivate;
302 struct gl_renderbuffer *rb;
303 struct intel_renderbuffer *irb;
304
305 rb = _mesa_lookup_renderbuffer(&intel->ctx, renderbuffer);
306 if (!rb) {
307 _mesa_error(&intel->ctx,
308 GL_INVALID_OPERATION, "glRenderbufferExternalMESA");
309 return NULL;
310 }
311
312 irb = intel_renderbuffer(rb);
313 image = CALLOC(sizeof *image);
314 if (image == NULL)
315 return NULL;
316
317 image->internal_format = rb->InternalFormat;
318 image->format = rb->Format;
319 image->offset = 0;
320 image->data = loaderPrivate;
321 intel_region_reference(&image->region, irb->mt->region);
322
323 switch (image->format) {
324 case MESA_FORMAT_RGB565:
325 image->dri_format = __DRI_IMAGE_FORMAT_RGB565;
326 break;
327 case MESA_FORMAT_XRGB8888:
328 image->dri_format = __DRI_IMAGE_FORMAT_XRGB8888;
329 break;
330 case MESA_FORMAT_ARGB8888:
331 image->dri_format = __DRI_IMAGE_FORMAT_ARGB8888;
332 break;
333 case MESA_FORMAT_RGBA8888_REV:
334 image->dri_format = __DRI_IMAGE_FORMAT_ABGR8888;
335 break;
336 case MESA_FORMAT_R8:
337 image->dri_format = __DRI_IMAGE_FORMAT_R8;
338 break;
339 case MESA_FORMAT_RG88:
340 image->dri_format = __DRI_IMAGE_FORMAT_GR88;
341 break;
342 }
343
344 return image;
345 }
346
347 static void
348 intel_destroy_image(__DRIimage *image)
349 {
350 intel_region_release(&image->region);
351 FREE(image);
352 }
353
354 static __DRIimage *
355 intel_create_image(__DRIscreen *screen,
356 int width, int height, int format,
357 unsigned int use,
358 void *loaderPrivate)
359 {
360 __DRIimage *image;
361 struct intel_screen *intelScreen = screen->driverPrivate;
362 uint32_t tiling;
363 int cpp;
364
365 tiling = I915_TILING_X;
366 if (use & __DRI_IMAGE_USE_CURSOR) {
367 if (width != 64 || height != 64)
368 return NULL;
369 tiling = I915_TILING_NONE;
370 }
371
372 /* We only support write for cursor drm images */
373 if ((use & __DRI_IMAGE_USE_WRITE) &&
374 use != (__DRI_IMAGE_USE_WRITE | __DRI_IMAGE_USE_CURSOR))
375 return NULL;
376
377 image = intel_allocate_image(format, loaderPrivate);
378 image->usage = use;
379 cpp = _mesa_get_format_bytes(image->format);
380 image->region =
381 intel_region_alloc(intelScreen, tiling, cpp, width, height, true);
382 if (image->region == NULL) {
383 FREE(image);
384 return NULL;
385 }
386
387 return image;
388 }
389
390 static GLboolean
391 intel_query_image(__DRIimage *image, int attrib, int *value)
392 {
393 switch (attrib) {
394 case __DRI_IMAGE_ATTRIB_STRIDE:
395 *value = image->region->pitch * image->region->cpp;
396 return true;
397 case __DRI_IMAGE_ATTRIB_HANDLE:
398 *value = image->region->bo->handle;
399 return true;
400 case __DRI_IMAGE_ATTRIB_NAME:
401 return intel_region_flink(image->region, (uint32_t *) value);
402 case __DRI_IMAGE_ATTRIB_FORMAT:
403 *value = image->dri_format;
404 return true;
405 case __DRI_IMAGE_ATTRIB_WIDTH:
406 *value = image->region->width;
407 return true;
408 case __DRI_IMAGE_ATTRIB_HEIGHT:
409 *value = image->region->height;
410 return true;
411 default:
412 return false;
413 }
414 }
415
416 static __DRIimage *
417 intel_dup_image(__DRIimage *orig_image, void *loaderPrivate)
418 {
419 __DRIimage *image;
420
421 image = CALLOC(sizeof *image);
422 if (image == NULL)
423 return NULL;
424
425 intel_region_reference(&image->region, orig_image->region);
426 if (image->region == NULL) {
427 FREE(image);
428 return NULL;
429 }
430
431 image->internal_format = orig_image->internal_format;
432 image->usage = orig_image->usage;
433 image->dri_format = orig_image->dri_format;
434 image->format = orig_image->format;
435 image->offset = orig_image->offset;
436 image->data = loaderPrivate;
437
438 return image;
439 }
440
441 static GLboolean
442 intel_validate_usage(__DRIimage *image, unsigned int use)
443 {
444 if (use & __DRI_IMAGE_USE_CURSOR) {
445 if (image->region->width != 64 || image->region->height != 64)
446 return GL_FALSE;
447 }
448
449 /* We only support write for cursor drm images */
450 if ((use & __DRI_IMAGE_USE_WRITE) &&
451 use != (__DRI_IMAGE_USE_WRITE | __DRI_IMAGE_USE_CURSOR))
452 return GL_FALSE;
453
454 return GL_TRUE;
455 }
456
457 static int
458 intel_image_write(__DRIimage *image, const void *buf, size_t count)
459 {
460 if (image->region->map_refcount)
461 return -1;
462 if (!(image->usage & __DRI_IMAGE_USE_WRITE))
463 return -1;
464
465 drm_intel_bo_map(image->region->bo, true);
466 memcpy(image->region->bo->virtual, buf, count);
467 drm_intel_bo_unmap(image->region->bo);
468
469 return 0;
470 }
471
472 static __DRIimage *
473 intel_create_sub_image(__DRIimage *parent,
474 int width, int height, int dri_format,
475 int offset, int pitch, void *loaderPrivate)
476 {
477 __DRIimage *image;
478 int cpp;
479 uint32_t mask_x, mask_y;
480
481 image = intel_allocate_image(dri_format, loaderPrivate);
482 cpp = _mesa_get_format_bytes(image->format);
483 if (offset + height * cpp * pitch > parent->region->bo->size) {
484 _mesa_warning(NULL, "intel_create_sub_image: subimage out of bounds");
485 FREE(image);
486 return NULL;
487 }
488
489 image->region = calloc(sizeof(*image->region), 1);
490 if (image->region == NULL) {
491 FREE(image);
492 return NULL;
493 }
494
495 image->region->cpp = _mesa_get_format_bytes(image->format);
496 image->region->width = width;
497 image->region->height = height;
498 image->region->pitch = pitch;
499 image->region->refcount = 1;
500 image->region->bo = parent->region->bo;
501 drm_intel_bo_reference(image->region->bo);
502 image->region->tiling = parent->region->tiling;
503 image->region->screen = parent->region->screen;
504 image->offset = offset;
505
506 intel_region_get_tile_masks(image->region, &mask_x, &mask_y);
507 if (offset & mask_x)
508 _mesa_warning(NULL,
509 "intel_create_sub_image: offset not on tile boundary");
510
511 return image;
512 }
513
514 static struct __DRIimageExtensionRec intelImageExtension = {
515 { __DRI_IMAGE, 5 },
516 intel_create_image_from_name,
517 intel_create_image_from_renderbuffer,
518 intel_destroy_image,
519 intel_create_image,
520 intel_query_image,
521 intel_dup_image,
522 intel_validate_usage,
523 intel_image_write,
524 intel_create_sub_image
525 };
526
527 static const __DRIextension *intelScreenExtensions[] = {
528 &intelTexBufferExtension.base,
529 &intelFlushExtension.base,
530 &intelImageExtension.base,
531 &dri2ConfigQueryExtension.base,
532 NULL
533 };
534
535 static bool
536 intel_get_param(__DRIscreen *psp, int param, int *value)
537 {
538 int ret;
539 struct drm_i915_getparam gp;
540
541 memset(&gp, 0, sizeof(gp));
542 gp.param = param;
543 gp.value = value;
544
545 ret = drmCommandWriteRead(psp->fd, DRM_I915_GETPARAM, &gp, sizeof(gp));
546 if (ret) {
547 if (ret != -EINVAL)
548 _mesa_warning(NULL, "drm_i915_getparam: %d", ret);
549 return false;
550 }
551
552 return true;
553 }
554
555 static bool
556 intel_get_boolean(__DRIscreen *psp, int param)
557 {
558 int value = 0;
559 return intel_get_param(psp, param, &value) && value;
560 }
561
562 static void
563 nop_callback(GLuint key, void *data, void *userData)
564 {
565 }
566
567 static void
568 intelDestroyScreen(__DRIscreen * sPriv)
569 {
570 struct intel_screen *intelScreen = sPriv->driverPrivate;
571
572 dri_bufmgr_destroy(intelScreen->bufmgr);
573 driDestroyOptionInfo(&intelScreen->optionCache);
574
575 /* Some regions may still have references to them at this point, so
576 * flush the hash table to prevent _mesa_DeleteHashTable() from
577 * complaining about the hash not being empty; */
578 _mesa_HashDeleteAll(intelScreen->named_regions, nop_callback, NULL);
579 _mesa_DeleteHashTable(intelScreen->named_regions);
580
581 FREE(intelScreen);
582 sPriv->driverPrivate = NULL;
583 }
584
585
586 /**
587 * This is called when we need to set up GL rendering to a new X window.
588 */
589 static GLboolean
590 intelCreateBuffer(__DRIscreen * driScrnPriv,
591 __DRIdrawable * driDrawPriv,
592 const struct gl_config * mesaVis, GLboolean isPixmap)
593 {
594 struct intel_renderbuffer *rb;
595 struct intel_screen *screen = (struct intel_screen*) driScrnPriv->driverPrivate;
596 gl_format rgbFormat;
597 unsigned num_samples = intel_quantize_num_samples(screen, mesaVis->samples);
598 struct gl_framebuffer *fb;
599
600 if (isPixmap)
601 return false;
602
603 fb = CALLOC_STRUCT(gl_framebuffer);
604 if (!fb)
605 return false;
606
607 _mesa_initialize_window_framebuffer(fb, mesaVis);
608
609 if (mesaVis->redBits == 5)
610 rgbFormat = MESA_FORMAT_RGB565;
611 else if (mesaVis->alphaBits == 0)
612 rgbFormat = MESA_FORMAT_XRGB8888;
613 else
614 rgbFormat = MESA_FORMAT_ARGB8888;
615
616 /* setup the hardware-based renderbuffers */
617 rb = intel_create_renderbuffer(rgbFormat, num_samples);
618 _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &rb->Base.Base);
619
620 if (mesaVis->doubleBufferMode) {
621 rb = intel_create_renderbuffer(rgbFormat, num_samples);
622 _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &rb->Base.Base);
623 }
624
625 /*
626 * Assert here that the gl_config has an expected depth/stencil bit
627 * combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(),
628 * which constructs the advertised configs.)
629 */
630 if (mesaVis->depthBits == 24) {
631 assert(mesaVis->stencilBits == 8);
632
633 if (screen->hw_has_separate_stencil) {
634 rb = intel_create_private_renderbuffer(MESA_FORMAT_X8_Z24,
635 num_samples);
636 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
637 rb = intel_create_private_renderbuffer(MESA_FORMAT_S8,
638 num_samples);
639 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
640 } else {
641 /*
642 * Use combined depth/stencil. Note that the renderbuffer is
643 * attached to two attachment points.
644 */
645 rb = intel_create_private_renderbuffer(MESA_FORMAT_S8_Z24,
646 num_samples);
647 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
648 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
649 }
650 }
651 else if (mesaVis->depthBits == 16) {
652 assert(mesaVis->stencilBits == 0);
653 rb = intel_create_private_renderbuffer(MESA_FORMAT_Z16,
654 num_samples);
655 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
656 }
657 else {
658 assert(mesaVis->depthBits == 0);
659 assert(mesaVis->stencilBits == 0);
660 }
661
662 /* now add any/all software-based renderbuffers we may need */
663 _swrast_add_soft_renderbuffers(fb,
664 false, /* never sw color */
665 false, /* never sw depth */
666 false, /* never sw stencil */
667 mesaVis->accumRedBits > 0,
668 false, /* never sw alpha */
669 false /* never sw aux */ );
670 driDrawPriv->driverPrivate = fb;
671
672 return true;
673 }
674
675 static void
676 intelDestroyBuffer(__DRIdrawable * driDrawPriv)
677 {
678 struct gl_framebuffer *fb = driDrawPriv->driverPrivate;
679
680 _mesa_reference_framebuffer(&fb, NULL);
681 }
682
683 /* There are probably better ways to do this, such as an
684 * init-designated function to register chipids and createcontext
685 * functions.
686 */
687 extern bool
688 i830CreateContext(const struct gl_config *mesaVis,
689 __DRIcontext *driContextPriv,
690 void *sharedContextPrivate);
691
692 extern bool
693 i915CreateContext(int api,
694 const struct gl_config *mesaVis,
695 __DRIcontext *driContextPriv,
696 void *sharedContextPrivate);
697 extern bool
698 brwCreateContext(int api,
699 const struct gl_config *mesaVis,
700 __DRIcontext *driContextPriv,
701 void *sharedContextPrivate);
702
703 static GLboolean
704 intelCreateContext(gl_api api,
705 const struct gl_config * mesaVis,
706 __DRIcontext * driContextPriv,
707 unsigned major_version,
708 unsigned minor_version,
709 uint32_t flags,
710 unsigned *error,
711 void *sharedContextPrivate)
712 {
713 __DRIscreen *sPriv = driContextPriv->driScreenPriv;
714 struct intel_screen *intelScreen = sPriv->driverPrivate;
715 bool success = false;
716
717 switch (api) {
718 case API_OPENGL:
719 case API_OPENGLES:
720 break;
721 case API_OPENGLES2:
722 #ifdef I915
723 if (!IS_9XX(intelScreen->deviceID)) {
724 *error = __DRI_CTX_ERROR_BAD_API;
725 return false;
726 }
727 #endif
728 break;
729 case API_OPENGL_CORE:
730 *error = __DRI_CTX_ERROR_BAD_API;
731 return GL_FALSE;
732 }
733
734 #ifdef I915
735 if (IS_9XX(intelScreen->deviceID)) {
736 success = i915CreateContext(api, mesaVis, driContextPriv,
737 sharedContextPrivate);
738 } else {
739 intelScreen->no_vbo = true;
740 success = i830CreateContext(mesaVis, driContextPriv,
741 sharedContextPrivate);
742 }
743 #else
744 success = brwCreateContext(api, mesaVis,
745 driContextPriv,
746 sharedContextPrivate);
747 #endif
748
749 if (success) {
750 struct gl_context *ctx =
751 (struct gl_context *) driContextPriv->driverPrivate;
752
753 _mesa_compute_version(ctx);
754 if (ctx->Version >= major_version * 10 + minor_version) {
755 return true;
756 }
757
758 *error = __DRI_CTX_ERROR_BAD_VERSION;
759 intelDestroyContext(driContextPriv);
760 } else {
761 *error = __DRI_CTX_ERROR_NO_MEMORY;
762 fprintf(stderr, "Unrecognized deviceID 0x%x\n", intelScreen->deviceID);
763 }
764
765 return false;
766 }
767
768 static bool
769 intel_init_bufmgr(struct intel_screen *intelScreen)
770 {
771 __DRIscreen *spriv = intelScreen->driScrnPriv;
772 int num_fences = 0;
773
774 intelScreen->no_hw = getenv("INTEL_NO_HW") != NULL;
775
776 intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ);
777 if (intelScreen->bufmgr == NULL) {
778 fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
779 __func__, __LINE__);
780 return false;
781 }
782
783 if (!intel_get_param(spriv, I915_PARAM_NUM_FENCES_AVAIL, &num_fences) ||
784 num_fences == 0) {
785 fprintf(stderr, "[%s: %u] Kernel 2.6.29 required.\n", __func__, __LINE__);
786 return false;
787 }
788
789 drm_intel_bufmgr_gem_enable_fenced_relocs(intelScreen->bufmgr);
790
791 intelScreen->named_regions = _mesa_NewHashTable();
792
793 intelScreen->relaxed_relocations = 0;
794 intelScreen->relaxed_relocations |=
795 intel_get_boolean(spriv, I915_PARAM_HAS_RELAXED_DELTA) << 0;
796
797 return true;
798 }
799
800 /**
801 * Override intel_screen.hw_has_separate_stencil with environment variable
802 * INTEL_SEPARATE_STENCIL.
803 *
804 * Valid values for INTEL_SEPARATE_STENCIL are "0" and "1". If an invalid
805 * valid value is encountered, a warning is emitted and INTEL_SEPARATE_STENCIL
806 * is ignored.
807 */
808 static void
809 intel_override_separate_stencil(struct intel_screen *screen)
810 {
811 const char *s = getenv("INTEL_SEPARATE_STENCIL");
812 if (!s) {
813 return;
814 } else if (!strncmp("0", s, 2)) {
815 screen->hw_has_separate_stencil = false;
816 } else if (!strncmp("1", s, 2)) {
817 screen->hw_has_separate_stencil = true;
818 } else {
819 fprintf(stderr,
820 "warning: env variable INTEL_SEPARATE_STENCIL=\"%s\" has "
821 "invalid value and is ignored", s);
822 }
823 }
824
825 static bool
826 intel_detect_swizzling(struct intel_screen *screen)
827 {
828 drm_intel_bo *buffer;
829 unsigned long flags = 0;
830 unsigned long aligned_pitch;
831 uint32_t tiling = I915_TILING_X;
832 uint32_t swizzle_mode = 0;
833
834 buffer = drm_intel_bo_alloc_tiled(screen->bufmgr, "swizzle test",
835 64, 64, 4,
836 &tiling, &aligned_pitch, flags);
837 if (buffer == NULL)
838 return false;
839
840 drm_intel_bo_get_tiling(buffer, &tiling, &swizzle_mode);
841 drm_intel_bo_unreference(buffer);
842
843 if (swizzle_mode == I915_BIT_6_SWIZZLE_NONE)
844 return false;
845 else
846 return true;
847 }
848
849 static __DRIconfig**
850 intel_screen_make_configs(__DRIscreen *dri_screen)
851 {
852 static const GLenum back_buffer_modes[] = {
853 GLX_NONE, GLX_SWAP_UNDEFINED_OML, GLX_SWAP_COPY_OML
854 };
855
856 static const uint8_t singlesample_samples[1] = {0};
857 static const uint8_t multisample_samples[2] = {4, 8};
858
859 struct intel_screen *screen = dri_screen->driverPrivate;
860 GLenum fb_format[3];
861 GLenum fb_type[3];
862 uint8_t depth_bits[4], stencil_bits[4];
863 __DRIconfig **configs = NULL;
864
865 fb_format[0] = GL_RGB;
866 fb_type[0] = GL_UNSIGNED_SHORT_5_6_5;
867
868 fb_format[1] = GL_BGR;
869 fb_type[1] = GL_UNSIGNED_INT_8_8_8_8_REV;
870
871 fb_format[2] = GL_BGRA;
872 fb_type[2] = GL_UNSIGNED_INT_8_8_8_8_REV;
873
874 /* Generate singlesample configs without accumulation buffer. */
875 for (int i = 0; i < ARRAY_SIZE(fb_format); i++) {
876 __DRIconfig **new_configs;
877 const int num_depth_stencil_bits = 2;
878
879 /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
880 * buffer that has a different number of bits per pixel than the color
881 * buffer. This isn't yet supported here.
882 */
883 depth_bits[0] = 0;
884 stencil_bits[0] = 0;
885
886 if (fb_type[i] == GL_UNSIGNED_SHORT_5_6_5) {
887 depth_bits[1] = 16;
888 stencil_bits[1] = 0;
889 } else {
890 depth_bits[1] = 24;
891 stencil_bits[1] = 8;
892 }
893
894 new_configs = driCreateConfigs(fb_format[i], fb_type[i],
895 depth_bits,
896 stencil_bits,
897 num_depth_stencil_bits,
898 back_buffer_modes,
899 ARRAY_SIZE(back_buffer_modes),
900 singlesample_samples, 1,
901 false);
902 configs = driConcatConfigs(configs, new_configs);
903 }
904
905 /* Generate the minimum possible set of configs that include an
906 * accumulation buffer.
907 */
908 for (int i = 0; i < ARRAY_SIZE(fb_format); i++) {
909 __DRIconfig **new_configs;
910
911 if (fb_type[i] == GL_UNSIGNED_SHORT_5_6_5) {
912 depth_bits[0] = 16;
913 stencil_bits[0] = 0;
914 } else {
915 depth_bits[0] = 24;
916 stencil_bits[0] = 8;
917 }
918
919 new_configs = driCreateConfigs(fb_format[i], fb_type[i],
920 depth_bits, stencil_bits, 1,
921 back_buffer_modes + 1, 1,
922 singlesample_samples, 1,
923 true);
924 configs = driConcatConfigs(configs, new_configs);
925 }
926
927 /* Generate multisample configs.
928 *
929 * This loop breaks early, and hence is a no-op, on gen < 6.
930 *
931 * Multisample configs must follow the singlesample configs in order to
932 * work around an X server bug present in 1.12. The X server chooses to
933 * associate the first listed RGBA888-Z24S8 config, regardless of its
934 * sample count, with the 32-bit depth visual used for compositing.
935 *
936 * Only doublebuffer configs with GLX_SWAP_UNDEFINED_OML behavior are
937 * supported. Singlebuffer configs are not supported because no one wants
938 * them. GLX_SWAP_COPY_OML is not supported due to page flipping.
939 */
940 for (int i = 0; i < ARRAY_SIZE(fb_format); i++) {
941 if (screen->gen < 6)
942 break;
943
944 __DRIconfig **new_configs;
945 const int num_depth_stencil_bits = 2;
946 int num_msaa_modes = 0;
947
948 depth_bits[0] = 0;
949 stencil_bits[0] = 0;
950
951 if (fb_type[i] == GL_UNSIGNED_SHORT_5_6_5) {
952 depth_bits[1] = 16;
953 stencil_bits[1] = 0;
954 } else {
955 depth_bits[1] = 24;
956 stencil_bits[1] = 8;
957 }
958
959 if (screen->gen >= 7)
960 num_msaa_modes = 2;
961 else if (screen->gen == 6)
962 num_msaa_modes = 1;
963
964 new_configs = driCreateConfigs(fb_format[i], fb_type[i],
965 depth_bits,
966 stencil_bits,
967 num_depth_stencil_bits,
968 back_buffer_modes + 1, 1,
969 multisample_samples,
970 num_msaa_modes,
971 false);
972 configs = driConcatConfigs(configs, new_configs);
973 }
974
975 if (configs == NULL) {
976 fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
977 __LINE__);
978 return NULL;
979 }
980
981 return configs;
982 }
983
984 /**
985 * This is the driver specific part of the createNewScreen entry point.
986 * Called when using DRI2.
987 *
988 * \return the struct gl_config supported by this driver
989 */
990 static const
991 __DRIconfig **intelInitScreen2(__DRIscreen *psp)
992 {
993 struct intel_screen *intelScreen;
994 unsigned int api_mask;
995
996 if (psp->dri2.loader->base.version <= 2 ||
997 psp->dri2.loader->getBuffersWithFormat == NULL) {
998 fprintf(stderr,
999 "\nERROR! DRI2 loader with getBuffersWithFormat() "
1000 "support required\n");
1001 return false;
1002 }
1003
1004 /* Allocate the private area */
1005 intelScreen = CALLOC(sizeof *intelScreen);
1006 if (!intelScreen) {
1007 fprintf(stderr, "\nERROR! Allocating private area failed\n");
1008 return false;
1009 }
1010 /* parse information in __driConfigOptions */
1011 driParseOptionInfo(&intelScreen->optionCache,
1012 __driConfigOptions, __driNConfigOptions);
1013
1014 intelScreen->driScrnPriv = psp;
1015 psp->driverPrivate = (void *) intelScreen;
1016
1017 if (!intel_init_bufmgr(intelScreen))
1018 return false;
1019
1020 intelScreen->deviceID = drm_intel_bufmgr_gem_get_devid(intelScreen->bufmgr);
1021
1022 intelScreen->kernel_has_gen7_sol_reset =
1023 intel_get_boolean(intelScreen->driScrnPriv,
1024 I915_PARAM_HAS_GEN7_SOL_RESET);
1025
1026 if (IS_GEN7(intelScreen->deviceID)) {
1027 intelScreen->gen = 7;
1028 } else if (IS_GEN6(intelScreen->deviceID)) {
1029 intelScreen->gen = 6;
1030 } else if (IS_GEN5(intelScreen->deviceID)) {
1031 intelScreen->gen = 5;
1032 } else if (IS_965(intelScreen->deviceID)) {
1033 intelScreen->gen = 4;
1034 } else if (IS_9XX(intelScreen->deviceID)) {
1035 intelScreen->gen = 3;
1036 } else {
1037 intelScreen->gen = 2;
1038 }
1039
1040 intelScreen->hw_has_separate_stencil = intelScreen->gen >= 6;
1041 intelScreen->hw_must_use_separate_stencil = intelScreen->gen >= 7;
1042
1043 int has_llc = 0;
1044 bool success = intel_get_param(intelScreen->driScrnPriv, I915_PARAM_HAS_LLC,
1045 &has_llc);
1046 if (success && has_llc)
1047 intelScreen->hw_has_llc = true;
1048 else if (!success && intelScreen->gen >= 6)
1049 intelScreen->hw_has_llc = true;
1050
1051 intel_override_separate_stencil(intelScreen);
1052
1053 api_mask = (1 << __DRI_API_OPENGL);
1054 #if FEATURE_ES1
1055 api_mask |= (1 << __DRI_API_GLES);
1056 #endif
1057 #if FEATURE_ES2
1058 api_mask |= (1 << __DRI_API_GLES2);
1059 #endif
1060
1061 if (IS_9XX(intelScreen->deviceID) || IS_965(intelScreen->deviceID))
1062 psp->api_mask = api_mask;
1063
1064 intelScreen->hw_has_swizzling = intel_detect_swizzling(intelScreen);
1065
1066 psp->extensions = intelScreenExtensions;
1067
1068 return (const __DRIconfig**) intel_screen_make_configs(psp);
1069 }
1070
1071 struct intel_buffer {
1072 __DRIbuffer base;
1073 struct intel_region *region;
1074 };
1075
1076 static __DRIbuffer *
1077 intelAllocateBuffer(__DRIscreen *screen,
1078 unsigned attachment, unsigned format,
1079 int width, int height)
1080 {
1081 struct intel_buffer *intelBuffer;
1082 struct intel_screen *intelScreen = screen->driverPrivate;
1083
1084 assert(attachment == __DRI_BUFFER_FRONT_LEFT ||
1085 attachment == __DRI_BUFFER_BACK_LEFT);
1086
1087 intelBuffer = CALLOC(sizeof *intelBuffer);
1088 if (intelBuffer == NULL)
1089 return NULL;
1090
1091 /* The front and back buffers are color buffers, which are X tiled. */
1092 intelBuffer->region = intel_region_alloc(intelScreen,
1093 I915_TILING_X,
1094 format / 8,
1095 width,
1096 height,
1097 true);
1098
1099 if (intelBuffer->region == NULL) {
1100 FREE(intelBuffer);
1101 return NULL;
1102 }
1103
1104 intel_region_flink(intelBuffer->region, &intelBuffer->base.name);
1105
1106 intelBuffer->base.attachment = attachment;
1107 intelBuffer->base.cpp = intelBuffer->region->cpp;
1108 intelBuffer->base.pitch =
1109 intelBuffer->region->pitch * intelBuffer->region->cpp;
1110
1111 return &intelBuffer->base;
1112 }
1113
1114 static void
1115 intelReleaseBuffer(__DRIscreen *screen, __DRIbuffer *buffer)
1116 {
1117 struct intel_buffer *intelBuffer = (struct intel_buffer *) buffer;
1118
1119 intel_region_release(&intelBuffer->region);
1120 free(intelBuffer);
1121 }
1122
1123
1124 const struct __DriverAPIRec driDriverAPI = {
1125 .InitScreen = intelInitScreen2,
1126 .DestroyScreen = intelDestroyScreen,
1127 .CreateContext = intelCreateContext,
1128 .DestroyContext = intelDestroyContext,
1129 .CreateBuffer = intelCreateBuffer,
1130 .DestroyBuffer = intelDestroyBuffer,
1131 .MakeCurrent = intelMakeCurrent,
1132 .UnbindContext = intelUnbindContext,
1133 .AllocateBuffer = intelAllocateBuffer,
1134 .ReleaseBuffer = intelReleaseBuffer
1135 };
1136
1137 /* This is the table of extensions that the loader will dlsym() for. */
1138 PUBLIC const __DRIextension *__driDriverExtensions[] = {
1139 &driCoreExtension.base,
1140 &driDRI2Extension.base,
1141 NULL
1142 };