1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
30 #include "main/glheader.h"
31 #include "main/context.h"
32 #include "main/framebuffer.h"
33 #include "main/renderbuffer.h"
34 #include "main/hash.h"
35 #include "main/fbobject.h"
36 #include "main/mfeatures.h"
37 #include "main/version.h"
38 #include "swrast/s_renderbuffer.h"
43 PUBLIC
const char __driConfigOptions
[] =
45 DRI_CONF_SECTION_PERFORMANCE
46 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC
)
47 /* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
48 * DRI_CONF_BO_REUSE_ALL
50 DRI_CONF_OPT_BEGIN_V(bo_reuse
, enum, 1, "0:1")
51 DRI_CONF_DESC_BEGIN(en
, "Buffer object reuse")
52 DRI_CONF_ENUM(0, "Disable buffer object reuse")
53 DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")
57 DRI_CONF_OPT_BEGIN(texture_tiling
, bool, true)
58 DRI_CONF_DESC(en
, "Enable texture tiling")
61 DRI_CONF_OPT_BEGIN(hiz
, bool, true)
62 DRI_CONF_DESC(en
, "Enable Hierarchical Z on gen6+")
65 DRI_CONF_OPT_BEGIN(early_z
, bool, false)
66 DRI_CONF_DESC(en
, "Enable early Z in classic mode (unstable, 945-only).")
69 DRI_CONF_OPT_BEGIN(fragment_shader
, bool, true)
70 DRI_CONF_DESC(en
, "Enable limited ARB_fragment_shader support on 915/945.")
74 DRI_CONF_SECTION_QUALITY
75 DRI_CONF_FORCE_S3TC_ENABLE(false)
76 DRI_CONF_ALLOW_LARGE_TEXTURES(2)
78 DRI_CONF_SECTION_DEBUG
79 DRI_CONF_NO_RAST(false)
80 DRI_CONF_ALWAYS_FLUSH_BATCH(false)
81 DRI_CONF_ALWAYS_FLUSH_CACHE(false)
82 DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN(false)
83 DRI_CONF_DISABLE_GLSL_LINE_CONTINUATIONS(false)
84 DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED(false)
86 DRI_CONF_OPT_BEGIN(stub_occlusion_query
, bool, false)
87 DRI_CONF_DESC(en
, "Enable stub ARB_occlusion_query support on 915/945.")
90 DRI_CONF_OPT_BEGIN(shader_precompile
, bool, true)
91 DRI_CONF_DESC(en
, "Perform code generation at shader link time.")
96 const GLuint __driNConfigOptions
= 16;
98 #include "intel_batchbuffer.h"
99 #include "intel_buffers.h"
100 #include "intel_bufmgr.h"
101 #include "intel_chipset.h"
102 #include "intel_fbo.h"
103 #include "intel_mipmap_tree.h"
104 #include "intel_screen.h"
105 #include "intel_tex.h"
106 #include "intel_regions.h"
108 #include "i915_drm.h"
110 #ifdef USE_NEW_INTERFACE
111 static PFNGLXCREATECONTEXTMODES create_context_modes
= NULL
;
112 #endif /*USE_NEW_INTERFACE */
115 * For debugging purposes, this returns a time in seconds.
122 clock_gettime(CLOCK_MONOTONIC
, &tp
);
124 return tp
.tv_sec
+ tp
.tv_nsec
/ 1000000000.0;
128 aub_dump_bmp(struct gl_context
*ctx
)
130 struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
132 for (int i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
133 struct intel_renderbuffer
*irb
=
134 intel_renderbuffer(fb
->_ColorDrawBuffers
[i
]);
136 if (irb
&& irb
->mt
) {
137 enum aub_dump_bmp_format format
;
139 switch (irb
->Base
.Base
.Format
) {
140 case MESA_FORMAT_ARGB8888
:
141 case MESA_FORMAT_XRGB8888
:
142 format
= AUB_DUMP_BMP_FORMAT_ARGB_8888
;
148 assert(irb
->mt
->region
->pitch
% irb
->mt
->region
->cpp
== 0);
149 drm_intel_gem_bo_aub_dump_bmp(irb
->mt
->region
->bo
,
152 irb
->Base
.Base
.Width
,
153 irb
->Base
.Base
.Height
,
155 irb
->mt
->region
->pitch
,
161 static const __DRItexBufferExtension intelTexBufferExtension
= {
162 .base
= { __DRI_TEX_BUFFER
, __DRI_TEX_BUFFER_VERSION
},
164 .setTexBuffer
= intelSetTexBuffer
,
165 .setTexBuffer2
= intelSetTexBuffer2
,
166 .releaseTexBuffer
= NULL
,
170 intelDRI2Flush(__DRIdrawable
*drawable
)
172 GET_CURRENT_CONTEXT(ctx
);
173 struct intel_context
*intel
= intel_context(ctx
);
178 INTEL_FIREVERTICES(intel
);
180 intel_downsample_for_dri2_flush(intel
, drawable
);
181 intel
->need_throttle
= true;
183 if (intel
->batch
.used
)
184 intel_batchbuffer_flush(intel
);
186 if (INTEL_DEBUG
& DEBUG_AUB
) {
191 static const struct __DRI2flushExtensionRec intelFlushExtension
= {
192 .base
= { __DRI2_FLUSH
, 3 },
194 .flush
= intelDRI2Flush
,
195 .invalidate
= dri2InvalidateDrawable
,
198 static struct intel_image_format intel_image_formats
[] = {
199 { __DRI_IMAGE_FOURCC_ARGB8888
, __DRI_IMAGE_COMPONENTS_RGBA
, 1,
200 { { 0, 0, 0, __DRI_IMAGE_FORMAT_ARGB8888
, 4 } } },
202 { __DRI_IMAGE_FOURCC_XRGB8888
, __DRI_IMAGE_COMPONENTS_RGB
, 1,
203 { { 0, 0, 0, __DRI_IMAGE_FORMAT_XRGB8888
, 4 }, } },
205 { __DRI_IMAGE_FOURCC_YUV410
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
206 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
207 { 1, 2, 2, __DRI_IMAGE_FORMAT_R8
, 1 },
208 { 2, 2, 2, __DRI_IMAGE_FORMAT_R8
, 1 } } },
210 { __DRI_IMAGE_FOURCC_YUV411
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
211 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
212 { 1, 2, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
213 { 2, 2, 0, __DRI_IMAGE_FORMAT_R8
, 1 } } },
215 { __DRI_IMAGE_FOURCC_YUV420
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
216 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
217 { 1, 1, 1, __DRI_IMAGE_FORMAT_R8
, 1 },
218 { 2, 1, 1, __DRI_IMAGE_FORMAT_R8
, 1 } } },
220 { __DRI_IMAGE_FOURCC_YUV422
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
221 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
222 { 1, 1, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
223 { 2, 1, 0, __DRI_IMAGE_FORMAT_R8
, 1 } } },
225 { __DRI_IMAGE_FOURCC_YUV444
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
226 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
227 { 1, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
228 { 2, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 } } },
230 { __DRI_IMAGE_FOURCC_NV12
, __DRI_IMAGE_COMPONENTS_Y_UV
, 2,
231 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
232 { 1, 1, 1, __DRI_IMAGE_FORMAT_GR88
, 2 } } },
234 { __DRI_IMAGE_FOURCC_NV16
, __DRI_IMAGE_COMPONENTS_Y_UV
, 2,
235 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
236 { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88
, 2 } } },
238 /* For YUYV buffers, we set up two overlapping DRI images and treat
239 * them as planar buffers in the compositors. Plane 0 is GR88 and
240 * samples YU or YV pairs and places Y into the R component, while
241 * plane 1 is ARGB and samples YUYV clusters and places pairs and
242 * places U into the G component and V into A. This lets the
243 * texture sampler interpolate the Y components correctly when
244 * sampling from plane 0, and interpolate U and V correctly when
245 * sampling from plane 1. */
246 { __DRI_IMAGE_FOURCC_YUYV
, __DRI_IMAGE_COMPONENTS_Y_XUXV
, 2,
247 { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88
, 2 },
248 { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB8888
, 4 } } }
252 intel_allocate_image(int dri_format
, void *loaderPrivate
)
256 image
= calloc(1, sizeof *image
);
260 image
->dri_format
= dri_format
;
263 switch (dri_format
) {
264 case __DRI_IMAGE_FORMAT_RGB565
:
265 image
->format
= MESA_FORMAT_RGB565
;
267 case __DRI_IMAGE_FORMAT_XRGB8888
:
268 image
->format
= MESA_FORMAT_XRGB8888
;
270 case __DRI_IMAGE_FORMAT_ARGB8888
:
271 image
->format
= MESA_FORMAT_ARGB8888
;
273 case __DRI_IMAGE_FORMAT_ABGR8888
:
274 image
->format
= MESA_FORMAT_RGBA8888_REV
;
276 case __DRI_IMAGE_FORMAT_XBGR8888
:
277 image
->format
= MESA_FORMAT_RGBX8888_REV
;
279 case __DRI_IMAGE_FORMAT_R8
:
280 image
->format
= MESA_FORMAT_R8
;
282 case __DRI_IMAGE_FORMAT_GR88
:
283 image
->format
= MESA_FORMAT_GR88
;
285 case __DRI_IMAGE_FORMAT_NONE
:
286 image
->format
= MESA_FORMAT_NONE
;
293 image
->internal_format
= _mesa_get_format_base_format(image
->format
);
294 image
->data
= loaderPrivate
;
300 intel_create_image_from_name(__DRIscreen
*screen
,
301 int width
, int height
, int format
,
302 int name
, int pitch
, void *loaderPrivate
)
304 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
308 image
= intel_allocate_image(format
, loaderPrivate
);
309 if (image
->format
== MESA_FORMAT_NONE
)
312 cpp
= _mesa_get_format_bytes(image
->format
);
313 image
->region
= intel_region_alloc_for_handle(intelScreen
,
315 pitch
, name
, "image");
316 if (image
->region
== NULL
) {
325 intel_create_image_from_renderbuffer(__DRIcontext
*context
,
326 int renderbuffer
, void *loaderPrivate
)
329 struct intel_context
*intel
= context
->driverPrivate
;
330 struct gl_renderbuffer
*rb
;
331 struct intel_renderbuffer
*irb
;
333 rb
= _mesa_lookup_renderbuffer(&intel
->ctx
, renderbuffer
);
335 _mesa_error(&intel
->ctx
,
336 GL_INVALID_OPERATION
, "glRenderbufferExternalMESA");
340 irb
= intel_renderbuffer(rb
);
341 image
= calloc(1, sizeof *image
);
345 image
->internal_format
= rb
->InternalFormat
;
346 image
->format
= rb
->Format
;
348 image
->data
= loaderPrivate
;
349 intel_region_reference(&image
->region
, irb
->mt
->region
);
351 switch (image
->format
) {
352 case MESA_FORMAT_RGB565
:
353 image
->dri_format
= __DRI_IMAGE_FORMAT_RGB565
;
355 case MESA_FORMAT_XRGB8888
:
356 image
->dri_format
= __DRI_IMAGE_FORMAT_XRGB8888
;
358 case MESA_FORMAT_ARGB8888
:
359 image
->dri_format
= __DRI_IMAGE_FORMAT_ARGB8888
;
361 case MESA_FORMAT_RGBA8888_REV
:
362 image
->dri_format
= __DRI_IMAGE_FORMAT_ABGR8888
;
365 image
->dri_format
= __DRI_IMAGE_FORMAT_R8
;
367 case MESA_FORMAT_RG88
:
368 image
->dri_format
= __DRI_IMAGE_FORMAT_GR88
;
376 intel_destroy_image(__DRIimage
*image
)
378 intel_region_release(&image
->region
);
383 intel_create_image(__DRIscreen
*screen
,
384 int width
, int height
, int format
,
389 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
393 tiling
= I915_TILING_X
;
394 if (use
& __DRI_IMAGE_USE_CURSOR
) {
395 if (width
!= 64 || height
!= 64)
397 tiling
= I915_TILING_NONE
;
400 image
= intel_allocate_image(format
, loaderPrivate
);
401 cpp
= _mesa_get_format_bytes(image
->format
);
403 intel_region_alloc(intelScreen
, tiling
, cpp
, width
, height
, true);
404 if (image
->region
== NULL
) {
413 intel_query_image(__DRIimage
*image
, int attrib
, int *value
)
416 case __DRI_IMAGE_ATTRIB_STRIDE
:
417 *value
= image
->region
->pitch
;
419 case __DRI_IMAGE_ATTRIB_HANDLE
:
420 *value
= image
->region
->bo
->handle
;
422 case __DRI_IMAGE_ATTRIB_NAME
:
423 return intel_region_flink(image
->region
, (uint32_t *) value
);
424 case __DRI_IMAGE_ATTRIB_FORMAT
:
425 *value
= image
->dri_format
;
427 case __DRI_IMAGE_ATTRIB_WIDTH
:
428 *value
= image
->region
->width
;
430 case __DRI_IMAGE_ATTRIB_HEIGHT
:
431 *value
= image
->region
->height
;
433 case __DRI_IMAGE_ATTRIB_COMPONENTS
:
434 if (image
->planar_format
== NULL
)
436 *value
= image
->planar_format
->components
;
444 intel_dup_image(__DRIimage
*orig_image
, void *loaderPrivate
)
448 image
= calloc(1, sizeof *image
);
452 intel_region_reference(&image
->region
, orig_image
->region
);
453 if (image
->region
== NULL
) {
458 image
->internal_format
= orig_image
->internal_format
;
459 image
->planar_format
= orig_image
->planar_format
;
460 image
->dri_format
= orig_image
->dri_format
;
461 image
->format
= orig_image
->format
;
462 image
->offset
= orig_image
->offset
;
463 image
->data
= loaderPrivate
;
465 memcpy(image
->strides
, orig_image
->strides
, sizeof(image
->strides
));
466 memcpy(image
->offsets
, orig_image
->offsets
, sizeof(image
->offsets
));
472 intel_validate_usage(__DRIimage
*image
, unsigned int use
)
474 if (use
& __DRI_IMAGE_USE_CURSOR
) {
475 if (image
->region
->width
!= 64 || image
->region
->height
!= 64)
483 intel_create_image_from_names(__DRIscreen
*screen
,
484 int width
, int height
, int fourcc
,
485 int *names
, int num_names
,
486 int *strides
, int *offsets
,
489 struct intel_image_format
*f
= NULL
;
493 if (screen
== NULL
|| names
== NULL
|| num_names
!= 1)
496 for (i
= 0; i
< ARRAY_SIZE(intel_image_formats
); i
++) {
497 if (intel_image_formats
[i
].fourcc
== fourcc
) {
498 f
= &intel_image_formats
[i
];
505 image
= intel_create_image_from_name(screen
, width
, height
,
506 __DRI_IMAGE_FORMAT_NONE
,
507 names
[0], strides
[0],
513 image
->planar_format
= f
;
514 for (i
= 0; i
< f
->nplanes
; i
++) {
515 index
= f
->planes
[i
].buffer_index
;
516 image
->offsets
[index
] = offsets
[index
];
517 image
->strides
[index
] = strides
[index
];
524 intel_from_planar(__DRIimage
*parent
, int plane
, void *loaderPrivate
)
526 int width
, height
, offset
, stride
, dri_format
, index
;
527 struct intel_image_format
*f
;
528 uint32_t mask_x
, mask_y
;
531 if (parent
== NULL
|| parent
->planar_format
== NULL
)
534 f
= parent
->planar_format
;
536 if (plane
>= f
->nplanes
)
539 width
= parent
->region
->width
>> f
->planes
[plane
].width_shift
;
540 height
= parent
->region
->height
>> f
->planes
[plane
].height_shift
;
541 dri_format
= f
->planes
[plane
].dri_format
;
542 index
= f
->planes
[plane
].buffer_index
;
543 offset
= parent
->offsets
[index
];
544 stride
= parent
->strides
[index
];
546 image
= intel_allocate_image(dri_format
, loaderPrivate
);
547 if (offset
+ height
* stride
> parent
->region
->bo
->size
) {
548 _mesa_warning(NULL
, "intel_create_sub_image: subimage out of bounds");
553 image
->region
= calloc(sizeof(*image
->region
), 1);
554 if (image
->region
== NULL
) {
559 image
->region
->cpp
= _mesa_get_format_bytes(image
->format
);
560 image
->region
->width
= width
;
561 image
->region
->height
= height
;
562 image
->region
->pitch
= stride
;
563 image
->region
->refcount
= 1;
564 image
->region
->bo
= parent
->region
->bo
;
565 drm_intel_bo_reference(image
->region
->bo
);
566 image
->region
->tiling
= parent
->region
->tiling
;
567 image
->region
->screen
= parent
->region
->screen
;
568 image
->offset
= offset
;
570 intel_region_get_tile_masks(image
->region
, &mask_x
, &mask_y
, false);
573 "intel_create_sub_image: offset not on tile boundary");
578 static struct __DRIimageExtensionRec intelImageExtension
= {
579 .base
= { __DRI_IMAGE
, 5 },
581 .createImageFromName
= intel_create_image_from_name
,
582 .createImageFromRenderbuffer
= intel_create_image_from_renderbuffer
,
583 .destroyImage
= intel_destroy_image
,
584 .createImage
= intel_create_image
,
585 .queryImage
= intel_query_image
,
586 .dupImage
= intel_dup_image
,
587 .validateUsage
= intel_validate_usage
,
588 .createImageFromNames
= intel_create_image_from_names
,
589 .fromPlanar
= intel_from_planar
592 static const __DRIextension
*intelScreenExtensions
[] = {
593 &intelTexBufferExtension
.base
,
594 &intelFlushExtension
.base
,
595 &intelImageExtension
.base
,
596 &dri2ConfigQueryExtension
.base
,
601 intel_get_param(__DRIscreen
*psp
, int param
, int *value
)
604 struct drm_i915_getparam gp
;
606 memset(&gp
, 0, sizeof(gp
));
610 ret
= drmCommandWriteRead(psp
->fd
, DRM_I915_GETPARAM
, &gp
, sizeof(gp
));
613 _mesa_warning(NULL
, "drm_i915_getparam: %d", ret
);
621 intel_get_boolean(__DRIscreen
*psp
, int param
)
624 return intel_get_param(psp
, param
, &value
) && value
;
628 nop_callback(GLuint key
, void *data
, void *userData
)
633 intelDestroyScreen(__DRIscreen
* sPriv
)
635 struct intel_screen
*intelScreen
= sPriv
->driverPrivate
;
637 dri_bufmgr_destroy(intelScreen
->bufmgr
);
638 driDestroyOptionInfo(&intelScreen
->optionCache
);
640 /* Some regions may still have references to them at this point, so
641 * flush the hash table to prevent _mesa_DeleteHashTable() from
642 * complaining about the hash not being empty; */
643 _mesa_HashDeleteAll(intelScreen
->named_regions
, nop_callback
, NULL
);
644 _mesa_DeleteHashTable(intelScreen
->named_regions
);
647 sPriv
->driverPrivate
= NULL
;
652 * This is called when we need to set up GL rendering to a new X window.
655 intelCreateBuffer(__DRIscreen
* driScrnPriv
,
656 __DRIdrawable
* driDrawPriv
,
657 const struct gl_config
* mesaVis
, GLboolean isPixmap
)
659 struct intel_renderbuffer
*rb
;
660 struct intel_screen
*screen
= (struct intel_screen
*) driScrnPriv
->driverPrivate
;
662 unsigned num_samples
= intel_quantize_num_samples(screen
, mesaVis
->samples
);
663 struct gl_framebuffer
*fb
;
668 fb
= CALLOC_STRUCT(gl_framebuffer
);
672 _mesa_initialize_window_framebuffer(fb
, mesaVis
);
674 if (mesaVis
->redBits
== 5)
675 rgbFormat
= MESA_FORMAT_RGB565
;
676 else if (mesaVis
->sRGBCapable
)
677 rgbFormat
= MESA_FORMAT_SARGB8
;
678 else if (mesaVis
->alphaBits
== 0)
679 rgbFormat
= MESA_FORMAT_XRGB8888
;
681 rgbFormat
= MESA_FORMAT_ARGB8888
;
683 /* setup the hardware-based renderbuffers */
684 rb
= intel_create_renderbuffer(rgbFormat
, num_samples
);
685 _mesa_add_renderbuffer(fb
, BUFFER_FRONT_LEFT
, &rb
->Base
.Base
);
687 if (mesaVis
->doubleBufferMode
) {
688 rb
= intel_create_renderbuffer(rgbFormat
, num_samples
);
689 _mesa_add_renderbuffer(fb
, BUFFER_BACK_LEFT
, &rb
->Base
.Base
);
693 * Assert here that the gl_config has an expected depth/stencil bit
694 * combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(),
695 * which constructs the advertised configs.)
697 if (mesaVis
->depthBits
== 24) {
698 assert(mesaVis
->stencilBits
== 8);
700 if (screen
->hw_has_separate_stencil
) {
701 rb
= intel_create_private_renderbuffer(MESA_FORMAT_X8_Z24
,
703 _mesa_add_renderbuffer(fb
, BUFFER_DEPTH
, &rb
->Base
.Base
);
704 rb
= intel_create_private_renderbuffer(MESA_FORMAT_S8
,
706 _mesa_add_renderbuffer(fb
, BUFFER_STENCIL
, &rb
->Base
.Base
);
709 * Use combined depth/stencil. Note that the renderbuffer is
710 * attached to two attachment points.
712 rb
= intel_create_private_renderbuffer(MESA_FORMAT_S8_Z24
,
714 _mesa_add_renderbuffer(fb
, BUFFER_DEPTH
, &rb
->Base
.Base
);
715 _mesa_add_renderbuffer(fb
, BUFFER_STENCIL
, &rb
->Base
.Base
);
718 else if (mesaVis
->depthBits
== 16) {
719 assert(mesaVis
->stencilBits
== 0);
720 rb
= intel_create_private_renderbuffer(MESA_FORMAT_Z16
,
722 _mesa_add_renderbuffer(fb
, BUFFER_DEPTH
, &rb
->Base
.Base
);
725 assert(mesaVis
->depthBits
== 0);
726 assert(mesaVis
->stencilBits
== 0);
729 /* now add any/all software-based renderbuffers we may need */
730 _swrast_add_soft_renderbuffers(fb
,
731 false, /* never sw color */
732 false, /* never sw depth */
733 false, /* never sw stencil */
734 mesaVis
->accumRedBits
> 0,
735 false, /* never sw alpha */
736 false /* never sw aux */ );
737 driDrawPriv
->driverPrivate
= fb
;
743 intelDestroyBuffer(__DRIdrawable
* driDrawPriv
)
745 struct gl_framebuffer
*fb
= driDrawPriv
->driverPrivate
;
747 _mesa_reference_framebuffer(&fb
, NULL
);
750 /* There are probably better ways to do this, such as an
751 * init-designated function to register chipids and createcontext
755 i830CreateContext(int api
,
756 const struct gl_config
*mesaVis
,
757 __DRIcontext
*driContextPriv
,
758 unsigned major_version
,
759 unsigned minor_version
,
761 void *sharedContextPrivate
);
764 i915CreateContext(int api
,
765 const struct gl_config
*mesaVis
,
766 __DRIcontext
*driContextPriv
,
767 unsigned major_version
,
768 unsigned minor_version
,
770 void *sharedContextPrivate
);
772 brwCreateContext(int api
,
773 const struct gl_config
*mesaVis
,
774 __DRIcontext
*driContextPriv
,
775 unsigned major_version
,
776 unsigned minor_version
,
779 void *sharedContextPrivate
);
782 intelCreateContext(gl_api api
,
783 const struct gl_config
* mesaVis
,
784 __DRIcontext
* driContextPriv
,
785 unsigned major_version
,
786 unsigned minor_version
,
789 void *sharedContextPrivate
)
791 bool success
= false;
794 __DRIscreen
*sPriv
= driContextPriv
->driScreenPriv
;
795 struct intel_screen
*intelScreen
= sPriv
->driverPrivate
;
797 if (IS_9XX(intelScreen
->deviceID
)) {
798 success
= i915CreateContext(api
, mesaVis
, driContextPriv
,
799 major_version
, minor_version
, error
,
800 sharedContextPrivate
);
802 intelScreen
->no_vbo
= true;
803 success
= i830CreateContext(api
, mesaVis
, driContextPriv
,
804 major_version
, minor_version
, error
,
805 sharedContextPrivate
);
808 success
= brwCreateContext(api
, mesaVis
,
810 major_version
, minor_version
, flags
,
811 error
, sharedContextPrivate
);
817 if (driContextPriv
->driverPrivate
!= NULL
)
818 intelDestroyContext(driContextPriv
);
824 intel_init_bufmgr(struct intel_screen
*intelScreen
)
826 __DRIscreen
*spriv
= intelScreen
->driScrnPriv
;
829 intelScreen
->no_hw
= getenv("INTEL_NO_HW") != NULL
;
831 intelScreen
->bufmgr
= intel_bufmgr_gem_init(spriv
->fd
, BATCH_SZ
);
832 if (intelScreen
->bufmgr
== NULL
) {
833 fprintf(stderr
, "[%s:%u] Error initializing buffer manager.\n",
838 if (!intel_get_param(spriv
, I915_PARAM_NUM_FENCES_AVAIL
, &num_fences
) ||
840 fprintf(stderr
, "[%s: %u] Kernel 2.6.29 required.\n", __func__
, __LINE__
);
844 drm_intel_bufmgr_gem_enable_fenced_relocs(intelScreen
->bufmgr
);
846 intelScreen
->named_regions
= _mesa_NewHashTable();
848 intelScreen
->relaxed_relocations
= 0;
849 intelScreen
->relaxed_relocations
|=
850 intel_get_boolean(spriv
, I915_PARAM_HAS_RELAXED_DELTA
) << 0;
856 * Override intel_screen.hw_has_separate_stencil with environment variable
857 * INTEL_SEPARATE_STENCIL.
859 * Valid values for INTEL_SEPARATE_STENCIL are "0" and "1". If an invalid
860 * valid value is encountered, a warning is emitted and INTEL_SEPARATE_STENCIL
864 intel_override_separate_stencil(struct intel_screen
*screen
)
866 const char *s
= getenv("INTEL_SEPARATE_STENCIL");
869 } else if (!strncmp("0", s
, 2)) {
870 screen
->hw_has_separate_stencil
= false;
871 } else if (!strncmp("1", s
, 2)) {
872 screen
->hw_has_separate_stencil
= true;
875 "warning: env variable INTEL_SEPARATE_STENCIL=\"%s\" has "
876 "invalid value and is ignored", s
);
881 intel_detect_swizzling(struct intel_screen
*screen
)
883 drm_intel_bo
*buffer
;
884 unsigned long flags
= 0;
885 unsigned long aligned_pitch
;
886 uint32_t tiling
= I915_TILING_X
;
887 uint32_t swizzle_mode
= 0;
889 buffer
= drm_intel_bo_alloc_tiled(screen
->bufmgr
, "swizzle test",
891 &tiling
, &aligned_pitch
, flags
);
895 drm_intel_bo_get_tiling(buffer
, &tiling
, &swizzle_mode
);
896 drm_intel_bo_unreference(buffer
);
898 if (swizzle_mode
== I915_BIT_6_SWIZZLE_NONE
)
905 intel_screen_make_configs(__DRIscreen
*dri_screen
)
907 static const gl_format formats
[3] = {
909 MESA_FORMAT_XRGB8888
,
913 /* GLX_SWAP_COPY_OML is not supported due to page flipping. */
914 static const GLenum back_buffer_modes
[] = {
915 GLX_SWAP_UNDEFINED_OML
, GLX_NONE
,
918 static const uint8_t singlesample_samples
[1] = {0};
919 static const uint8_t multisample_samples
[2] = {4, 8};
921 struct intel_screen
*screen
= dri_screen
->driverPrivate
;
922 uint8_t depth_bits
[4], stencil_bits
[4];
923 __DRIconfig
**configs
= NULL
;
925 /* Generate singlesample configs without accumulation buffer. */
926 for (int i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
927 __DRIconfig
**new_configs
;
928 int num_depth_stencil_bits
= 2;
930 /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
931 * buffer that has a different number of bits per pixel than the color
932 * buffer, gen >= 6 supports this.
937 if (formats
[i
] == MESA_FORMAT_RGB565
) {
940 if (screen
->gen
>= 6) {
943 num_depth_stencil_bits
= 3;
950 new_configs
= driCreateConfigs(formats
[i
],
953 num_depth_stencil_bits
,
954 back_buffer_modes
, 2,
955 singlesample_samples
, 1,
957 configs
= driConcatConfigs(configs
, new_configs
);
960 /* Generate the minimum possible set of configs that include an
961 * accumulation buffer.
963 for (int i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
964 __DRIconfig
**new_configs
;
966 if (formats
[i
] == MESA_FORMAT_RGB565
) {
974 new_configs
= driCreateConfigs(formats
[i
],
975 depth_bits
, stencil_bits
, 1,
976 back_buffer_modes
, 1,
977 singlesample_samples
, 1,
979 configs
= driConcatConfigs(configs
, new_configs
);
982 /* Generate multisample configs.
984 * This loop breaks early, and hence is a no-op, on gen < 6.
986 * Multisample configs must follow the singlesample configs in order to
987 * work around an X server bug present in 1.12. The X server chooses to
988 * associate the first listed RGBA888-Z24S8 config, regardless of its
989 * sample count, with the 32-bit depth visual used for compositing.
991 * Only doublebuffer configs with GLX_SWAP_UNDEFINED_OML behavior are
992 * supported. Singlebuffer configs are not supported because no one wants
995 for (int i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
999 __DRIconfig
**new_configs
;
1000 const int num_depth_stencil_bits
= 2;
1001 int num_msaa_modes
= 0;
1004 stencil_bits
[0] = 0;
1006 if (formats
[i
] == MESA_FORMAT_RGB565
) {
1008 stencil_bits
[1] = 0;
1011 stencil_bits
[1] = 8;
1014 if (screen
->gen
>= 7)
1016 else if (screen
->gen
== 6)
1019 new_configs
= driCreateConfigs(formats
[i
],
1022 num_depth_stencil_bits
,
1023 back_buffer_modes
, 1,
1024 multisample_samples
,
1027 configs
= driConcatConfigs(configs
, new_configs
);
1030 if (configs
== NULL
) {
1031 fprintf(stderr
, "[%s:%u] Error creating FBConfig!\n", __func__
,
1040 set_max_gl_versions(struct intel_screen
*screen
)
1042 #ifdef TEXTURE_FLOAT_ENABLED
1043 bool has_texture_float
= true;
1045 bool has_texture_float
= false;
1048 switch (screen
->gen
) {
1050 if (has_texture_float
&& screen
->kernel_has_gen7_sol_reset
) {
1051 screen
->max_gl_core_version
= 31;
1052 screen
->max_gl_compat_version
= 30;
1053 screen
->max_gl_es1_version
= 11;
1054 screen
->max_gl_es2_version
= 20;
1056 screen
->max_gl_core_version
= 0;
1057 screen
->max_gl_compat_version
= 21;
1058 screen
->max_gl_es1_version
= 11;
1059 screen
->max_gl_es2_version
= 20;
1063 if (has_texture_float
) {
1064 screen
->max_gl_core_version
= 31;
1065 screen
->max_gl_compat_version
= 30;
1066 screen
->max_gl_es1_version
= 11;
1067 screen
->max_gl_es2_version
= 20;
1069 screen
->max_gl_core_version
= 0;
1070 screen
->max_gl_compat_version
= 21;
1071 screen
->max_gl_es1_version
= 11;
1072 screen
->max_gl_es2_version
= 20;
1077 screen
->max_gl_core_version
= 0;
1078 screen
->max_gl_compat_version
= 21;
1079 screen
->max_gl_es1_version
= 11;
1080 screen
->max_gl_es2_version
= 20;
1083 bool has_fragment_shader
= driQueryOptionb(&screen
->optionCache
, "fragment_shader");
1084 bool has_occlusion_query
= driQueryOptionb(&screen
->optionCache
, "stub_occlusion_query");
1086 screen
->max_gl_core_version
= 0;
1087 screen
->max_gl_es1_version
= 11;
1089 if (has_fragment_shader
&& has_occlusion_query
) {
1090 screen
->max_gl_compat_version
= 21;
1092 screen
->max_gl_compat_version
= 14;
1095 if (has_fragment_shader
) {
1096 screen
->max_gl_es2_version
= 20;
1098 screen
->max_gl_es2_version
= 0;
1104 screen
->max_gl_core_version
= 0;
1105 screen
->max_gl_compat_version
= 13;
1106 screen
->max_gl_es1_version
= 11;
1107 screen
->max_gl_es2_version
= 0;
1110 assert(!"unrecognized intel_screen::gen");
1115 screen
->max_gl_es1_version
= 0;
1119 screen
->max_gl_es2_version
= 0;
1124 * This is the driver specific part of the createNewScreen entry point.
1125 * Called when using DRI2.
1127 * \return the struct gl_config supported by this driver
1130 __DRIconfig
**intelInitScreen2(__DRIscreen
*psp
)
1132 struct intel_screen
*intelScreen
;
1134 if (psp
->dri2
.loader
->base
.version
<= 2 ||
1135 psp
->dri2
.loader
->getBuffersWithFormat
== NULL
) {
1137 "\nERROR! DRI2 loader with getBuffersWithFormat() "
1138 "support required\n");
1142 /* Allocate the private area */
1143 intelScreen
= calloc(1, sizeof *intelScreen
);
1145 fprintf(stderr
, "\nERROR! Allocating private area failed\n");
1148 /* parse information in __driConfigOptions */
1149 driParseOptionInfo(&intelScreen
->optionCache
,
1150 __driConfigOptions
, __driNConfigOptions
);
1152 intelScreen
->driScrnPriv
= psp
;
1153 psp
->driverPrivate
= (void *) intelScreen
;
1155 if (!intel_init_bufmgr(intelScreen
))
1158 intelScreen
->deviceID
= drm_intel_bufmgr_gem_get_devid(intelScreen
->bufmgr
);
1160 intelScreen
->kernel_has_gen7_sol_reset
=
1161 intel_get_boolean(intelScreen
->driScrnPriv
,
1162 I915_PARAM_HAS_GEN7_SOL_RESET
);
1164 if (IS_GEN7(intelScreen
->deviceID
)) {
1165 intelScreen
->gen
= 7;
1166 } else if (IS_GEN6(intelScreen
->deviceID
)) {
1167 intelScreen
->gen
= 6;
1168 } else if (IS_GEN5(intelScreen
->deviceID
)) {
1169 intelScreen
->gen
= 5;
1170 } else if (IS_965(intelScreen
->deviceID
)) {
1171 intelScreen
->gen
= 4;
1172 } else if (IS_9XX(intelScreen
->deviceID
)) {
1173 intelScreen
->gen
= 3;
1175 intelScreen
->gen
= 2;
1178 intelScreen
->hw_has_separate_stencil
= intelScreen
->gen
>= 6;
1179 intelScreen
->hw_must_use_separate_stencil
= intelScreen
->gen
>= 7;
1182 bool success
= intel_get_param(intelScreen
->driScrnPriv
, I915_PARAM_HAS_LLC
,
1184 if (success
&& has_llc
)
1185 intelScreen
->hw_has_llc
= true;
1186 else if (!success
&& intelScreen
->gen
>= 6)
1187 intelScreen
->hw_has_llc
= true;
1189 intel_override_separate_stencil(intelScreen
);
1191 intelScreen
->hw_has_swizzling
= intel_detect_swizzling(intelScreen
);
1193 set_max_gl_versions(intelScreen
);
1195 psp
->api_mask
= (1 << __DRI_API_OPENGL
);
1196 if (intelScreen
->max_gl_es1_version
> 0)
1197 psp
->api_mask
|= (1 << __DRI_API_GLES
);
1198 if (intelScreen
->max_gl_es2_version
> 0)
1199 psp
->api_mask
|= (1 << __DRI_API_GLES2
);
1200 if (intelScreen
->max_gl_es2_version
>= 30)
1201 psp
->api_mask
|= (1 << __DRI_API_GLES3
);
1203 psp
->extensions
= intelScreenExtensions
;
1205 return (const __DRIconfig
**) intel_screen_make_configs(psp
);
1208 struct intel_buffer
{
1210 struct intel_region
*region
;
1213 static __DRIbuffer
*
1214 intelAllocateBuffer(__DRIscreen
*screen
,
1215 unsigned attachment
, unsigned format
,
1216 int width
, int height
)
1218 struct intel_buffer
*intelBuffer
;
1219 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
1221 assert(attachment
== __DRI_BUFFER_FRONT_LEFT
||
1222 attachment
== __DRI_BUFFER_BACK_LEFT
);
1224 intelBuffer
= calloc(1, sizeof *intelBuffer
);
1225 if (intelBuffer
== NULL
)
1228 /* The front and back buffers are color buffers, which are X tiled. */
1229 intelBuffer
->region
= intel_region_alloc(intelScreen
,
1236 if (intelBuffer
->region
== NULL
) {
1241 intel_region_flink(intelBuffer
->region
, &intelBuffer
->base
.name
);
1243 intelBuffer
->base
.attachment
= attachment
;
1244 intelBuffer
->base
.cpp
= intelBuffer
->region
->cpp
;
1245 intelBuffer
->base
.pitch
= intelBuffer
->region
->pitch
;
1247 return &intelBuffer
->base
;
1251 intelReleaseBuffer(__DRIscreen
*screen
, __DRIbuffer
*buffer
)
1253 struct intel_buffer
*intelBuffer
= (struct intel_buffer
*) buffer
;
1255 intel_region_release(&intelBuffer
->region
);
1260 const struct __DriverAPIRec driDriverAPI
= {
1261 .InitScreen
= intelInitScreen2
,
1262 .DestroyScreen
= intelDestroyScreen
,
1263 .CreateContext
= intelCreateContext
,
1264 .DestroyContext
= intelDestroyContext
,
1265 .CreateBuffer
= intelCreateBuffer
,
1266 .DestroyBuffer
= intelDestroyBuffer
,
1267 .MakeCurrent
= intelMakeCurrent
,
1268 .UnbindContext
= intelUnbindContext
,
1269 .AllocateBuffer
= intelAllocateBuffer
,
1270 .ReleaseBuffer
= intelReleaseBuffer
1273 /* This is the table of extensions that the loader will dlsym() for. */
1274 PUBLIC
const __DRIextension
*__driDriverExtensions
[] = {
1275 &driCoreExtension
.base
,
1276 &driDRI2Extension
.base
,