intel: Remove the texture_tiling driconf option.
[mesa.git] / src / mesa / drivers / dri / intel / intel_screen.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include <errno.h>
29 #include <time.h>
30 #include "main/glheader.h"
31 #include "main/context.h"
32 #include "main/framebuffer.h"
33 #include "main/renderbuffer.h"
34 #include "main/texobj.h"
35 #include "main/hash.h"
36 #include "main/fbobject.h"
37 #include "main/mfeatures.h"
38 #include "main/version.h"
39 #include "swrast/s_renderbuffer.h"
40
41 #include "utils.h"
42 #include "xmlpool.h"
43
44 PUBLIC const char __driConfigOptions[] =
45 DRI_CONF_BEGIN
46 DRI_CONF_SECTION_PERFORMANCE
47 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC)
48 /* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
49 * DRI_CONF_BO_REUSE_ALL
50 */
51 DRI_CONF_OPT_BEGIN_V(bo_reuse, enum, 1, "0:1")
52 DRI_CONF_DESC_BEGIN(en, "Buffer object reuse")
53 DRI_CONF_ENUM(0, "Disable buffer object reuse")
54 DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")
55 DRI_CONF_DESC_END
56 DRI_CONF_OPT_END
57
58 DRI_CONF_OPT_BEGIN(hiz, bool, true)
59 DRI_CONF_DESC(en, "Enable Hierarchical Z on gen6+")
60 DRI_CONF_OPT_END
61
62 DRI_CONF_OPT_BEGIN(early_z, bool, false)
63 DRI_CONF_DESC(en, "Enable early Z in classic mode (unstable, 945-only).")
64 DRI_CONF_OPT_END
65
66 DRI_CONF_OPT_BEGIN(fragment_shader, bool, true)
67 DRI_CONF_DESC(en, "Enable limited ARB_fragment_shader support on 915/945.")
68 DRI_CONF_OPT_END
69
70 DRI_CONF_SECTION_END
71 DRI_CONF_SECTION_QUALITY
72 DRI_CONF_FORCE_S3TC_ENABLE(false)
73 DRI_CONF_ALLOW_LARGE_TEXTURES(2)
74 DRI_CONF_SECTION_END
75 DRI_CONF_SECTION_DEBUG
76 DRI_CONF_NO_RAST(false)
77 DRI_CONF_ALWAYS_FLUSH_BATCH(false)
78 DRI_CONF_ALWAYS_FLUSH_CACHE(false)
79 DRI_CONF_DISABLE_THROTTLING(false)
80 DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN(false)
81 DRI_CONF_DISABLE_GLSL_LINE_CONTINUATIONS(false)
82 DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED(false)
83
84 DRI_CONF_OPT_BEGIN(stub_occlusion_query, bool, false)
85 DRI_CONF_DESC(en, "Enable stub ARB_occlusion_query support on 915/945.")
86 DRI_CONF_OPT_END
87
88 DRI_CONF_OPT_BEGIN(shader_precompile, bool, true)
89 DRI_CONF_DESC(en, "Perform code generation at shader link time.")
90 DRI_CONF_OPT_END
91 DRI_CONF_SECTION_END
92 DRI_CONF_END;
93
94 const GLuint __driNConfigOptions = 16;
95
96 #include "intel_batchbuffer.h"
97 #include "intel_buffers.h"
98 #include "intel_bufmgr.h"
99 #include "intel_chipset.h"
100 #include "intel_fbo.h"
101 #include "intel_mipmap_tree.h"
102 #include "intel_screen.h"
103 #include "intel_tex.h"
104 #include "intel_regions.h"
105
106 #ifndef I915
107 #include "brw_context.h"
108 #endif
109
110 #include "i915_drm.h"
111
112 #ifdef USE_NEW_INTERFACE
113 static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
114 #endif /*USE_NEW_INTERFACE */
115
116 /**
117 * For debugging purposes, this returns a time in seconds.
118 */
119 double
120 get_time(void)
121 {
122 struct timespec tp;
123
124 clock_gettime(CLOCK_MONOTONIC, &tp);
125
126 return tp.tv_sec + tp.tv_nsec / 1000000000.0;
127 }
128
129 void
130 aub_dump_bmp(struct gl_context *ctx)
131 {
132 struct gl_framebuffer *fb = ctx->DrawBuffer;
133
134 for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
135 struct intel_renderbuffer *irb =
136 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
137
138 if (irb && irb->mt) {
139 enum aub_dump_bmp_format format;
140
141 switch (irb->Base.Base.Format) {
142 case MESA_FORMAT_ARGB8888:
143 case MESA_FORMAT_XRGB8888:
144 format = AUB_DUMP_BMP_FORMAT_ARGB_8888;
145 break;
146 default:
147 continue;
148 }
149
150 assert(irb->mt->region->pitch % irb->mt->region->cpp == 0);
151 drm_intel_gem_bo_aub_dump_bmp(irb->mt->region->bo,
152 irb->draw_x,
153 irb->draw_y,
154 irb->Base.Base.Width,
155 irb->Base.Base.Height,
156 format,
157 irb->mt->region->pitch,
158 0);
159 }
160 }
161 }
162
163 static const __DRItexBufferExtension intelTexBufferExtension = {
164 .base = { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
165
166 .setTexBuffer = intelSetTexBuffer,
167 .setTexBuffer2 = intelSetTexBuffer2,
168 .releaseTexBuffer = NULL,
169 };
170
171 static void
172 intelDRI2Flush(__DRIdrawable *drawable)
173 {
174 GET_CURRENT_CONTEXT(ctx);
175 struct intel_context *intel = intel_context(ctx);
176 if (intel == NULL)
177 return;
178
179 if (intel->gen < 4)
180 INTEL_FIREVERTICES(intel);
181
182 intel_downsample_for_dri2_flush(intel, drawable);
183 intel->need_throttle = true;
184
185 if (intel->batch.used)
186 intel_batchbuffer_flush(intel);
187
188 if (INTEL_DEBUG & DEBUG_AUB) {
189 aub_dump_bmp(ctx);
190 }
191 }
192
193 static const struct __DRI2flushExtensionRec intelFlushExtension = {
194 .base = { __DRI2_FLUSH, 3 },
195
196 .flush = intelDRI2Flush,
197 .invalidate = dri2InvalidateDrawable,
198 };
199
200 static struct intel_image_format intel_image_formats[] = {
201 { __DRI_IMAGE_FOURCC_ARGB8888, __DRI_IMAGE_COMPONENTS_RGBA, 1,
202 { { 0, 0, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } },
203
204 { __DRI_IMAGE_FOURCC_XRGB8888, __DRI_IMAGE_COMPONENTS_RGB, 1,
205 { { 0, 0, 0, __DRI_IMAGE_FORMAT_XRGB8888, 4 }, } },
206
207 { __DRI_IMAGE_FOURCC_YUV410, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
208 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
209 { 1, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 },
210 { 2, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 } } },
211
212 { __DRI_IMAGE_FOURCC_YUV411, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
213 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
214 { 1, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 },
215 { 2, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
216
217 { __DRI_IMAGE_FOURCC_YUV420, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
218 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
219 { 1, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 },
220 { 2, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 } } },
221
222 { __DRI_IMAGE_FOURCC_YUV422, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
223 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
224 { 1, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 },
225 { 2, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
226
227 { __DRI_IMAGE_FOURCC_YUV444, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
228 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
229 { 1, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
230 { 2, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
231
232 { __DRI_IMAGE_FOURCC_NV12, __DRI_IMAGE_COMPONENTS_Y_UV, 2,
233 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
234 { 1, 1, 1, __DRI_IMAGE_FORMAT_GR88, 2 } } },
235
236 { __DRI_IMAGE_FOURCC_NV16, __DRI_IMAGE_COMPONENTS_Y_UV, 2,
237 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
238 { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88, 2 } } },
239
240 /* For YUYV buffers, we set up two overlapping DRI images and treat
241 * them as planar buffers in the compositors. Plane 0 is GR88 and
242 * samples YU or YV pairs and places Y into the R component, while
243 * plane 1 is ARGB and samples YUYV clusters and places pairs and
244 * places U into the G component and V into A. This lets the
245 * texture sampler interpolate the Y components correctly when
246 * sampling from plane 0, and interpolate U and V correctly when
247 * sampling from plane 1. */
248 { __DRI_IMAGE_FOURCC_YUYV, __DRI_IMAGE_COMPONENTS_Y_XUXV, 2,
249 { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88, 2 },
250 { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } }
251 };
252
253 static __DRIimage *
254 intel_allocate_image(int dri_format, void *loaderPrivate)
255 {
256 __DRIimage *image;
257
258 image = calloc(1, sizeof *image);
259 if (image == NULL)
260 return NULL;
261
262 image->dri_format = dri_format;
263 image->offset = 0;
264
265 switch (dri_format) {
266 case __DRI_IMAGE_FORMAT_RGB565:
267 image->format = MESA_FORMAT_RGB565;
268 break;
269 case __DRI_IMAGE_FORMAT_XRGB8888:
270 image->format = MESA_FORMAT_XRGB8888;
271 break;
272 case __DRI_IMAGE_FORMAT_ARGB8888:
273 image->format = MESA_FORMAT_ARGB8888;
274 break;
275 case __DRI_IMAGE_FORMAT_ABGR8888:
276 image->format = MESA_FORMAT_RGBA8888_REV;
277 break;
278 case __DRI_IMAGE_FORMAT_XBGR8888:
279 image->format = MESA_FORMAT_RGBX8888_REV;
280 break;
281 case __DRI_IMAGE_FORMAT_R8:
282 image->format = MESA_FORMAT_R8;
283 break;
284 case __DRI_IMAGE_FORMAT_GR88:
285 image->format = MESA_FORMAT_GR88;
286 break;
287 case __DRI_IMAGE_FORMAT_NONE:
288 image->format = MESA_FORMAT_NONE;
289 break;
290 default:
291 free(image);
292 return NULL;
293 }
294
295 image->internal_format = _mesa_get_format_base_format(image->format);
296 image->data = loaderPrivate;
297
298 return image;
299 }
300
301 /**
302 * Sets up a DRIImage structure to point to our shared image in a region
303 */
304 static void
305 intel_setup_image_from_mipmap_tree(struct intel_context *intel, __DRIimage *image,
306 struct intel_mipmap_tree *mt, GLuint level,
307 GLuint zoffset)
308 {
309 unsigned int draw_x, draw_y;
310 uint32_t mask_x, mask_y;
311
312 intel_miptree_check_level_layer(mt, level, zoffset);
313
314 intel_region_get_tile_masks(mt->region, &mask_x, &mask_y, false);
315 intel_miptree_get_image_offset(mt, level, zoffset, &draw_x, &draw_y);
316
317 image->width = mt->level[level].width;
318 image->height = mt->level[level].height;
319 image->tile_x = draw_x & mask_x;
320 image->tile_y = draw_y & mask_y;
321
322 image->offset = intel_region_get_aligned_offset(mt->region,
323 draw_x & ~mask_x,
324 draw_y & ~mask_y,
325 false);
326
327 intel_region_reference(&image->region, mt->region);
328 }
329
330 static void
331 intel_setup_image_from_dimensions(__DRIimage *image)
332 {
333 image->width = image->region->width;
334 image->height = image->region->height;
335 image->tile_x = 0;
336 image->tile_y = 0;
337 image->has_depthstencil = false;
338 }
339
340 static inline uint32_t
341 intel_dri_format(GLuint format)
342 {
343 switch (format) {
344 case MESA_FORMAT_RGB565:
345 return __DRI_IMAGE_FORMAT_RGB565;
346 case MESA_FORMAT_XRGB8888:
347 return __DRI_IMAGE_FORMAT_XRGB8888;
348 case MESA_FORMAT_ARGB8888:
349 return __DRI_IMAGE_FORMAT_ARGB8888;
350 case MESA_FORMAT_RGBA8888_REV:
351 return __DRI_IMAGE_FORMAT_ABGR8888;
352 case MESA_FORMAT_R8:
353 return __DRI_IMAGE_FORMAT_R8;
354 case MESA_FORMAT_RG88:
355 return __DRI_IMAGE_FORMAT_GR88;
356 }
357
358 return MESA_FORMAT_NONE;
359 }
360
361 static __DRIimage *
362 intel_create_image_from_name(__DRIscreen *screen,
363 int width, int height, int format,
364 int name, int pitch, void *loaderPrivate)
365 {
366 struct intel_screen *intelScreen = screen->driverPrivate;
367 __DRIimage *image;
368 int cpp;
369
370 image = intel_allocate_image(format, loaderPrivate);
371 if (image->format == MESA_FORMAT_NONE)
372 cpp = 1;
373 else
374 cpp = _mesa_get_format_bytes(image->format);
375 image->region = intel_region_alloc_for_handle(intelScreen,
376 cpp, width, height,
377 pitch * cpp, name, "image");
378 if (image->region == NULL) {
379 free(image);
380 return NULL;
381 }
382
383 intel_setup_image_from_dimensions(image);
384
385 return image;
386 }
387
388 static __DRIimage *
389 intel_create_image_from_renderbuffer(__DRIcontext *context,
390 int renderbuffer, void *loaderPrivate)
391 {
392 __DRIimage *image;
393 struct intel_context *intel = context->driverPrivate;
394 struct gl_renderbuffer *rb;
395 struct intel_renderbuffer *irb;
396
397 rb = _mesa_lookup_renderbuffer(&intel->ctx, renderbuffer);
398 if (!rb) {
399 _mesa_error(&intel->ctx,
400 GL_INVALID_OPERATION, "glRenderbufferExternalMESA");
401 return NULL;
402 }
403
404 irb = intel_renderbuffer(rb);
405 image = calloc(1, sizeof *image);
406 if (image == NULL)
407 return NULL;
408
409 image->internal_format = rb->InternalFormat;
410 image->format = rb->Format;
411 image->offset = 0;
412 image->data = loaderPrivate;
413 intel_region_reference(&image->region, irb->mt->region);
414 intel_setup_image_from_dimensions(image);
415 image->dri_format = intel_dri_format(image->format);
416 image->has_depthstencil = irb->mt->stencil_mt? true : false;
417
418 return image;
419 }
420
421 static __DRIimage *
422 intel_create_image_from_texture(__DRIcontext *context, int target,
423 unsigned texture, int zoffset,
424 int level,
425 unsigned *error,
426 void *loaderPrivate)
427 {
428 __DRIimage *image;
429 struct intel_context *intel = context->driverPrivate;
430 struct gl_texture_object *obj;
431 struct intel_texture_object *iobj;
432 GLuint face = 0;
433
434 obj = _mesa_lookup_texture(&intel->ctx, texture);
435 if (!obj || obj->Target != target) {
436 *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
437 return NULL;
438 }
439
440 if (target == GL_TEXTURE_CUBE_MAP)
441 face = zoffset;
442
443 _mesa_test_texobj_completeness(&intel->ctx, obj);
444 iobj = intel_texture_object(obj);
445 if (!obj->_BaseComplete || (level > 0 && !obj->_MipmapComplete)) {
446 *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
447 return NULL;
448 }
449
450 if (level < obj->BaseLevel || level > obj->_MaxLevel) {
451 *error = __DRI_IMAGE_ERROR_BAD_MATCH;
452 return NULL;
453 }
454
455 if (target == GL_TEXTURE_3D && obj->Image[face][level]->Depth < zoffset) {
456 *error = __DRI_IMAGE_ERROR_BAD_MATCH;
457 return NULL;
458 }
459 image = calloc(1, sizeof *image);
460 if (image == NULL) {
461 *error = __DRI_IMAGE_ERROR_BAD_ALLOC;
462 return NULL;
463 }
464
465 image->internal_format = obj->Image[face][level]->InternalFormat;
466 image->format = obj->Image[face][level]->TexFormat;
467 image->data = loaderPrivate;
468 intel_setup_image_from_mipmap_tree(intel, image, iobj->mt, level, zoffset);
469 image->dri_format = intel_dri_format(image->format);
470 image->has_depthstencil = iobj->mt->stencil_mt? true : false;
471 if (image->dri_format == MESA_FORMAT_NONE) {
472 *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
473 free(image);
474 return NULL;
475 }
476
477 *error = __DRI_IMAGE_ERROR_SUCCESS;
478 return image;
479 }
480
481 static void
482 intel_destroy_image(__DRIimage *image)
483 {
484 intel_region_release(&image->region);
485 free(image);
486 }
487
488 static __DRIimage *
489 intel_create_image(__DRIscreen *screen,
490 int width, int height, int format,
491 unsigned int use,
492 void *loaderPrivate)
493 {
494 __DRIimage *image;
495 struct intel_screen *intelScreen = screen->driverPrivate;
496 uint32_t tiling;
497 int cpp;
498
499 tiling = I915_TILING_X;
500 if (use & __DRI_IMAGE_USE_CURSOR) {
501 if (width != 64 || height != 64)
502 return NULL;
503 tiling = I915_TILING_NONE;
504 }
505
506 image = intel_allocate_image(format, loaderPrivate);
507 cpp = _mesa_get_format_bytes(image->format);
508 image->region =
509 intel_region_alloc(intelScreen, tiling, cpp, width, height, true);
510 if (image->region == NULL) {
511 free(image);
512 return NULL;
513 }
514
515 intel_setup_image_from_dimensions(image);
516
517 return image;
518 }
519
520 static GLboolean
521 intel_query_image(__DRIimage *image, int attrib, int *value)
522 {
523 switch (attrib) {
524 case __DRI_IMAGE_ATTRIB_STRIDE:
525 *value = image->region->pitch;
526 return true;
527 case __DRI_IMAGE_ATTRIB_HANDLE:
528 *value = image->region->bo->handle;
529 return true;
530 case __DRI_IMAGE_ATTRIB_NAME:
531 return intel_region_flink(image->region, (uint32_t *) value);
532 case __DRI_IMAGE_ATTRIB_FORMAT:
533 *value = image->dri_format;
534 return true;
535 case __DRI_IMAGE_ATTRIB_WIDTH:
536 *value = image->region->width;
537 return true;
538 case __DRI_IMAGE_ATTRIB_HEIGHT:
539 *value = image->region->height;
540 return true;
541 case __DRI_IMAGE_ATTRIB_COMPONENTS:
542 if (image->planar_format == NULL)
543 return false;
544 *value = image->planar_format->components;
545 return true;
546 case __DRI_IMAGE_ATTRIB_FD:
547 if (drm_intel_bo_gem_export_to_prime(image->region->bo, value) == 0)
548 return true;
549 return false;
550 default:
551 return false;
552 }
553 }
554
555 static __DRIimage *
556 intel_dup_image(__DRIimage *orig_image, void *loaderPrivate)
557 {
558 __DRIimage *image;
559
560 image = calloc(1, sizeof *image);
561 if (image == NULL)
562 return NULL;
563
564 intel_region_reference(&image->region, orig_image->region);
565 if (image->region == NULL) {
566 free(image);
567 return NULL;
568 }
569
570 image->internal_format = orig_image->internal_format;
571 image->planar_format = orig_image->planar_format;
572 image->dri_format = orig_image->dri_format;
573 image->format = orig_image->format;
574 image->offset = orig_image->offset;
575 image->width = orig_image->width;
576 image->height = orig_image->height;
577 image->tile_x = orig_image->tile_x;
578 image->tile_y = orig_image->tile_y;
579 image->has_depthstencil = orig_image->has_depthstencil;
580 image->data = loaderPrivate;
581
582 memcpy(image->strides, orig_image->strides, sizeof(image->strides));
583 memcpy(image->offsets, orig_image->offsets, sizeof(image->offsets));
584
585 return image;
586 }
587
588 static GLboolean
589 intel_validate_usage(__DRIimage *image, unsigned int use)
590 {
591 if (use & __DRI_IMAGE_USE_CURSOR) {
592 if (image->region->width != 64 || image->region->height != 64)
593 return GL_FALSE;
594 }
595
596 return GL_TRUE;
597 }
598
599 static __DRIimage *
600 intel_create_image_from_names(__DRIscreen *screen,
601 int width, int height, int fourcc,
602 int *names, int num_names,
603 int *strides, int *offsets,
604 void *loaderPrivate)
605 {
606 struct intel_image_format *f = NULL;
607 __DRIimage *image;
608 int i, index;
609
610 if (screen == NULL || names == NULL || num_names != 1)
611 return NULL;
612
613 for (i = 0; i < ARRAY_SIZE(intel_image_formats); i++) {
614 if (intel_image_formats[i].fourcc == fourcc) {
615 f = &intel_image_formats[i];
616 }
617 }
618
619 if (f == NULL)
620 return NULL;
621
622 image = intel_create_image_from_name(screen, width, height,
623 __DRI_IMAGE_FORMAT_NONE,
624 names[0], strides[0],
625 loaderPrivate);
626
627 if (image == NULL)
628 return NULL;
629
630 image->planar_format = f;
631 for (i = 0; i < f->nplanes; i++) {
632 index = f->planes[i].buffer_index;
633 image->offsets[index] = offsets[index];
634 image->strides[index] = strides[index];
635 }
636
637 return image;
638 }
639
640 static __DRIimage *
641 intel_create_image_from_fds(__DRIscreen *screen,
642 int width, int height, int fourcc,
643 int *fds, int num_fds, int *strides, int *offsets,
644 void *loaderPrivate)
645 {
646 struct intel_screen *intelScreen = screen->driverPrivate;
647 struct intel_image_format *f = NULL;
648 __DRIimage *image;
649 int i, index;
650
651 if (fds == NULL || num_fds != 1)
652 return NULL;
653
654 for (i = 0; i < ARRAY_SIZE(intel_image_formats); i++) {
655 if (intel_image_formats[i].fourcc == fourcc) {
656 f = &intel_image_formats[i];
657 }
658 }
659
660 if (f == NULL)
661 return NULL;
662
663 image = intel_allocate_image(__DRI_IMAGE_FORMAT_NONE, loaderPrivate);
664 if (image == NULL)
665 return NULL;
666
667 image->region = intel_region_alloc_for_fd(intelScreen,
668 1, width, height,
669 strides[0], fds[0], "image");
670 if (image->region == NULL) {
671 free(image);
672 return NULL;
673 }
674
675 image->planar_format = f;
676 for (i = 0; i < f->nplanes; i++) {
677 index = f->planes[i].buffer_index;
678 image->offsets[index] = offsets[index];
679 image->strides[index] = strides[index];
680 }
681
682 return image;
683 }
684
685
686 static __DRIimage *
687 intel_from_planar(__DRIimage *parent, int plane, void *loaderPrivate)
688 {
689 int width, height, offset, stride, dri_format, index;
690 struct intel_image_format *f;
691 uint32_t mask_x, mask_y;
692 __DRIimage *image;
693
694 if (parent == NULL || parent->planar_format == NULL)
695 return NULL;
696
697 f = parent->planar_format;
698
699 if (plane >= f->nplanes)
700 return NULL;
701
702 width = parent->region->width >> f->planes[plane].width_shift;
703 height = parent->region->height >> f->planes[plane].height_shift;
704 dri_format = f->planes[plane].dri_format;
705 index = f->planes[plane].buffer_index;
706 offset = parent->offsets[index];
707 stride = parent->strides[index];
708
709 image = intel_allocate_image(dri_format, loaderPrivate);
710 if (offset + height * stride > parent->region->bo->size) {
711 _mesa_warning(NULL, "intel_create_sub_image: subimage out of bounds");
712 free(image);
713 return NULL;
714 }
715
716 image->region = calloc(sizeof(*image->region), 1);
717 if (image->region == NULL) {
718 free(image);
719 return NULL;
720 }
721
722 image->region->cpp = _mesa_get_format_bytes(image->format);
723 image->region->width = width;
724 image->region->height = height;
725 image->region->pitch = stride;
726 image->region->refcount = 1;
727 image->region->bo = parent->region->bo;
728 drm_intel_bo_reference(image->region->bo);
729 image->region->tiling = parent->region->tiling;
730 image->offset = offset;
731 intel_setup_image_from_dimensions(image);
732
733 intel_region_get_tile_masks(image->region, &mask_x, &mask_y, false);
734 if (offset & mask_x)
735 _mesa_warning(NULL,
736 "intel_create_sub_image: offset not on tile boundary");
737
738 return image;
739 }
740
741 static struct __DRIimageExtensionRec intelImageExtension = {
742 .base = { __DRI_IMAGE, 7 },
743
744 .createImageFromName = intel_create_image_from_name,
745 .createImageFromRenderbuffer = intel_create_image_from_renderbuffer,
746 .destroyImage = intel_destroy_image,
747 .createImage = intel_create_image,
748 .queryImage = intel_query_image,
749 .dupImage = intel_dup_image,
750 .validateUsage = intel_validate_usage,
751 .createImageFromNames = intel_create_image_from_names,
752 .fromPlanar = intel_from_planar,
753 .createImageFromTexture = intel_create_image_from_texture,
754 .createImageFromFds = intel_create_image_from_fds
755 };
756
757 static const __DRIextension *intelScreenExtensions[] = {
758 &intelTexBufferExtension.base,
759 &intelFlushExtension.base,
760 &intelImageExtension.base,
761 &dri2ConfigQueryExtension.base,
762 NULL
763 };
764
765 static bool
766 intel_get_param(__DRIscreen *psp, int param, int *value)
767 {
768 int ret;
769 struct drm_i915_getparam gp;
770
771 memset(&gp, 0, sizeof(gp));
772 gp.param = param;
773 gp.value = value;
774
775 ret = drmCommandWriteRead(psp->fd, DRM_I915_GETPARAM, &gp, sizeof(gp));
776 if (ret) {
777 if (ret != -EINVAL)
778 _mesa_warning(NULL, "drm_i915_getparam: %d", ret);
779 return false;
780 }
781
782 return true;
783 }
784
785 static bool
786 intel_get_boolean(__DRIscreen *psp, int param)
787 {
788 int value = 0;
789 return intel_get_param(psp, param, &value) && value;
790 }
791
792 static void
793 intelDestroyScreen(__DRIscreen * sPriv)
794 {
795 struct intel_screen *intelScreen = sPriv->driverPrivate;
796
797 dri_bufmgr_destroy(intelScreen->bufmgr);
798 driDestroyOptionInfo(&intelScreen->optionCache);
799
800 free(intelScreen);
801 sPriv->driverPrivate = NULL;
802 }
803
804
805 /**
806 * This is called when we need to set up GL rendering to a new X window.
807 */
808 static GLboolean
809 intelCreateBuffer(__DRIscreen * driScrnPriv,
810 __DRIdrawable * driDrawPriv,
811 const struct gl_config * mesaVis, GLboolean isPixmap)
812 {
813 struct intel_renderbuffer *rb;
814 struct intel_screen *screen = (struct intel_screen*) driScrnPriv->driverPrivate;
815 gl_format rgbFormat;
816 unsigned num_samples = intel_quantize_num_samples(screen, mesaVis->samples);
817 struct gl_framebuffer *fb;
818
819 if (isPixmap)
820 return false;
821
822 fb = CALLOC_STRUCT(gl_framebuffer);
823 if (!fb)
824 return false;
825
826 _mesa_initialize_window_framebuffer(fb, mesaVis);
827
828 if (mesaVis->redBits == 5)
829 rgbFormat = MESA_FORMAT_RGB565;
830 else if (mesaVis->sRGBCapable)
831 rgbFormat = MESA_FORMAT_SARGB8;
832 else if (mesaVis->alphaBits == 0)
833 rgbFormat = MESA_FORMAT_XRGB8888;
834 else {
835 if (screen->gen >= 4) {
836 rgbFormat = MESA_FORMAT_SARGB8;
837 fb->Visual.sRGBCapable = true;
838 } else {
839 rgbFormat = MESA_FORMAT_ARGB8888;
840 }
841
842 }
843
844 /* setup the hardware-based renderbuffers */
845 rb = intel_create_renderbuffer(rgbFormat, num_samples);
846 _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &rb->Base.Base);
847
848 if (mesaVis->doubleBufferMode) {
849 rb = intel_create_renderbuffer(rgbFormat, num_samples);
850 _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &rb->Base.Base);
851 }
852
853 /*
854 * Assert here that the gl_config has an expected depth/stencil bit
855 * combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(),
856 * which constructs the advertised configs.)
857 */
858 if (mesaVis->depthBits == 24) {
859 assert(mesaVis->stencilBits == 8);
860
861 if (screen->hw_has_separate_stencil) {
862 rb = intel_create_private_renderbuffer(MESA_FORMAT_X8_Z24,
863 num_samples);
864 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
865 rb = intel_create_private_renderbuffer(MESA_FORMAT_S8,
866 num_samples);
867 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
868 } else {
869 /*
870 * Use combined depth/stencil. Note that the renderbuffer is
871 * attached to two attachment points.
872 */
873 rb = intel_create_private_renderbuffer(MESA_FORMAT_S8_Z24,
874 num_samples);
875 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
876 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
877 }
878 }
879 else if (mesaVis->depthBits == 16) {
880 assert(mesaVis->stencilBits == 0);
881 rb = intel_create_private_renderbuffer(MESA_FORMAT_Z16,
882 num_samples);
883 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
884 }
885 else {
886 assert(mesaVis->depthBits == 0);
887 assert(mesaVis->stencilBits == 0);
888 }
889
890 /* now add any/all software-based renderbuffers we may need */
891 _swrast_add_soft_renderbuffers(fb,
892 false, /* never sw color */
893 false, /* never sw depth */
894 false, /* never sw stencil */
895 mesaVis->accumRedBits > 0,
896 false, /* never sw alpha */
897 false /* never sw aux */ );
898 driDrawPriv->driverPrivate = fb;
899
900 return true;
901 }
902
903 static void
904 intelDestroyBuffer(__DRIdrawable * driDrawPriv)
905 {
906 struct gl_framebuffer *fb = driDrawPriv->driverPrivate;
907
908 _mesa_reference_framebuffer(&fb, NULL);
909 }
910
911 /* There are probably better ways to do this, such as an
912 * init-designated function to register chipids and createcontext
913 * functions.
914 */
915 extern bool
916 i830CreateContext(int api,
917 const struct gl_config *mesaVis,
918 __DRIcontext *driContextPriv,
919 unsigned major_version,
920 unsigned minor_version,
921 unsigned *error,
922 void *sharedContextPrivate);
923
924 extern bool
925 i915CreateContext(int api,
926 const struct gl_config *mesaVis,
927 __DRIcontext *driContextPriv,
928 unsigned major_version,
929 unsigned minor_version,
930 unsigned *error,
931 void *sharedContextPrivate);
932 extern bool
933 brwCreateContext(int api,
934 const struct gl_config *mesaVis,
935 __DRIcontext *driContextPriv,
936 unsigned major_version,
937 unsigned minor_version,
938 uint32_t flags,
939 unsigned *error,
940 void *sharedContextPrivate);
941
942 static GLboolean
943 intelCreateContext(gl_api api,
944 const struct gl_config * mesaVis,
945 __DRIcontext * driContextPriv,
946 unsigned major_version,
947 unsigned minor_version,
948 uint32_t flags,
949 unsigned *error,
950 void *sharedContextPrivate)
951 {
952 bool success = false;
953
954 #ifdef I915
955 __DRIscreen *sPriv = driContextPriv->driScreenPriv;
956 struct intel_screen *intelScreen = sPriv->driverPrivate;
957
958 if (IS_9XX(intelScreen->deviceID)) {
959 success = i915CreateContext(api, mesaVis, driContextPriv,
960 major_version, minor_version, error,
961 sharedContextPrivate);
962 } else {
963 intelScreen->no_vbo = true;
964 success = i830CreateContext(api, mesaVis, driContextPriv,
965 major_version, minor_version, error,
966 sharedContextPrivate);
967 }
968 #else
969 success = brwCreateContext(api, mesaVis,
970 driContextPriv,
971 major_version, minor_version, flags,
972 error, sharedContextPrivate);
973 #endif
974
975 if (success)
976 return true;
977
978 if (driContextPriv->driverPrivate != NULL)
979 intelDestroyContext(driContextPriv);
980
981 return false;
982 }
983
984 static bool
985 intel_init_bufmgr(struct intel_screen *intelScreen)
986 {
987 __DRIscreen *spriv = intelScreen->driScrnPriv;
988
989 intelScreen->no_hw = getenv("INTEL_NO_HW") != NULL;
990
991 intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ);
992 if (intelScreen->bufmgr == NULL) {
993 fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
994 __func__, __LINE__);
995 return false;
996 }
997
998 drm_intel_bufmgr_gem_enable_fenced_relocs(intelScreen->bufmgr);
999
1000 if (!intel_get_boolean(spriv, I915_PARAM_HAS_RELAXED_DELTA)) {
1001 fprintf(stderr, "[%s: %u] Kernel 2.6.39 required.\n", __func__, __LINE__);
1002 return false;
1003 }
1004
1005 return true;
1006 }
1007
1008 /**
1009 * Override intel_screen.hw_has_separate_stencil with environment variable
1010 * INTEL_SEPARATE_STENCIL.
1011 *
1012 * Valid values for INTEL_SEPARATE_STENCIL are "0" and "1". If an invalid
1013 * valid value is encountered, a warning is emitted and INTEL_SEPARATE_STENCIL
1014 * is ignored.
1015 */
1016 static void
1017 intel_override_separate_stencil(struct intel_screen *screen)
1018 {
1019 const char *s = getenv("INTEL_SEPARATE_STENCIL");
1020 if (!s) {
1021 return;
1022 } else if (!strncmp("0", s, 2)) {
1023 screen->hw_has_separate_stencil = false;
1024 } else if (!strncmp("1", s, 2)) {
1025 screen->hw_has_separate_stencil = true;
1026 } else {
1027 fprintf(stderr,
1028 "warning: env variable INTEL_SEPARATE_STENCIL=\"%s\" has "
1029 "invalid value and is ignored", s);
1030 }
1031 }
1032
1033 static bool
1034 intel_detect_swizzling(struct intel_screen *screen)
1035 {
1036 drm_intel_bo *buffer;
1037 unsigned long flags = 0;
1038 unsigned long aligned_pitch;
1039 uint32_t tiling = I915_TILING_X;
1040 uint32_t swizzle_mode = 0;
1041
1042 buffer = drm_intel_bo_alloc_tiled(screen->bufmgr, "swizzle test",
1043 64, 64, 4,
1044 &tiling, &aligned_pitch, flags);
1045 if (buffer == NULL)
1046 return false;
1047
1048 drm_intel_bo_get_tiling(buffer, &tiling, &swizzle_mode);
1049 drm_intel_bo_unreference(buffer);
1050
1051 if (swizzle_mode == I915_BIT_6_SWIZZLE_NONE)
1052 return false;
1053 else
1054 return true;
1055 }
1056
1057 static __DRIconfig**
1058 intel_screen_make_configs(__DRIscreen *dri_screen)
1059 {
1060 static const gl_format formats[] = {
1061 MESA_FORMAT_RGB565,
1062 MESA_FORMAT_ARGB8888
1063 };
1064
1065 /* GLX_SWAP_COPY_OML is not supported due to page flipping. */
1066 static const GLenum back_buffer_modes[] = {
1067 GLX_SWAP_UNDEFINED_OML, GLX_NONE,
1068 };
1069
1070 static const uint8_t singlesample_samples[1] = {0};
1071 static const uint8_t multisample_samples[2] = {4, 8};
1072
1073 struct intel_screen *screen = dri_screen->driverPrivate;
1074 uint8_t depth_bits[4], stencil_bits[4];
1075 __DRIconfig **configs = NULL;
1076
1077 /* Generate singlesample configs without accumulation buffer. */
1078 for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1079 __DRIconfig **new_configs;
1080 int num_depth_stencil_bits = 2;
1081
1082 /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
1083 * buffer that has a different number of bits per pixel than the color
1084 * buffer, gen >= 6 supports this.
1085 */
1086 depth_bits[0] = 0;
1087 stencil_bits[0] = 0;
1088
1089 if (formats[i] == MESA_FORMAT_RGB565) {
1090 depth_bits[1] = 16;
1091 stencil_bits[1] = 0;
1092 if (screen->gen >= 6) {
1093 depth_bits[2] = 24;
1094 stencil_bits[2] = 8;
1095 num_depth_stencil_bits = 3;
1096 }
1097 } else {
1098 depth_bits[1] = 24;
1099 stencil_bits[1] = 8;
1100 }
1101
1102 new_configs = driCreateConfigs(formats[i],
1103 depth_bits,
1104 stencil_bits,
1105 num_depth_stencil_bits,
1106 back_buffer_modes, 2,
1107 singlesample_samples, 1,
1108 false);
1109 configs = driConcatConfigs(configs, new_configs);
1110 }
1111
1112 /* Generate the minimum possible set of configs that include an
1113 * accumulation buffer.
1114 */
1115 for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1116 __DRIconfig **new_configs;
1117
1118 if (formats[i] == MESA_FORMAT_RGB565) {
1119 depth_bits[0] = 16;
1120 stencil_bits[0] = 0;
1121 } else {
1122 depth_bits[0] = 24;
1123 stencil_bits[0] = 8;
1124 }
1125
1126 new_configs = driCreateConfigs(formats[i],
1127 depth_bits, stencil_bits, 1,
1128 back_buffer_modes, 1,
1129 singlesample_samples, 1,
1130 true);
1131 configs = driConcatConfigs(configs, new_configs);
1132 }
1133
1134 /* Generate multisample configs.
1135 *
1136 * This loop breaks early, and hence is a no-op, on gen < 6.
1137 *
1138 * Multisample configs must follow the singlesample configs in order to
1139 * work around an X server bug present in 1.12. The X server chooses to
1140 * associate the first listed RGBA888-Z24S8 config, regardless of its
1141 * sample count, with the 32-bit depth visual used for compositing.
1142 *
1143 * Only doublebuffer configs with GLX_SWAP_UNDEFINED_OML behavior are
1144 * supported. Singlebuffer configs are not supported because no one wants
1145 * them.
1146 */
1147 for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1148 if (screen->gen < 6)
1149 break;
1150
1151 __DRIconfig **new_configs;
1152 const int num_depth_stencil_bits = 2;
1153 int num_msaa_modes = 0;
1154
1155 depth_bits[0] = 0;
1156 stencil_bits[0] = 0;
1157
1158 if (formats[i] == MESA_FORMAT_RGB565) {
1159 depth_bits[1] = 16;
1160 stencil_bits[1] = 0;
1161 } else {
1162 depth_bits[1] = 24;
1163 stencil_bits[1] = 8;
1164 }
1165
1166 if (screen->gen >= 7)
1167 num_msaa_modes = 2;
1168 else if (screen->gen == 6)
1169 num_msaa_modes = 1;
1170
1171 new_configs = driCreateConfigs(formats[i],
1172 depth_bits,
1173 stencil_bits,
1174 num_depth_stencil_bits,
1175 back_buffer_modes, 1,
1176 multisample_samples,
1177 num_msaa_modes,
1178 false);
1179 configs = driConcatConfigs(configs, new_configs);
1180 }
1181
1182 if (configs == NULL) {
1183 fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
1184 __LINE__);
1185 return NULL;
1186 }
1187
1188 return configs;
1189 }
1190
1191 static void
1192 set_max_gl_versions(struct intel_screen *screen)
1193 {
1194 int gl_version_override = _mesa_get_gl_version_override();
1195
1196 switch (screen->gen) {
1197 case 7:
1198 if (screen->kernel_has_gen7_sol_reset) {
1199 screen->max_gl_core_version = 31;
1200 screen->max_gl_compat_version = 30;
1201 screen->max_gl_es1_version = 11;
1202 screen->max_gl_es2_version = 30;
1203 } else {
1204 screen->max_gl_core_version = 0;
1205 screen->max_gl_compat_version = 21;
1206 screen->max_gl_es1_version = 11;
1207 screen->max_gl_es2_version = 20;
1208 }
1209 break;
1210 case 6:
1211 screen->max_gl_core_version = 31;
1212 screen->max_gl_compat_version = 30;
1213 screen->max_gl_es1_version = 11;
1214 screen->max_gl_es2_version = 30;
1215 break;
1216 case 5:
1217 case 4:
1218 screen->max_gl_core_version = 0;
1219 screen->max_gl_compat_version = 21;
1220 screen->max_gl_es1_version = 11;
1221 screen->max_gl_es2_version = 20;
1222 break;
1223 case 3: {
1224 bool has_fragment_shader = driQueryOptionb(&screen->optionCache, "fragment_shader");
1225 bool has_occlusion_query = driQueryOptionb(&screen->optionCache, "stub_occlusion_query");
1226
1227 screen->max_gl_core_version = 0;
1228 screen->max_gl_es1_version = 11;
1229
1230 if (has_fragment_shader && has_occlusion_query) {
1231 screen->max_gl_compat_version = 21;
1232 } else {
1233 screen->max_gl_compat_version = 14;
1234 }
1235
1236 if (has_fragment_shader) {
1237 screen->max_gl_es2_version = 20;
1238 } else {
1239 screen->max_gl_es2_version = 0;
1240 }
1241
1242 break;
1243 }
1244 case 2:
1245 screen->max_gl_core_version = 0;
1246 screen->max_gl_compat_version = 13;
1247 screen->max_gl_es1_version = 11;
1248 screen->max_gl_es2_version = 0;
1249 break;
1250 default:
1251 assert(!"unrecognized intel_screen::gen");
1252 break;
1253 }
1254
1255 if (gl_version_override >= 31) {
1256 screen->max_gl_core_version = MAX2(screen->max_gl_core_version,
1257 gl_version_override);
1258 } else {
1259 screen->max_gl_compat_version = MAX2(screen->max_gl_compat_version,
1260 gl_version_override);
1261 }
1262
1263 #ifndef FEATURE_ES1
1264 screen->max_gl_es1_version = 0;
1265 #endif
1266
1267 #ifndef FEATURE_ES2
1268 screen->max_gl_es2_version = 0;
1269 #endif
1270 }
1271
1272 /**
1273 * This is the driver specific part of the createNewScreen entry point.
1274 * Called when using DRI2.
1275 *
1276 * \return the struct gl_config supported by this driver
1277 */
1278 static const
1279 __DRIconfig **intelInitScreen2(__DRIscreen *psp)
1280 {
1281 struct intel_screen *intelScreen;
1282
1283 if (psp->dri2.loader->base.version <= 2 ||
1284 psp->dri2.loader->getBuffersWithFormat == NULL) {
1285 fprintf(stderr,
1286 "\nERROR! DRI2 loader with getBuffersWithFormat() "
1287 "support required\n");
1288 return false;
1289 }
1290
1291 /* Allocate the private area */
1292 intelScreen = calloc(1, sizeof *intelScreen);
1293 if (!intelScreen) {
1294 fprintf(stderr, "\nERROR! Allocating private area failed\n");
1295 return false;
1296 }
1297 /* parse information in __driConfigOptions */
1298 driParseOptionInfo(&intelScreen->optionCache,
1299 __driConfigOptions, __driNConfigOptions);
1300
1301 intelScreen->driScrnPriv = psp;
1302 psp->driverPrivate = (void *) intelScreen;
1303
1304 if (!intel_init_bufmgr(intelScreen))
1305 return false;
1306
1307 intelScreen->deviceID = drm_intel_bufmgr_gem_get_devid(intelScreen->bufmgr);
1308
1309 intelScreen->kernel_has_gen7_sol_reset =
1310 intel_get_boolean(intelScreen->driScrnPriv,
1311 I915_PARAM_HAS_GEN7_SOL_RESET);
1312
1313 if (IS_GEN7(intelScreen->deviceID)) {
1314 intelScreen->gen = 7;
1315 } else if (IS_GEN6(intelScreen->deviceID)) {
1316 intelScreen->gen = 6;
1317 } else if (IS_GEN5(intelScreen->deviceID)) {
1318 intelScreen->gen = 5;
1319 } else if (IS_965(intelScreen->deviceID)) {
1320 intelScreen->gen = 4;
1321 } else if (IS_9XX(intelScreen->deviceID)) {
1322 intelScreen->gen = 3;
1323 } else {
1324 intelScreen->gen = 2;
1325 }
1326
1327 intelScreen->hw_has_separate_stencil = intelScreen->gen >= 6;
1328 intelScreen->hw_must_use_separate_stencil = intelScreen->gen >= 7;
1329
1330 int has_llc = 0;
1331 bool success = intel_get_param(intelScreen->driScrnPriv, I915_PARAM_HAS_LLC,
1332 &has_llc);
1333 if (success && has_llc)
1334 intelScreen->hw_has_llc = true;
1335 else if (!success && intelScreen->gen >= 6)
1336 intelScreen->hw_has_llc = true;
1337
1338 intel_override_separate_stencil(intelScreen);
1339
1340 intelScreen->hw_has_swizzling = intel_detect_swizzling(intelScreen);
1341
1342 set_max_gl_versions(intelScreen);
1343
1344 psp->api_mask = (1 << __DRI_API_OPENGL);
1345 if (intelScreen->max_gl_core_version > 0)
1346 psp->api_mask |= (1 << __DRI_API_OPENGL_CORE);
1347 if (intelScreen->max_gl_es1_version > 0)
1348 psp->api_mask |= (1 << __DRI_API_GLES);
1349 if (intelScreen->max_gl_es2_version > 0)
1350 psp->api_mask |= (1 << __DRI_API_GLES2);
1351 if (intelScreen->max_gl_es2_version >= 30)
1352 psp->api_mask |= (1 << __DRI_API_GLES3);
1353
1354 psp->extensions = intelScreenExtensions;
1355
1356 return (const __DRIconfig**) intel_screen_make_configs(psp);
1357 }
1358
1359 struct intel_buffer {
1360 __DRIbuffer base;
1361 struct intel_region *region;
1362 };
1363
1364 static __DRIbuffer *
1365 intelAllocateBuffer(__DRIscreen *screen,
1366 unsigned attachment, unsigned format,
1367 int width, int height)
1368 {
1369 struct intel_buffer *intelBuffer;
1370 struct intel_screen *intelScreen = screen->driverPrivate;
1371
1372 assert(attachment == __DRI_BUFFER_FRONT_LEFT ||
1373 attachment == __DRI_BUFFER_BACK_LEFT);
1374
1375 intelBuffer = calloc(1, sizeof *intelBuffer);
1376 if (intelBuffer == NULL)
1377 return NULL;
1378
1379 /* The front and back buffers are color buffers, which are X tiled. */
1380 intelBuffer->region = intel_region_alloc(intelScreen,
1381 I915_TILING_X,
1382 format / 8,
1383 width,
1384 height,
1385 true);
1386
1387 if (intelBuffer->region == NULL) {
1388 free(intelBuffer);
1389 return NULL;
1390 }
1391
1392 intel_region_flink(intelBuffer->region, &intelBuffer->base.name);
1393
1394 intelBuffer->base.attachment = attachment;
1395 intelBuffer->base.cpp = intelBuffer->region->cpp;
1396 intelBuffer->base.pitch = intelBuffer->region->pitch;
1397
1398 return &intelBuffer->base;
1399 }
1400
1401 static void
1402 intelReleaseBuffer(__DRIscreen *screen, __DRIbuffer *buffer)
1403 {
1404 struct intel_buffer *intelBuffer = (struct intel_buffer *) buffer;
1405
1406 intel_region_release(&intelBuffer->region);
1407 free(intelBuffer);
1408 }
1409
1410
1411 const struct __DriverAPIRec driDriverAPI = {
1412 .InitScreen = intelInitScreen2,
1413 .DestroyScreen = intelDestroyScreen,
1414 .CreateContext = intelCreateContext,
1415 .DestroyContext = intelDestroyContext,
1416 .CreateBuffer = intelCreateBuffer,
1417 .DestroyBuffer = intelDestroyBuffer,
1418 .MakeCurrent = intelMakeCurrent,
1419 .UnbindContext = intelUnbindContext,
1420 .AllocateBuffer = intelAllocateBuffer,
1421 .ReleaseBuffer = intelReleaseBuffer
1422 };
1423
1424 /* This is the table of extensions that the loader will dlsym() for. */
1425 PUBLIC const __DRIextension *__driDriverExtensions[] = {
1426 &driCoreExtension.base,
1427 &driDRI2Extension.base,
1428 NULL
1429 };