1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
29 #include "main/glheader.h"
30 #include "main/context.h"
31 #include "main/framebuffer.h"
32 #include "main/renderbuffer.h"
33 #include "main/hash.h"
34 #include "main/fbobject.h"
35 #include "main/mfeatures.h"
36 #include "main/version.h"
37 #include "swrast/s_renderbuffer.h"
42 PUBLIC
const char __driConfigOptions
[] =
44 DRI_CONF_SECTION_PERFORMANCE
45 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC
)
46 /* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
47 * DRI_CONF_BO_REUSE_ALL
49 DRI_CONF_OPT_BEGIN_V(bo_reuse
, enum, 1, "0:1")
50 DRI_CONF_DESC_BEGIN(en
, "Buffer object reuse")
51 DRI_CONF_ENUM(0, "Disable buffer object reuse")
52 DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")
56 DRI_CONF_OPT_BEGIN(texture_tiling
, bool, true)
57 DRI_CONF_DESC(en
, "Enable texture tiling")
60 DRI_CONF_OPT_BEGIN(hiz
, bool, true)
61 DRI_CONF_DESC(en
, "Enable Hierarchical Z on gen6+")
64 DRI_CONF_OPT_BEGIN(early_z
, bool, false)
65 DRI_CONF_DESC(en
, "Enable early Z in classic mode (unstable, 945-only).")
68 DRI_CONF_OPT_BEGIN(fragment_shader
, bool, true)
69 DRI_CONF_DESC(en
, "Enable limited ARB_fragment_shader support on 915/945.")
73 DRI_CONF_SECTION_QUALITY
74 DRI_CONF_FORCE_S3TC_ENABLE(false)
75 DRI_CONF_ALLOW_LARGE_TEXTURES(2)
77 DRI_CONF_SECTION_DEBUG
78 DRI_CONF_NO_RAST(false)
79 DRI_CONF_ALWAYS_FLUSH_BATCH(false)
80 DRI_CONF_ALWAYS_FLUSH_CACHE(false)
81 DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN(false)
83 DRI_CONF_OPT_BEGIN(stub_occlusion_query
, bool, false)
84 DRI_CONF_DESC(en
, "Enable stub ARB_occlusion_query support on 915/945.")
87 DRI_CONF_OPT_BEGIN(shader_precompile
, bool, false)
88 DRI_CONF_DESC(en
, "Perform code generation at shader link time.")
93 const GLuint __driNConfigOptions
= 14;
95 #include "intel_batchbuffer.h"
96 #include "intel_buffers.h"
97 #include "intel_bufmgr.h"
98 #include "intel_chipset.h"
99 #include "intel_fbo.h"
100 #include "intel_mipmap_tree.h"
101 #include "intel_screen.h"
102 #include "intel_tex.h"
103 #include "intel_regions.h"
105 #include "i915_drm.h"
107 #ifdef USE_NEW_INTERFACE
108 static PFNGLXCREATECONTEXTMODES create_context_modes
= NULL
;
109 #endif /*USE_NEW_INTERFACE */
112 aub_dump_bmp(struct gl_context
*ctx
)
114 struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
116 for (int i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
117 struct intel_renderbuffer
*irb
=
118 intel_renderbuffer(fb
->_ColorDrawBuffers
[i
]);
120 if (irb
&& irb
->mt
) {
121 enum aub_dump_bmp_format format
;
123 switch (irb
->Base
.Base
.Format
) {
124 case MESA_FORMAT_ARGB8888
:
125 case MESA_FORMAT_XRGB8888
:
126 format
= AUB_DUMP_BMP_FORMAT_ARGB_8888
;
132 drm_intel_gem_bo_aub_dump_bmp(irb
->mt
->region
->bo
,
135 irb
->Base
.Base
.Width
,
136 irb
->Base
.Base
.Height
,
138 irb
->mt
->region
->pitch
*
139 irb
->mt
->region
->cpp
,
145 static const __DRItexBufferExtension intelTexBufferExtension
= {
146 { __DRI_TEX_BUFFER
, __DRI_TEX_BUFFER_VERSION
},
152 intelDRI2Flush(__DRIdrawable
*drawable
)
154 GET_CURRENT_CONTEXT(ctx
);
155 struct intel_context
*intel
= intel_context(ctx
);
160 INTEL_FIREVERTICES(intel
);
162 intel
->need_throttle
= true;
164 if (intel
->batch
.used
)
165 intel_batchbuffer_flush(intel
);
167 if (INTEL_DEBUG
& DEBUG_AUB
) {
172 static const struct __DRI2flushExtensionRec intelFlushExtension
= {
173 { __DRI2_FLUSH
, __DRI2_FLUSH_VERSION
},
175 dri2InvalidateDrawable
,
179 intel_create_image_from_name(__DRIscreen
*screen
,
180 int width
, int height
, int format
,
181 int name
, int pitch
, void *loaderPrivate
)
183 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
187 image
= CALLOC(sizeof *image
);
192 case __DRI_IMAGE_FORMAT_RGB565
:
193 image
->format
= MESA_FORMAT_RGB565
;
194 image
->internal_format
= GL_RGB
;
195 image
->data_type
= GL_UNSIGNED_BYTE
;
197 case __DRI_IMAGE_FORMAT_XRGB8888
:
198 image
->format
= MESA_FORMAT_XRGB8888
;
199 image
->internal_format
= GL_RGB
;
200 image
->data_type
= GL_UNSIGNED_BYTE
;
202 case __DRI_IMAGE_FORMAT_ARGB8888
:
203 image
->format
= MESA_FORMAT_ARGB8888
;
204 image
->internal_format
= GL_RGBA
;
205 image
->data_type
= GL_UNSIGNED_BYTE
;
207 case __DRI_IMAGE_FORMAT_ABGR8888
:
208 image
->format
= MESA_FORMAT_RGBA8888_REV
;
209 image
->internal_format
= GL_RGBA
;
210 image
->data_type
= GL_UNSIGNED_BYTE
;
217 image
->data
= loaderPrivate
;
218 cpp
= _mesa_get_format_bytes(image
->format
);
220 image
->region
= intel_region_alloc_for_handle(intelScreen
,
222 pitch
, name
, "image");
223 if (image
->region
== NULL
) {
232 intel_create_image_from_renderbuffer(__DRIcontext
*context
,
233 int renderbuffer
, void *loaderPrivate
)
236 struct intel_context
*intel
= context
->driverPrivate
;
237 struct gl_renderbuffer
*rb
;
238 struct intel_renderbuffer
*irb
;
240 rb
= _mesa_lookup_renderbuffer(&intel
->ctx
, renderbuffer
);
242 _mesa_error(&intel
->ctx
,
243 GL_INVALID_OPERATION
, "glRenderbufferExternalMESA");
247 irb
= intel_renderbuffer(rb
);
248 image
= CALLOC(sizeof *image
);
252 image
->internal_format
= rb
->InternalFormat
;
253 image
->format
= rb
->Format
;
254 image
->data_type
= GL_UNSIGNED_BYTE
;
255 image
->data
= loaderPrivate
;
256 intel_region_reference(&image
->region
, irb
->mt
->region
);
262 intel_destroy_image(__DRIimage
*image
)
264 intel_region_release(&image
->region
);
269 intel_create_image(__DRIscreen
*screen
,
270 int width
, int height
, int format
,
275 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
279 tiling
= I915_TILING_X
;
280 if (use
& __DRI_IMAGE_USE_CURSOR
) {
281 if (width
!= 64 || height
!= 64)
283 tiling
= I915_TILING_NONE
;
286 image
= CALLOC(sizeof *image
);
290 image
->dri_format
= format
;
293 case __DRI_IMAGE_FORMAT_RGB565
:
294 image
->format
= MESA_FORMAT_RGB565
;
295 image
->internal_format
= GL_RGB
;
296 image
->data_type
= GL_UNSIGNED_BYTE
;
298 case __DRI_IMAGE_FORMAT_XRGB8888
:
299 image
->format
= MESA_FORMAT_XRGB8888
;
300 image
->internal_format
= GL_RGB
;
301 image
->data_type
= GL_UNSIGNED_BYTE
;
303 case __DRI_IMAGE_FORMAT_ARGB8888
:
304 image
->format
= MESA_FORMAT_ARGB8888
;
305 image
->internal_format
= GL_RGBA
;
306 image
->data_type
= GL_UNSIGNED_BYTE
;
308 case __DRI_IMAGE_FORMAT_ABGR8888
:
309 image
->format
= MESA_FORMAT_RGBA8888_REV
;
310 image
->internal_format
= GL_RGBA
;
311 image
->data_type
= GL_UNSIGNED_BYTE
;
318 image
->data
= loaderPrivate
;
319 cpp
= _mesa_get_format_bytes(image
->format
);
322 intel_region_alloc(intelScreen
, tiling
,
323 cpp
, width
, height
, true);
324 if (image
->region
== NULL
) {
333 intel_query_image(__DRIimage
*image
, int attrib
, int *value
)
336 case __DRI_IMAGE_ATTRIB_STRIDE
:
337 *value
= image
->region
->pitch
* image
->region
->cpp
;
339 case __DRI_IMAGE_ATTRIB_HANDLE
:
340 *value
= image
->region
->bo
->handle
;
342 case __DRI_IMAGE_ATTRIB_NAME
:
343 return intel_region_flink(image
->region
, (uint32_t *) value
);
344 case __DRI_IMAGE_ATTRIB_FORMAT
:
345 return image
->dri_format
;
352 intel_dup_image(__DRIimage
*orig_image
, void *loaderPrivate
)
356 image
= CALLOC(sizeof *image
);
360 intel_region_reference(&image
->region
, orig_image
->region
);
361 if (image
->region
== NULL
) {
366 image
->internal_format
= orig_image
->internal_format
;
367 image
->format
= orig_image
->format
;
368 image
->data_type
= orig_image
->data_type
;
369 image
->data
= loaderPrivate
;
375 intel_validate_usage(__DRIimage
*image
, unsigned int use
)
377 if (use
& __DRI_IMAGE_USE_CURSOR
) {
378 if (image
->region
->width
!= 64 || image
->region
->height
!= 64)
385 static struct __DRIimageExtensionRec intelImageExtension
= {
387 intel_create_image_from_name
,
388 intel_create_image_from_renderbuffer
,
396 static const __DRIextension
*intelScreenExtensions
[] = {
397 &intelTexBufferExtension
.base
,
398 &intelFlushExtension
.base
,
399 &intelImageExtension
.base
,
400 &dri2ConfigQueryExtension
.base
,
405 intel_get_param(__DRIscreen
*psp
, int param
, int *value
)
408 struct drm_i915_getparam gp
;
410 memset(&gp
, 0, sizeof(gp
));
414 ret
= drmCommandWriteRead(psp
->fd
, DRM_I915_GETPARAM
, &gp
, sizeof(gp
));
417 _mesa_warning(NULL
, "drm_i915_getparam: %d", ret
);
425 intel_get_boolean(__DRIscreen
*psp
, int param
)
428 return intel_get_param(psp
, param
, &value
) && value
;
432 nop_callback(GLuint key
, void *data
, void *userData
)
437 intelDestroyScreen(__DRIscreen
* sPriv
)
439 struct intel_screen
*intelScreen
= sPriv
->driverPrivate
;
441 dri_bufmgr_destroy(intelScreen
->bufmgr
);
442 driDestroyOptionInfo(&intelScreen
->optionCache
);
444 /* Some regions may still have references to them at this point, so
445 * flush the hash table to prevent _mesa_DeleteHashTable() from
446 * complaining about the hash not being empty; */
447 _mesa_HashDeleteAll(intelScreen
->named_regions
, nop_callback
, NULL
);
448 _mesa_DeleteHashTable(intelScreen
->named_regions
);
451 sPriv
->driverPrivate
= NULL
;
456 * This is called when we need to set up GL rendering to a new X window.
459 intelCreateBuffer(__DRIscreen
* driScrnPriv
,
460 __DRIdrawable
* driDrawPriv
,
461 const struct gl_config
* mesaVis
, GLboolean isPixmap
)
463 struct intel_renderbuffer
*rb
;
464 struct intel_screen
*screen
= (struct intel_screen
*) driScrnPriv
->driverPrivate
;
467 return false; /* not implemented */
472 struct gl_framebuffer
*fb
= CALLOC_STRUCT(gl_framebuffer
);
477 _mesa_initialize_window_framebuffer(fb
, mesaVis
);
479 if (mesaVis
->redBits
== 5)
480 rgbFormat
= MESA_FORMAT_RGB565
;
481 else if (mesaVis
->alphaBits
== 0)
482 rgbFormat
= MESA_FORMAT_XRGB8888
;
484 rgbFormat
= MESA_FORMAT_ARGB8888
;
486 /* setup the hardware-based renderbuffers */
487 rb
= intel_create_renderbuffer(rgbFormat
);
488 _mesa_add_renderbuffer(fb
, BUFFER_FRONT_LEFT
, &rb
->Base
.Base
);
490 if (mesaVis
->doubleBufferMode
) {
491 rb
= intel_create_renderbuffer(rgbFormat
);
492 _mesa_add_renderbuffer(fb
, BUFFER_BACK_LEFT
, &rb
->Base
.Base
);
496 * Assert here that the gl_config has an expected depth/stencil bit
497 * combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(),
498 * which constructs the advertised configs.)
500 if (mesaVis
->depthBits
== 24) {
501 assert(mesaVis
->stencilBits
== 8);
503 if (screen
->hw_has_separate_stencil
504 && screen
->dri2_has_hiz
!= INTEL_DRI2_HAS_HIZ_FALSE
) {
506 * Request a separate stencil buffer even if we do not yet know if
507 * the screen supports it. (See comments for
508 * enum intel_dri2_has_hiz).
510 rb
= intel_create_renderbuffer(MESA_FORMAT_X8_Z24
);
511 _mesa_add_renderbuffer(fb
, BUFFER_DEPTH
, &rb
->Base
.Base
);
512 rb
= intel_create_renderbuffer(MESA_FORMAT_S8
);
513 _mesa_add_renderbuffer(fb
, BUFFER_STENCIL
, &rb
->Base
.Base
);
516 * Use combined depth/stencil. Note that the renderbuffer is
517 * attached to two attachment points.
519 rb
= intel_create_renderbuffer(MESA_FORMAT_S8_Z24
);
520 _mesa_add_renderbuffer(fb
, BUFFER_DEPTH
, &rb
->Base
.Base
);
521 _mesa_add_renderbuffer(fb
, BUFFER_STENCIL
, &rb
->Base
.Base
);
524 else if (mesaVis
->depthBits
== 16) {
525 assert(mesaVis
->stencilBits
== 0);
526 /* just 16-bit depth buffer, no hw stencil */
527 struct intel_renderbuffer
*depthRb
528 = intel_create_renderbuffer(MESA_FORMAT_Z16
);
529 _mesa_add_renderbuffer(fb
, BUFFER_DEPTH
, &depthRb
->Base
.Base
);
532 assert(mesaVis
->depthBits
== 0);
533 assert(mesaVis
->stencilBits
== 0);
536 /* now add any/all software-based renderbuffers we may need */
537 _swrast_add_soft_renderbuffers(fb
,
538 false, /* never sw color */
539 false, /* never sw depth */
540 false, /* never sw stencil */
541 mesaVis
->accumRedBits
> 0,
542 false, /* never sw alpha */
543 false /* never sw aux */ );
544 driDrawPriv
->driverPrivate
= fb
;
551 intelDestroyBuffer(__DRIdrawable
* driDrawPriv
)
553 struct gl_framebuffer
*fb
= driDrawPriv
->driverPrivate
;
555 _mesa_reference_framebuffer(&fb
, NULL
);
558 /* There are probably better ways to do this, such as an
559 * init-designated function to register chipids and createcontext
563 i830CreateContext(const struct gl_config
*mesaVis
,
564 __DRIcontext
*driContextPriv
,
565 void *sharedContextPrivate
);
568 i915CreateContext(int api
,
569 const struct gl_config
*mesaVis
,
570 __DRIcontext
*driContextPriv
,
571 void *sharedContextPrivate
);
573 brwCreateContext(int api
,
574 const struct gl_config
*mesaVis
,
575 __DRIcontext
*driContextPriv
,
576 void *sharedContextPrivate
);
579 intelCreateContext(gl_api api
,
580 const struct gl_config
* mesaVis
,
581 __DRIcontext
* driContextPriv
,
582 unsigned major_version
,
583 unsigned minor_version
,
586 void *sharedContextPrivate
)
588 __DRIscreen
*sPriv
= driContextPriv
->driScreenPriv
;
589 struct intel_screen
*intelScreen
= sPriv
->driverPrivate
;
590 bool success
= false;
593 if (IS_9XX(intelScreen
->deviceID
)) {
594 if (!IS_965(intelScreen
->deviceID
)) {
595 success
= i915CreateContext(api
, mesaVis
, driContextPriv
,
596 sharedContextPrivate
);
599 intelScreen
->no_vbo
= true;
600 success
= i830CreateContext(mesaVis
, driContextPriv
,
601 sharedContextPrivate
);
604 if (IS_965(intelScreen
->deviceID
))
605 success
= brwCreateContext(api
, mesaVis
,
607 sharedContextPrivate
);
611 struct gl_context
*ctx
=
612 (struct gl_context
*) driContextPriv
->driverPrivate
;
614 _mesa_compute_version(ctx
);
615 if (ctx
->VersionMajor
> major_version
616 || (ctx
->VersionMajor
== major_version
617 && ctx
->VersionMinor
>= minor_version
)) {
618 *error
= __DRI_CTX_ERROR_BAD_VERSION
;
622 intelDestroyContext(driContextPriv
);
624 *error
= __DRI_CTX_ERROR_NO_MEMORY
;
625 fprintf(stderr
, "Unrecognized deviceID 0x%x\n", intelScreen
->deviceID
);
632 intel_init_bufmgr(struct intel_screen
*intelScreen
)
634 __DRIscreen
*spriv
= intelScreen
->driScrnPriv
;
637 intelScreen
->no_hw
= getenv("INTEL_NO_HW") != NULL
;
639 intelScreen
->bufmgr
= intel_bufmgr_gem_init(spriv
->fd
, BATCH_SZ
);
640 if (intelScreen
->bufmgr
== NULL
) {
641 fprintf(stderr
, "[%s:%u] Error initializing buffer manager.\n",
646 if (!intel_get_param(spriv
, I915_PARAM_NUM_FENCES_AVAIL
, &num_fences
) ||
648 fprintf(stderr
, "[%s: %u] Kernel 2.6.29 required.\n", __func__
, __LINE__
);
652 drm_intel_bufmgr_gem_enable_fenced_relocs(intelScreen
->bufmgr
);
654 intelScreen
->named_regions
= _mesa_NewHashTable();
656 intelScreen
->relaxed_relocations
= 0;
657 intelScreen
->relaxed_relocations
|=
658 intel_get_boolean(spriv
, I915_PARAM_HAS_RELAXED_DELTA
) << 0;
664 * Override intel_screen.hw_has_separate_stencil with environment variable
665 * INTEL_SEPARATE_STENCIL.
667 * Valid values for INTEL_SEPARATE_STENCIL are "0" and "1". If an invalid
668 * valid value is encountered, a warning is emitted and INTEL_SEPARATE_STENCIL
672 intel_override_separate_stencil(struct intel_screen
*screen
)
674 const char *s
= getenv("INTEL_SEPARATE_STENCIL");
677 } else if (!strncmp("0", s
, 2)) {
678 screen
->hw_has_separate_stencil
= false;
679 } else if (!strncmp("1", s
, 2)) {
680 screen
->hw_has_separate_stencil
= true;
683 "warning: env variable INTEL_SEPARATE_STENCIL=\"%s\" has "
684 "invalid value and is ignored", s
);
689 intel_detect_swizzling(struct intel_screen
*screen
)
691 drm_intel_bo
*buffer
;
692 unsigned long flags
= 0;
693 unsigned long aligned_pitch
;
694 uint32_t tiling
= I915_TILING_X
;
695 uint32_t swizzle_mode
= 0;
697 buffer
= drm_intel_bo_alloc_tiled(screen
->bufmgr
, "swizzle test",
699 &tiling
, &aligned_pitch
, flags
);
703 drm_intel_bo_get_tiling(buffer
, &tiling
, &swizzle_mode
);
704 drm_intel_bo_unreference(buffer
);
706 if (swizzle_mode
== I915_BIT_6_SWIZZLE_NONE
)
713 * This is the driver specific part of the createNewScreen entry point.
714 * Called when using DRI2.
716 * \return the struct gl_config supported by this driver
719 __DRIconfig
**intelInitScreen2(__DRIscreen
*psp
)
721 struct intel_screen
*intelScreen
;
724 unsigned int api_mask
;
726 static const GLenum back_buffer_modes
[] = {
727 GLX_NONE
, GLX_SWAP_UNDEFINED_OML
, GLX_SWAP_COPY_OML
729 uint8_t depth_bits
[4], stencil_bits
[4], msaa_samples_array
[1];
731 __DRIconfig
**configs
= NULL
;
733 /* Allocate the private area */
734 intelScreen
= CALLOC(sizeof *intelScreen
);
736 fprintf(stderr
, "\nERROR! Allocating private area failed\n");
739 /* parse information in __driConfigOptions */
740 driParseOptionInfo(&intelScreen
->optionCache
,
741 __driConfigOptions
, __driNConfigOptions
);
743 intelScreen
->driScrnPriv
= psp
;
744 psp
->driverPrivate
= (void *) intelScreen
;
746 if (!intel_init_bufmgr(intelScreen
))
749 intelScreen
->deviceID
= drm_intel_bufmgr_gem_get_devid(intelScreen
->bufmgr
);
751 intelScreen
->kernel_has_gen7_sol_reset
=
752 intel_get_boolean(intelScreen
->driScrnPriv
,
753 I915_PARAM_HAS_GEN7_SOL_RESET
);
755 if (IS_GEN7(intelScreen
->deviceID
)) {
756 intelScreen
->gen
= 7;
757 } else if (IS_GEN6(intelScreen
->deviceID
)) {
758 intelScreen
->gen
= 6;
759 } else if (IS_GEN5(intelScreen
->deviceID
)) {
760 intelScreen
->gen
= 5;
761 } else if (IS_965(intelScreen
->deviceID
)) {
762 intelScreen
->gen
= 4;
763 } else if (IS_9XX(intelScreen
->deviceID
)) {
764 intelScreen
->gen
= 3;
766 intelScreen
->gen
= 2;
769 intelScreen
->hw_has_separate_stencil
= intelScreen
->gen
>= 6;
770 intelScreen
->hw_must_use_separate_stencil
= intelScreen
->gen
>= 7;
771 intelScreen
->dri2_has_hiz
= INTEL_DRI2_HAS_HIZ_UNKNOWN
;
773 intelScreen
->hw_has_llc
=
774 intel_get_boolean(intelScreen
->driScrnPriv
,
777 intel_override_separate_stencil(intelScreen
);
779 api_mask
= (1 << __DRI_API_OPENGL
);
781 api_mask
|= (1 << __DRI_API_GLES
);
784 api_mask
|= (1 << __DRI_API_GLES2
);
787 if (IS_9XX(intelScreen
->deviceID
) || IS_965(intelScreen
->deviceID
))
788 psp
->api_mask
= api_mask
;
790 intelScreen
->hw_has_swizzling
= intel_detect_swizzling(intelScreen
);
792 psp
->extensions
= intelScreenExtensions
;
794 msaa_samples_array
[0] = 0;
796 fb_format
[0] = GL_RGB
;
797 fb_type
[0] = GL_UNSIGNED_SHORT_5_6_5
;
799 fb_format
[1] = GL_BGR
;
800 fb_type
[1] = GL_UNSIGNED_INT_8_8_8_8_REV
;
802 fb_format
[2] = GL_BGRA
;
803 fb_type
[2] = GL_UNSIGNED_INT_8_8_8_8_REV
;
808 /* Generate a rich set of useful configs that do not include an
809 * accumulation buffer.
811 for (color
= 0; color
< ARRAY_SIZE(fb_format
); color
++) {
812 __DRIconfig
**new_configs
;
815 /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
816 * buffer that has a diffferent number of bits per pixel than the color
817 * buffer. This isn't yet supported here.
819 if (fb_type
[color
] == GL_UNSIGNED_SHORT_5_6_5
) {
829 new_configs
= driCreateConfigs(fb_format
[color
], fb_type
[color
],
834 ARRAY_SIZE(back_buffer_modes
),
836 ARRAY_SIZE(msaa_samples_array
),
839 configs
= new_configs
;
841 configs
= driConcatConfigs(configs
, new_configs
);
844 /* Generate the minimum possible set of configs that include an
845 * accumulation buffer.
847 for (color
= 0; color
< ARRAY_SIZE(fb_format
); color
++) {
848 __DRIconfig
**new_configs
;
850 if (fb_type
[color
] == GL_UNSIGNED_SHORT_5_6_5
) {
858 new_configs
= driCreateConfigs(fb_format
[color
], fb_type
[color
],
859 depth_bits
, stencil_bits
, 1,
860 back_buffer_modes
+ 1, 1,
861 msaa_samples_array
, 1,
864 configs
= new_configs
;
866 configs
= driConcatConfigs(configs
, new_configs
);
869 if (configs
== NULL
) {
870 fprintf(stderr
, "[%s:%u] Error creating FBConfig!\n", __func__
,
875 return (const __DRIconfig
**)configs
;
878 struct intel_buffer
{
880 struct intel_region
*region
;
884 * \brief Get tiling format for a DRI buffer.
886 * \param attachment is the buffer's attachmet point, such as
887 * __DRI_BUFFER_DEPTH.
888 * \param out_tiling is the returned tiling format for buffer.
889 * \return false if attachment is unrecognized or is incompatible with screen.
892 intel_get_dri_buffer_tiling(struct intel_screen
*screen
,
894 uint32_t *out_tiling
)
896 if (screen
->gen
< 4) {
897 *out_tiling
= I915_TILING_X
;
901 switch (attachment
) {
902 case __DRI_BUFFER_DEPTH
:
903 case __DRI_BUFFER_DEPTH_STENCIL
:
904 case __DRI_BUFFER_HIZ
:
905 *out_tiling
= I915_TILING_Y
;
907 case __DRI_BUFFER_ACCUM
:
908 case __DRI_BUFFER_FRONT_LEFT
:
909 case __DRI_BUFFER_FRONT_RIGHT
:
910 case __DRI_BUFFER_BACK_LEFT
:
911 case __DRI_BUFFER_BACK_RIGHT
:
912 case __DRI_BUFFER_FAKE_FRONT_LEFT
:
913 case __DRI_BUFFER_FAKE_FRONT_RIGHT
:
914 *out_tiling
= I915_TILING_X
;
916 case __DRI_BUFFER_STENCIL
:
917 /* The stencil buffer is W tiled. However, we request from the kernel
918 * a non-tiled buffer because the GTT is incapable of W fencing.
920 *out_tiling
= I915_TILING_NONE
;
923 if(unlikely(INTEL_DEBUG
& DEBUG_DRI
)) {
924 fprintf(stderr
, "error: %s: unrecognized DRI buffer attachment 0x%x\n",
925 __FUNCTION__
, attachment
);
932 intelAllocateBuffer(__DRIscreen
*screen
,
933 unsigned attachment
, unsigned format
,
934 int width
, int height
)
936 struct intel_buffer
*intelBuffer
;
937 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
940 uint32_t region_width
;
941 uint32_t region_height
;
946 ok
= intel_get_dri_buffer_tiling(intelScreen
, attachment
, &tiling
);
950 intelBuffer
= CALLOC(sizeof *intelBuffer
);
951 if (intelBuffer
== NULL
)
954 if (attachment
== __DRI_BUFFER_STENCIL
) {
955 /* Stencil buffers use W tiling, a tiling format that the DRM functions
956 * don't properly account for. Therefore, when we allocate a stencil
957 * buffer that is private to Mesa (see intel_miptree_create), we round
958 * the height and width up to the next multiple of the tile size (64x64)
959 * and then ask DRM to allocate an untiled buffer. Consequently, the
960 * height and the width stored in the stencil buffer's region structure
961 * are always multiples of 64, even if the stencil buffer itself is
964 * To avoid inconsistencies between how we represent private buffers and
965 * buffers shared with the window system, round up the height and width
966 * for window system buffers too.
968 region_width
= ALIGN(width
, 64);
969 region_height
= ALIGN(height
, 64);
971 region_width
= width
;
972 region_height
= height
;
975 region_cpp
= format
/ 8;
977 intelBuffer
->region
= intel_region_alloc(intelScreen
,
984 if (intelBuffer
->region
== NULL
) {
989 intel_region_flink(intelBuffer
->region
, &intelBuffer
->base
.name
);
991 intelBuffer
->base
.attachment
= attachment
;
992 intelBuffer
->base
.cpp
= intelBuffer
->region
->cpp
;
993 intelBuffer
->base
.pitch
=
994 intelBuffer
->region
->pitch
* intelBuffer
->region
->cpp
;
996 return &intelBuffer
->base
;
1000 intelReleaseBuffer(__DRIscreen
*screen
, __DRIbuffer
*buffer
)
1002 struct intel_buffer
*intelBuffer
= (struct intel_buffer
*) buffer
;
1004 intel_region_release(&intelBuffer
->region
);
1009 const struct __DriverAPIRec driDriverAPI
= {
1010 .InitScreen
= intelInitScreen2
,
1011 .DestroyScreen
= intelDestroyScreen
,
1012 .CreateContext
= intelCreateContext
,
1013 .DestroyContext
= intelDestroyContext
,
1014 .CreateBuffer
= intelCreateBuffer
,
1015 .DestroyBuffer
= intelDestroyBuffer
,
1016 .MakeCurrent
= intelMakeCurrent
,
1017 .UnbindContext
= intelUnbindContext
,
1018 .AllocateBuffer
= intelAllocateBuffer
,
1019 .ReleaseBuffer
= intelReleaseBuffer
1022 /* This is the table of extensions that the loader will dlsym() for. */
1023 PUBLIC
const __DRIextension
*__driDriverExtensions
[] = {
1024 &driCoreExtension
.base
,
1025 &driDRI2Extension
.base
,