1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 #include "main/glheader.h"
29 #include "main/macros.h"
30 #include "main/mtypes.h"
31 #include "main/colormac.h"
33 #include "intel_fbo.h"
34 #include "intel_screen.h"
35 #include "intel_span.h"
36 #include "intel_regions.h"
37 #include "intel_tex.h"
39 #include "swrast/swrast.h"
42 intel_set_span_functions(struct intel_context
*intel
,
43 struct gl_renderbuffer
*rb
);
45 #define SPAN_CACHE_SIZE 4096
48 get_span_cache(struct intel_renderbuffer
*irb
, uint32_t offset
)
50 if (irb
->span_cache
== NULL
) {
51 irb
->span_cache
= _mesa_malloc(SPAN_CACHE_SIZE
);
52 irb
->span_cache_offset
= -1;
55 if ((offset
& ~(SPAN_CACHE_SIZE
- 1)) != irb
->span_cache_offset
) {
56 irb
->span_cache_offset
= offset
& ~(SPAN_CACHE_SIZE
- 1);
57 dri_bo_get_subdata(irb
->region
->buffer
, irb
->span_cache_offset
,
58 SPAN_CACHE_SIZE
, irb
->span_cache
);
63 clear_span_cache(struct intel_renderbuffer
*irb
)
65 irb
->span_cache_offset
= -1;
69 pread_32(struct intel_renderbuffer
*irb
, uint32_t offset
)
71 get_span_cache(irb
, offset
);
73 return *(uint32_t *)(irb
->span_cache
+ (offset
& (SPAN_CACHE_SIZE
- 1)));
77 pread_xrgb8888(struct intel_renderbuffer
*irb
, uint32_t offset
)
79 get_span_cache(irb
, offset
);
81 return *(uint32_t *)(irb
->span_cache
+ (offset
& (SPAN_CACHE_SIZE
- 1))) |
86 pread_16(struct intel_renderbuffer
*irb
, uint32_t offset
)
88 get_span_cache(irb
, offset
);
90 return *(uint16_t *)(irb
->span_cache
+ (offset
& (SPAN_CACHE_SIZE
- 1)));
94 pread_8(struct intel_renderbuffer
*irb
, uint32_t offset
)
96 get_span_cache(irb
, offset
);
98 return *(uint8_t *)(irb
->span_cache
+ (offset
& (SPAN_CACHE_SIZE
- 1)));
102 pwrite_32(struct intel_renderbuffer
*irb
, uint32_t offset
, uint32_t val
)
104 clear_span_cache(irb
);
106 dri_bo_subdata(irb
->region
->buffer
, offset
, 4, &val
);
110 pwrite_xrgb8888(struct intel_renderbuffer
*irb
, uint32_t offset
, uint32_t val
)
112 clear_span_cache(irb
);
114 dri_bo_subdata(irb
->region
->buffer
, offset
, 3, &val
);
118 pwrite_16(struct intel_renderbuffer
*irb
, uint32_t offset
, uint16_t val
)
120 clear_span_cache(irb
);
122 dri_bo_subdata(irb
->region
->buffer
, offset
, 2, &val
);
126 pwrite_8(struct intel_renderbuffer
*irb
, uint32_t offset
, uint8_t val
)
128 clear_span_cache(irb
);
130 dri_bo_subdata(irb
->region
->buffer
, offset
, 1, &val
);
133 static uint32_t no_tile_swizzle(struct intel_renderbuffer
*irb
,
134 struct intel_context
*intel
,
140 return (y
* irb
->region
->pitch
+ x
) * irb
->region
->cpp
;
144 * Deal with tiled surfaces
147 static uint32_t x_tile_swizzle(struct intel_renderbuffer
*irb
,
148 struct intel_context
*intel
,
153 int x_tile_off
, y_tile_off
;
154 int x_tile_number
, y_tile_number
;
155 int tile_off
, tile_base
;
157 tile_stride
= (irb
->pfPitch
* irb
->region
->cpp
) << 3;
162 xbyte
= x
* irb
->region
->cpp
;
164 x_tile_off
= xbyte
& 0x1ff;
167 x_tile_number
= xbyte
>> 9;
168 y_tile_number
= y
>> 3;
170 tile_off
= (y_tile_off
<< 9) + x_tile_off
;
172 switch (irb
->region
->bit_6_swizzle
) {
173 case I915_BIT_6_SWIZZLE_NONE
:
175 case I915_BIT_6_SWIZZLE_9
:
176 tile_off
^= ((tile_off
>> 3) & 64);
178 case I915_BIT_6_SWIZZLE_9_10
:
179 tile_off
^= ((tile_off
>> 3) & 64) ^ ((tile_off
>> 4) & 64);
181 case I915_BIT_6_SWIZZLE_9_11
:
182 tile_off
^= ((tile_off
>> 3) & 64) ^ ((tile_off
>> 5) & 64);
184 case I915_BIT_6_SWIZZLE_9_10_11
:
185 tile_off
^= ((tile_off
>> 3) & 64) ^ ((tile_off
>> 4) & 64) ^
186 ((tile_off
>> 5) & 64);
189 fprintf(stderr
, "Unknown tile swizzling mode %d\n",
190 irb
->region
->bit_6_swizzle
);
194 tile_base
= (x_tile_number
<< 12) + y_tile_number
* tile_stride
;
197 printf("(%d,%d) -> %d + %d = %d (pitch = %d, tstride = %d)\n",
198 x
, y
, tile_off
, tile_base
,
199 tile_off
+ tile_base
,
200 irb
->pfPitch
, tile_stride
);
203 return tile_base
+ tile_off
;
206 static uint32_t y_tile_swizzle(struct intel_renderbuffer
*irb
,
207 struct intel_context
*intel
,
212 int x_tile_off
, y_tile_off
;
213 int x_tile_number
, y_tile_number
;
214 int tile_off
, tile_base
;
216 tile_stride
= (irb
->pfPitch
* irb
->region
->cpp
) << 5;
221 xbyte
= x
* irb
->region
->cpp
;
223 x_tile_off
= xbyte
& 0x7f;
224 y_tile_off
= y
& 0x1f;
226 x_tile_number
= xbyte
>> 7;
227 y_tile_number
= y
>> 5;
229 tile_off
= ((x_tile_off
& ~0xf) << 5) + (y_tile_off
<< 4) +
232 switch (irb
->region
->bit_6_swizzle
) {
233 case I915_BIT_6_SWIZZLE_NONE
:
235 case I915_BIT_6_SWIZZLE_9
:
236 tile_off
^= ((tile_off
>> 3) & 64);
238 case I915_BIT_6_SWIZZLE_9_10
:
239 tile_off
^= ((tile_off
>> 3) & 64) ^ ((tile_off
>> 4) & 64);
241 case I915_BIT_6_SWIZZLE_9_11
:
242 tile_off
^= ((tile_off
>> 3) & 64) ^ ((tile_off
>> 5) & 64);
244 case I915_BIT_6_SWIZZLE_9_10_11
:
245 tile_off
^= ((tile_off
>> 3) & 64) ^ ((tile_off
>> 4) & 64) ^
246 ((tile_off
>> 5) & 64);
249 fprintf(stderr
, "Unknown tile swizzling mode %d\n",
250 irb
->region
->bit_6_swizzle
);
254 tile_base
= (x_tile_number
<< 12) + y_tile_number
* tile_stride
;
256 return tile_base
+ tile_off
;
260 break intelWriteRGBASpan_ARGB8888
267 struct intel_context *intel = intel_context(ctx); \
268 struct intel_renderbuffer *irb = intel_renderbuffer(rb); \
269 const GLint yScale = irb->RenderToTexture ? 1 : -1; \
270 const GLint yBias = irb->RenderToTexture ? 0 : irb->Base.Height - 1; \
274 /* XXX FBO: this is identical to the macro in spantmp2.h except we get
275 * the cliprect info from the context, not the driDrawable.
276 * Move this into spantmp2.h someday.
278 #define HW_CLIPLOOP() \
280 int _nc = intel->numClipRects; \
282 int minx = intel->pClipRects[_nc].x1 - intel->drawX; \
283 int miny = intel->pClipRects[_nc].y1 - intel->drawY; \
284 int maxx = intel->pClipRects[_nc].x2 - intel->drawX; \
285 int maxy = intel->pClipRects[_nc].y2 - intel->drawY;
291 #define Y_FLIP(_y) ((_y) * yScale + yBias)
293 /* XXX with GEM, these need to tell the kernel */
298 /* 16 bit, RGB565 color spanline and pixel functions
300 #define SPANTMP_PIXEL_FMT GL_RGB
301 #define SPANTMP_PIXEL_TYPE GL_UNSIGNED_SHORT_5_6_5
303 #define TAG(x) intel##x##_RGB565
304 #define TAG2(x,y) intel##x##_RGB565##y
305 #define GET_VALUE(X, Y) pread_16(irb, no_tile_swizzle(irb, intel, X, Y))
306 #define PUT_VALUE(X, Y, V) pwrite_16(irb, no_tile_swizzle(irb, intel, X, Y), V)
307 #include "spantmp2.h"
309 /* 32 bit, ARGB8888 color spanline and pixel functions
311 #define SPANTMP_PIXEL_FMT GL_BGRA
312 #define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV
314 #define TAG(x) intel##x##_ARGB8888
315 #define TAG2(x,y) intel##x##_ARGB8888##y
316 #define GET_VALUE(X, Y) pread_32(irb, no_tile_swizzle(irb, intel, X, Y))
317 #define PUT_VALUE(X, Y, V) pwrite_32(irb, no_tile_swizzle(irb, intel, X, Y), V)
318 #include "spantmp2.h"
320 /* 32 bit, xRGB8888 color spanline and pixel functions
322 #define SPANTMP_PIXEL_FMT GL_BGRA
323 #define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV
325 #define TAG(x) intel##x##_xRGB8888
326 #define TAG2(x,y) intel##x##_xRGB8888##y
327 #define GET_VALUE(X, Y) pread_xrgb8888(irb, no_tile_swizzle(irb, intel, X, Y))
328 #define PUT_VALUE(X, Y, V) pwrite_xrgb8888(irb, no_tile_swizzle(irb, intel, X, Y), V)
329 #include "spantmp2.h"
331 /* 16 bit RGB565 color tile spanline and pixel functions
334 #define SPANTMP_PIXEL_FMT GL_RGB
335 #define SPANTMP_PIXEL_TYPE GL_UNSIGNED_SHORT_5_6_5
337 #define TAG(x) intel_XTile_##x##_RGB565
338 #define TAG2(x,y) intel_XTile_##x##_RGB565##y
339 #define GET_VALUE(X, Y) pread_16(irb, x_tile_swizzle(irb, intel, X, Y))
340 #define PUT_VALUE(X, Y, V) pwrite_16(irb, x_tile_swizzle(irb, intel, X, Y), V)
341 #include "spantmp2.h"
343 #define SPANTMP_PIXEL_FMT GL_RGB
344 #define SPANTMP_PIXEL_TYPE GL_UNSIGNED_SHORT_5_6_5
346 #define TAG(x) intel_YTile_##x##_RGB565
347 #define TAG2(x,y) intel_YTile_##x##_RGB565##y
348 #define GET_VALUE(X, Y) pread_16(irb, y_tile_swizzle(irb, intel, X, Y))
349 #define PUT_VALUE(X, Y, V) pwrite_16(irb, y_tile_swizzle(irb, intel, X, Y), V)
350 #include "spantmp2.h"
352 /* 32 bit ARGB888 color tile spanline and pixel functions
355 #define SPANTMP_PIXEL_FMT GL_BGRA
356 #define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV
358 #define TAG(x) intel_XTile_##x##_ARGB8888
359 #define TAG2(x,y) intel_XTile_##x##_ARGB8888##y
360 #define GET_VALUE(X, Y) pread_32(irb, x_tile_swizzle(irb, intel, X, Y))
361 #define PUT_VALUE(X, Y, V) pwrite_32(irb, x_tile_swizzle(irb, intel, X, Y), V)
362 #include "spantmp2.h"
364 #define SPANTMP_PIXEL_FMT GL_BGRA
365 #define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV
367 #define TAG(x) intel_YTile_##x##_ARGB8888
368 #define TAG2(x,y) intel_YTile_##x##_ARGB8888##y
369 #define GET_VALUE(X, Y) pread_32(irb, y_tile_swizzle(irb, intel, X, Y))
370 #define PUT_VALUE(X, Y, V) pwrite_32(irb, y_tile_swizzle(irb, intel, X, Y), V)
371 #include "spantmp2.h"
373 /* 32 bit xRGB888 color tile spanline and pixel functions
376 #define SPANTMP_PIXEL_FMT GL_BGRA
377 #define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV
379 #define TAG(x) intel_XTile_##x##_xRGB8888
380 #define TAG2(x,y) intel_XTile_##x##_xRGB8888##y
381 #define GET_VALUE(X, Y) pread_xrgb8888(irb, x_tile_swizzle(irb, intel, X, Y))
382 #define PUT_VALUE(X, Y, V) pwrite_xrgb8888(irb, x_tile_swizzle(irb, intel, X, Y), V)
383 #include "spantmp2.h"
385 #define SPANTMP_PIXEL_FMT GL_BGRA
386 #define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV
388 #define TAG(x) intel_YTile_##x##_xRGB8888
389 #define TAG2(x,y) intel_YTile_##x##_xRGB8888##y
390 #define GET_VALUE(X, Y) pread_xrgb8888(irb, y_tile_swizzle(irb, intel, X, Y))
391 #define PUT_VALUE(X, Y, V) pwrite_xrgb8888(irb, y_tile_swizzle(irb, intel, X, Y), V)
392 #include "spantmp2.h"
394 #define LOCAL_DEPTH_VARS \
395 struct intel_context *intel = intel_context(ctx); \
396 struct intel_renderbuffer *irb = intel_renderbuffer(rb); \
397 const GLint yScale = irb->RenderToTexture ? 1 : -1; \
398 const GLint yBias = irb->RenderToTexture ? 0 : irb->Base.Height - 1;
401 #define LOCAL_STENCIL_VARS LOCAL_DEPTH_VARS
404 ** 16-bit depthbuffer functions.
406 #define VALUE_TYPE GLushort
407 #define WRITE_DEPTH(_x, _y, d) \
408 pwrite_16(irb, no_tile_swizzle(irb, intel, _x, _y), d)
409 #define READ_DEPTH(d, _x, _y) \
410 d = pread_16(irb, no_tile_swizzle(irb, intel, _x, _y))
411 #define TAG(x) intel##x##_z16
412 #include "depthtmp.h"
416 ** 16-bit x tile depthbuffer functions.
418 #define VALUE_TYPE GLushort
419 #define WRITE_DEPTH(_x, _y, d) \
420 pwrite_16(irb, x_tile_swizzle(irb, intel, _x, _y), d)
421 #define READ_DEPTH(d, _x, _y) \
422 d = pread_16(irb, x_tile_swizzle(irb, intel, _x, _y))
423 #define TAG(x) intel_XTile_##x##_z16
424 #include "depthtmp.h"
427 ** 16-bit y tile depthbuffer functions.
429 #define VALUE_TYPE GLushort
430 #define WRITE_DEPTH(_x, _y, d) \
431 pwrite_16(irb, y_tile_swizzle(irb, intel, _x, _y), d)
432 #define READ_DEPTH(d, _x, _y) \
433 d = pread_16(irb, y_tile_swizzle(irb, intel, _x, _y))
434 #define TAG(x) intel_YTile_##x##_z16
435 #include "depthtmp.h"
439 ** 24/8-bit interleaved depth/stencil functions
440 ** Note: we're actually reading back combined depth+stencil values.
441 ** The wrappers in main/depthstencil.c are used to extract the depth
442 ** and stencil values.
444 #define VALUE_TYPE GLuint
446 /* Change ZZZS -> SZZZ */
447 #define WRITE_DEPTH(_x, _y, d) \
448 pwrite_32(irb, no_tile_swizzle(irb, intel, _x, _y), \
449 ((d) >> 8) | ((d) << 24))
451 /* Change SZZZ -> ZZZS */
452 #define READ_DEPTH( d, _x, _y ) { \
453 GLuint tmp = pread_32(irb, no_tile_swizzle(irb, intel, _x, _y)); \
454 d = (tmp << 8) | (tmp >> 24); \
457 #define TAG(x) intel##x##_z24_s8
458 #include "depthtmp.h"
462 ** 24/8-bit x-tile interleaved depth/stencil functions
463 ** Note: we're actually reading back combined depth+stencil values.
464 ** The wrappers in main/depthstencil.c are used to extract the depth
465 ** and stencil values.
467 #define VALUE_TYPE GLuint
469 /* Change ZZZS -> SZZZ */
470 #define WRITE_DEPTH(_x, _y, d) \
471 pwrite_32(irb, x_tile_swizzle(irb, intel, _x, _y), \
472 ((d) >> 8) | ((d) << 24)) \
474 /* Change SZZZ -> ZZZS */
475 #define READ_DEPTH( d, _x, _y ) { \
476 GLuint tmp = pread_32(irb, x_tile_swizzle(irb, intel, _x, _y)); \
477 d = (tmp << 8) | (tmp >> 24); \
480 #define TAG(x) intel_XTile_##x##_z24_s8
481 #include "depthtmp.h"
484 ** 24/8-bit y-tile interleaved depth/stencil functions
485 ** Note: we're actually reading back combined depth+stencil values.
486 ** The wrappers in main/depthstencil.c are used to extract the depth
487 ** and stencil values.
489 #define VALUE_TYPE GLuint
491 /* Change ZZZS -> SZZZ */
492 #define WRITE_DEPTH(_x, _y, d) \
493 pwrite_32(irb, y_tile_swizzle(irb, intel, _x, _y), \
494 ((d) >> 8) | ((d) << 24))
496 /* Change SZZZ -> ZZZS */
497 #define READ_DEPTH( d, _x, _y ) { \
498 GLuint tmp = pread_32(irb, y_tile_swizzle(irb, intel, _x, _y)); \
499 d = (tmp << 8) | (tmp >> 24); \
502 #define TAG(x) intel_YTile_##x##_z24_s8
503 #include "depthtmp.h"
507 ** 8-bit stencil function (XXX FBO: This is obsolete)
509 #define WRITE_STENCIL(_x, _y, d) \
510 pwrite_8(irb, no_tile_swizzle(irb, intel, _x, _y) + 3, d)
512 #define READ_STENCIL(d, _x, _y) \
513 d = pread_8(irb, no_tile_swizzle(irb, intel, _x, _y) + 3);
515 #define TAG(x) intel##x##_z24_s8
516 #include "stenciltmp.h"
519 ** 8-bit x-tile stencil function (XXX FBO: This is obsolete)
521 #define WRITE_STENCIL(_x, _y, d) \
522 pwrite_8(irb, x_tile_swizzle(irb, intel, _x, _y) + 3, d)
524 #define READ_STENCIL(d, _x, _y) \
525 d = pread_8(irb, x_tile_swizzle(irb, intel, _x, _y) + 3);
527 #define TAG(x) intel_XTile_##x##_z24_s8
528 #include "stenciltmp.h"
531 ** 8-bit y-tile stencil function (XXX FBO: This is obsolete)
533 #define WRITE_STENCIL(_x, _y, d) \
534 pwrite_8(irb, y_tile_swizzle(irb, intel, _x, _y) + 3, d)
536 #define READ_STENCIL(d, _x, _y) \
537 d = pread_8(irb, y_tile_swizzle(irb, intel, _x, _y) + 3)
539 #define TAG(x) intel_YTile_##x##_z24_s8
540 #include "stenciltmp.h"
543 intel_renderbuffer_map(struct intel_context
*intel
, struct gl_renderbuffer
*rb
)
545 struct intel_renderbuffer
*irb
= intel_renderbuffer(rb
);
547 if (irb
== NULL
|| irb
->region
== NULL
)
550 irb
->pfPitch
= irb
->region
->pitch
;
552 intel_set_span_functions(intel
, rb
);
556 intel_renderbuffer_unmap(struct intel_context
*intel
,
557 struct gl_renderbuffer
*rb
)
559 struct intel_renderbuffer
*irb
= intel_renderbuffer(rb
);
561 if (irb
== NULL
|| irb
->region
== NULL
)
564 clear_span_cache(irb
);
572 * Map or unmap all the renderbuffers which we may need during
573 * software rendering.
574 * XXX in the future, we could probably convey extra information to
575 * reduce the number of mappings needed. I.e. if doing a glReadPixels
576 * from the depth buffer, we really only need one mapping.
578 * XXX Rewrite this function someday.
579 * We can probably just loop over all the renderbuffer attachments,
580 * map/unmap all of them, and not worry about the _ColorDrawBuffers
581 * _ColorReadBuffer, _DepthBuffer or _StencilBuffer fields.
584 intel_map_unmap_buffers(struct intel_context
*intel
, GLboolean map
)
586 GLcontext
*ctx
= &intel
->ctx
;
589 /* color draw buffers */
590 for (j
= 0; j
< ctx
->DrawBuffer
->_NumColorDrawBuffers
; j
++) {
592 intel_renderbuffer_map(intel
, ctx
->DrawBuffer
->_ColorDrawBuffers
[j
]);
594 intel_renderbuffer_unmap(intel
, ctx
->DrawBuffer
->_ColorDrawBuffers
[j
]);
597 /* check for render to textures */
598 for (i
= 0; i
< BUFFER_COUNT
; i
++) {
599 struct gl_renderbuffer_attachment
*att
=
600 ctx
->DrawBuffer
->Attachment
+ i
;
601 struct gl_texture_object
*tex
= att
->Texture
;
603 /* render to texture */
604 ASSERT(att
->Renderbuffer
);
606 struct gl_texture_image
*texImg
;
607 texImg
= tex
->Image
[att
->CubeMapFace
][att
->TextureLevel
];
608 intel_tex_map_images(intel
, intel_texture_object(tex
));
611 intel_tex_unmap_images(intel
, intel_texture_object(tex
));
616 /* color read buffers */
618 intel_renderbuffer_map(intel
, ctx
->ReadBuffer
->_ColorReadBuffer
);
620 intel_renderbuffer_unmap(intel
, ctx
->ReadBuffer
->_ColorReadBuffer
);
622 /* depth buffer (Note wrapper!) */
623 if (ctx
->DrawBuffer
->_DepthBuffer
) {
625 intel_renderbuffer_map(intel
, ctx
->DrawBuffer
->_DepthBuffer
->Wrapped
);
627 intel_renderbuffer_unmap(intel
,
628 ctx
->DrawBuffer
->_DepthBuffer
->Wrapped
);
631 /* stencil buffer (Note wrapper!) */
632 if (ctx
->DrawBuffer
->_StencilBuffer
) {
634 intel_renderbuffer_map(intel
,
635 ctx
->DrawBuffer
->_StencilBuffer
->Wrapped
);
637 intel_renderbuffer_unmap(intel
,
638 ctx
->DrawBuffer
->_StencilBuffer
->Wrapped
);
645 * Prepare for softare rendering. Map current read/draw framebuffers'
646 * renderbuffes and all currently bound texture objects.
648 * Old note: Moved locking out to get reasonable span performance.
651 intelSpanRenderStart(GLcontext
* ctx
)
653 struct intel_context
*intel
= intel_context(ctx
);
656 intelFlush(&intel
->ctx
);
657 LOCK_HARDWARE(intel
);
659 for (i
= 0; i
< ctx
->Const
.MaxTextureCoordUnits
; i
++) {
660 if (ctx
->Texture
.Unit
[i
]._ReallyEnabled
) {
661 struct gl_texture_object
*texObj
= ctx
->Texture
.Unit
[i
]._Current
;
662 intel_tex_map_images(intel
, intel_texture_object(texObj
));
666 intel_map_unmap_buffers(intel
, GL_TRUE
);
670 * Called when done softare rendering. Unmap the buffers we mapped in
671 * the above function.
674 intelSpanRenderFinish(GLcontext
* ctx
)
676 struct intel_context
*intel
= intel_context(ctx
);
681 for (i
= 0; i
< ctx
->Const
.MaxTextureCoordUnits
; i
++) {
682 if (ctx
->Texture
.Unit
[i
]._ReallyEnabled
) {
683 struct gl_texture_object
*texObj
= ctx
->Texture
.Unit
[i
]._Current
;
684 intel_tex_unmap_images(intel
, intel_texture_object(texObj
));
688 intel_map_unmap_buffers(intel
, GL_FALSE
);
690 UNLOCK_HARDWARE(intel
);
695 intelInitSpanFuncs(GLcontext
* ctx
)
697 struct swrast_device_driver
*swdd
= _swrast_GetDeviceDriverReference(ctx
);
698 swdd
->SpanRenderStart
= intelSpanRenderStart
;
699 swdd
->SpanRenderFinish
= intelSpanRenderFinish
;
704 * Plug in appropriate span read/write functions for the given renderbuffer.
705 * These are used for the software fallbacks.
708 intel_set_span_functions(struct intel_context
*intel
,
709 struct gl_renderbuffer
*rb
)
711 struct intel_renderbuffer
*irb
= (struct intel_renderbuffer
*) rb
;
714 /* If in GEM mode, we need to do the tile address swizzling ourselves,
715 * instead of the fence registers handling it.
718 tiling
= irb
->region
->tiling
;
720 tiling
= I915_TILING_NONE
;
722 if (rb
->_ActualFormat
== GL_RGB5
) {
725 case I915_TILING_NONE
:
727 intelInitPointers_RGB565(rb
);
730 intel_XTile_InitPointers_RGB565(rb
);
733 intel_YTile_InitPointers_RGB565(rb
);
737 else if (rb
->_ActualFormat
== GL_RGB8
) {
740 case I915_TILING_NONE
:
742 intelInitPointers_xRGB8888(rb
);
745 intel_XTile_InitPointers_xRGB8888(rb
);
748 intel_YTile_InitPointers_xRGB8888(rb
);
752 else if (rb
->_ActualFormat
== GL_RGBA8
) {
755 case I915_TILING_NONE
:
757 intelInitPointers_ARGB8888(rb
);
760 intel_XTile_InitPointers_ARGB8888(rb
);
763 intel_YTile_InitPointers_ARGB8888(rb
);
767 else if (rb
->_ActualFormat
== GL_DEPTH_COMPONENT16
) {
769 case I915_TILING_NONE
:
771 intelInitDepthPointers_z16(rb
);
774 intel_XTile_InitDepthPointers_z16(rb
);
777 intel_YTile_InitDepthPointers_z16(rb
);
781 else if (rb
->_ActualFormat
== GL_DEPTH_COMPONENT24
|| /* XXX FBO remove */
782 rb
->_ActualFormat
== GL_DEPTH24_STENCIL8_EXT
) {
784 case I915_TILING_NONE
:
786 intelInitDepthPointers_z24_s8(rb
);
789 intel_XTile_InitDepthPointers_z24_s8(rb
);
792 intel_YTile_InitDepthPointers_z24_s8(rb
);
796 else if (rb
->_ActualFormat
== GL_STENCIL_INDEX8_EXT
) {
798 case I915_TILING_NONE
:
800 intelInitStencilPointers_z24_s8(rb
);
803 intel_XTile_InitStencilPointers_z24_s8(rb
);
806 intel_YTile_InitStencilPointers_z24_s8(rb
);
812 "Unexpected _ActualFormat in intelSetSpanFunctions");