1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
33 #include "intel_fbo.h"
34 #include "intel_screen.h"
35 #include "intel_span.h"
36 #include "intel_regions.h"
37 #include "intel_ioctl.h"
38 #include "intel_tex.h"
40 #include "swrast/swrast.h"
43 intel_set_span_functions(struct intel_context
*intel
,
44 struct gl_renderbuffer
*rb
);
46 #define SPAN_CACHE_SIZE 4096
49 get_span_cache(struct intel_renderbuffer
*irb
, uint32_t offset
)
51 if (irb
->span_cache
== NULL
) {
52 irb
->span_cache
= _mesa_malloc(SPAN_CACHE_SIZE
);
53 irb
->span_cache_offset
= -1;
56 if ((offset
& ~(SPAN_CACHE_SIZE
- 1)) != irb
->span_cache_offset
) {
57 irb
->span_cache_offset
= offset
& ~(SPAN_CACHE_SIZE
- 1);
58 dri_bo_get_subdata(irb
->region
->buffer
, irb
->span_cache_offset
,
59 SPAN_CACHE_SIZE
, irb
->span_cache
);
64 clear_span_cache(struct intel_renderbuffer
*irb
)
66 irb
->span_cache_offset
= -1;
70 pread_32(struct intel_renderbuffer
*irb
, uint32_t offset
)
72 get_span_cache(irb
, offset
);
74 return *(uint32_t *)(irb
->span_cache
+ (offset
& (SPAN_CACHE_SIZE
- 1)));
78 pread_xrgb8888(struct intel_renderbuffer
*irb
, uint32_t offset
)
80 get_span_cache(irb
, offset
);
82 return *(uint32_t *)(irb
->span_cache
+ (offset
& (SPAN_CACHE_SIZE
- 1))) |
87 pread_16(struct intel_renderbuffer
*irb
, uint32_t offset
)
89 get_span_cache(irb
, offset
);
91 return *(uint16_t *)(irb
->span_cache
+ (offset
& (SPAN_CACHE_SIZE
- 1)));
95 pread_8(struct intel_renderbuffer
*irb
, uint32_t offset
)
97 get_span_cache(irb
, offset
);
99 return *(uint8_t *)(irb
->span_cache
+ (offset
& (SPAN_CACHE_SIZE
- 1)));
103 pwrite_32(struct intel_renderbuffer
*irb
, uint32_t offset
, uint32_t val
)
105 clear_span_cache(irb
);
107 dri_bo_subdata(irb
->region
->buffer
, offset
, 4, &val
);
111 pwrite_xrgb8888(struct intel_renderbuffer
*irb
, uint32_t offset
, uint32_t val
)
113 clear_span_cache(irb
);
115 dri_bo_subdata(irb
->region
->buffer
, offset
, 3, &val
);
119 pwrite_16(struct intel_renderbuffer
*irb
, uint32_t offset
, uint16_t val
)
121 clear_span_cache(irb
);
123 dri_bo_subdata(irb
->region
->buffer
, offset
, 2, &val
);
127 pwrite_8(struct intel_renderbuffer
*irb
, uint32_t offset
, uint8_t val
)
129 clear_span_cache(irb
);
131 dri_bo_subdata(irb
->region
->buffer
, offset
, 1, &val
);
134 static uint32_t no_tile_swizzle(struct intel_renderbuffer
*irb
,
135 struct intel_context
*intel
,
141 return (y
* irb
->region
->pitch
+ x
) * irb
->region
->cpp
;
145 * Deal with tiled surfaces
148 static uint32_t x_tile_swizzle(struct intel_renderbuffer
*irb
,
149 struct intel_context
*intel
,
154 int x_tile_off
, y_tile_off
;
155 int x_tile_number
, y_tile_number
;
156 int tile_off
, tile_base
;
158 tile_stride
= (irb
->pfPitch
* irb
->region
->cpp
) << 3;
163 xbyte
= x
* irb
->region
->cpp
;
165 x_tile_off
= xbyte
& 0x1ff;
168 x_tile_number
= xbyte
>> 9;
169 y_tile_number
= y
>> 3;
171 tile_off
= (y_tile_off
<< 9) + x_tile_off
;
173 switch (irb
->region
->bit_6_swizzle
) {
174 case I915_BIT_6_SWIZZLE_NONE
:
176 case I915_BIT_6_SWIZZLE_9
:
177 tile_off
^= ((tile_off
>> 3) & 64);
179 case I915_BIT_6_SWIZZLE_9_10
:
180 tile_off
^= ((tile_off
>> 3) & 64) ^ ((tile_off
>> 4) & 64);
182 case I915_BIT_6_SWIZZLE_9_11
:
183 tile_off
^= ((tile_off
>> 3) & 64) ^ ((tile_off
>> 5) & 64);
185 case I915_BIT_6_SWIZZLE_9_10_11
:
186 tile_off
^= ((tile_off
>> 3) & 64) ^ ((tile_off
>> 4) & 64) ^
187 ((tile_off
>> 5) & 64);
190 fprintf(stderr
, "Unknown tile swizzling mode %d\n",
191 irb
->region
->bit_6_swizzle
);
195 tile_base
= (x_tile_number
<< 12) + y_tile_number
* tile_stride
;
198 printf("(%d,%d) -> %d + %d = %d (pitch = %d, tstride = %d)\n",
199 x
, y
, tile_off
, tile_base
,
200 tile_off
+ tile_base
,
201 irb
->pfPitch
, tile_stride
);
204 return tile_base
+ tile_off
;
207 static uint32_t y_tile_swizzle(struct intel_renderbuffer
*irb
,
208 struct intel_context
*intel
,
213 int x_tile_off
, y_tile_off
;
214 int x_tile_number
, y_tile_number
;
215 int tile_off
, tile_base
;
217 tile_stride
= (irb
->pfPitch
* irb
->region
->cpp
) << 5;
222 xbyte
= x
* irb
->region
->cpp
;
224 x_tile_off
= xbyte
& 0x7f;
225 y_tile_off
= y
& 0x1f;
227 x_tile_number
= xbyte
>> 7;
228 y_tile_number
= y
>> 5;
230 tile_off
= ((x_tile_off
& ~0xf) << 5) + (y_tile_off
<< 4) +
233 switch (irb
->region
->bit_6_swizzle
) {
234 case I915_BIT_6_SWIZZLE_NONE
:
236 case I915_BIT_6_SWIZZLE_9
:
237 tile_off
^= ((tile_off
>> 3) & 64);
239 case I915_BIT_6_SWIZZLE_9_10
:
240 tile_off
^= ((tile_off
>> 3) & 64) ^ ((tile_off
>> 4) & 64);
242 case I915_BIT_6_SWIZZLE_9_11
:
243 tile_off
^= ((tile_off
>> 3) & 64) ^ ((tile_off
>> 5) & 64);
245 case I915_BIT_6_SWIZZLE_9_10_11
:
246 tile_off
^= ((tile_off
>> 3) & 64) ^ ((tile_off
>> 4) & 64) ^
247 ((tile_off
>> 5) & 64);
250 fprintf(stderr
, "Unknown tile swizzling mode %d\n",
251 irb
->region
->bit_6_swizzle
);
255 tile_base
= (x_tile_number
<< 12) + y_tile_number
* tile_stride
;
257 return tile_base
+ tile_off
;
261 break intelWriteRGBASpan_ARGB8888
268 struct intel_context *intel = intel_context(ctx); \
269 struct intel_renderbuffer *irb = intel_renderbuffer(rb); \
270 const GLint yScale = irb->RenderToTexture ? 1 : -1; \
271 const GLint yBias = irb->RenderToTexture ? 0 : irb->Base.Height - 1; \
275 /* XXX FBO: this is identical to the macro in spantmp2.h except we get
276 * the cliprect info from the context, not the driDrawable.
277 * Move this into spantmp2.h someday.
279 #define HW_CLIPLOOP() \
281 int _nc = intel->numClipRects; \
283 int minx = intel->pClipRects[_nc].x1 - intel->drawX; \
284 int miny = intel->pClipRects[_nc].y1 - intel->drawY; \
285 int maxx = intel->pClipRects[_nc].x2 - intel->drawX; \
286 int maxy = intel->pClipRects[_nc].y2 - intel->drawY;
292 #define Y_FLIP(_y) ((_y) * yScale + yBias)
294 /* XXX with GEM, these need to tell the kernel */
299 /* 16 bit, RGB565 color spanline and pixel functions
301 #define SPANTMP_PIXEL_FMT GL_RGB
302 #define SPANTMP_PIXEL_TYPE GL_UNSIGNED_SHORT_5_6_5
304 #define TAG(x) intel##x##_RGB565
305 #define TAG2(x,y) intel##x##_RGB565##y
306 #define GET_VALUE(X, Y) pread_16(irb, no_tile_swizzle(irb, intel, X, Y))
307 #define PUT_VALUE(X, Y, V) pwrite_16(irb, no_tile_swizzle(irb, intel, X, Y), V)
308 #include "spantmp2.h"
310 /* 32 bit, ARGB8888 color spanline and pixel functions
312 #define SPANTMP_PIXEL_FMT GL_BGRA
313 #define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV
315 #define TAG(x) intel##x##_ARGB8888
316 #define TAG2(x,y) intel##x##_ARGB8888##y
317 #define GET_VALUE(X, Y) pread_32(irb, no_tile_swizzle(irb, intel, X, Y))
318 #define PUT_VALUE(X, Y, V) pwrite_32(irb, no_tile_swizzle(irb, intel, X, Y), V)
319 #include "spantmp2.h"
321 /* 32 bit, xRGB8888 color spanline and pixel functions
323 #define SPANTMP_PIXEL_FMT GL_BGRA
324 #define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV
326 #define TAG(x) intel##x##_xRGB8888
327 #define TAG2(x,y) intel##x##_xRGB8888##y
328 #define GET_VALUE(X, Y) pread_xrgb8888(irb, no_tile_swizzle(irb, intel, X, Y))
329 #define PUT_VALUE(X, Y, V) pwrite_xrgb8888(irb, no_tile_swizzle(irb, intel, X, Y), V)
330 #include "spantmp2.h"
332 /* 16 bit RGB565 color tile spanline and pixel functions
335 #define SPANTMP_PIXEL_FMT GL_RGB
336 #define SPANTMP_PIXEL_TYPE GL_UNSIGNED_SHORT_5_6_5
338 #define TAG(x) intel_XTile_##x##_RGB565
339 #define TAG2(x,y) intel_XTile_##x##_RGB565##y
340 #define GET_VALUE(X, Y) pread_16(irb, x_tile_swizzle(irb, intel, X, Y))
341 #define PUT_VALUE(X, Y, V) pwrite_16(irb, x_tile_swizzle(irb, intel, X, Y), V)
342 #include "spantmp2.h"
344 #define SPANTMP_PIXEL_FMT GL_RGB
345 #define SPANTMP_PIXEL_TYPE GL_UNSIGNED_SHORT_5_6_5
347 #define TAG(x) intel_YTile_##x##_RGB565
348 #define TAG2(x,y) intel_YTile_##x##_RGB565##y
349 #define GET_VALUE(X, Y) pread_16(irb, y_tile_swizzle(irb, intel, X, Y))
350 #define PUT_VALUE(X, Y, V) pwrite_16(irb, y_tile_swizzle(irb, intel, X, Y), V)
351 #include "spantmp2.h"
353 /* 32 bit ARGB888 color tile spanline and pixel functions
356 #define SPANTMP_PIXEL_FMT GL_BGRA
357 #define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV
359 #define TAG(x) intel_XTile_##x##_ARGB8888
360 #define TAG2(x,y) intel_XTile_##x##_ARGB8888##y
361 #define GET_VALUE(X, Y) pread_32(irb, x_tile_swizzle(irb, intel, X, Y))
362 #define PUT_VALUE(X, Y, V) pwrite_32(irb, x_tile_swizzle(irb, intel, X, Y), V)
363 #include "spantmp2.h"
365 #define SPANTMP_PIXEL_FMT GL_BGRA
366 #define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV
368 #define TAG(x) intel_YTile_##x##_ARGB8888
369 #define TAG2(x,y) intel_YTile_##x##_ARGB8888##y
370 #define GET_VALUE(X, Y) pread_32(irb, y_tile_swizzle(irb, intel, X, Y))
371 #define PUT_VALUE(X, Y, V) pwrite_32(irb, y_tile_swizzle(irb, intel, X, Y), V)
372 #include "spantmp2.h"
374 /* 32 bit xRGB888 color tile spanline and pixel functions
377 #define SPANTMP_PIXEL_FMT GL_BGRA
378 #define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV
380 #define TAG(x) intel_XTile_##x##_xRGB8888
381 #define TAG2(x,y) intel_XTile_##x##_xRGB8888##y
382 #define GET_VALUE(X, Y) pread_xrgb8888(irb, x_tile_swizzle(irb, intel, X, Y))
383 #define PUT_VALUE(X, Y, V) pwrite_xrgb8888(irb, x_tile_swizzle(irb, intel, X, Y), V)
384 #include "spantmp2.h"
386 #define SPANTMP_PIXEL_FMT GL_BGRA
387 #define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV
389 #define TAG(x) intel_YTile_##x##_xRGB8888
390 #define TAG2(x,y) intel_YTile_##x##_xRGB8888##y
391 #define GET_VALUE(X, Y) pread_xrgb8888(irb, y_tile_swizzle(irb, intel, X, Y))
392 #define PUT_VALUE(X, Y, V) pwrite_xrgb8888(irb, y_tile_swizzle(irb, intel, X, Y), V)
393 #include "spantmp2.h"
395 #define LOCAL_DEPTH_VARS \
396 struct intel_context *intel = intel_context(ctx); \
397 struct intel_renderbuffer *irb = intel_renderbuffer(rb); \
398 const GLint yScale = irb->RenderToTexture ? 1 : -1; \
399 const GLint yBias = irb->RenderToTexture ? 0 : irb->Base.Height - 1;
402 #define LOCAL_STENCIL_VARS LOCAL_DEPTH_VARS
405 ** 16-bit depthbuffer functions.
407 #define VALUE_TYPE GLushort
408 #define WRITE_DEPTH(_x, _y, d) \
409 pwrite_16(irb, no_tile_swizzle(irb, intel, _x, _y), d)
410 #define READ_DEPTH(d, _x, _y) \
411 d = pread_16(irb, no_tile_swizzle(irb, intel, _x, _y))
412 #define TAG(x) intel##x##_z16
413 #include "depthtmp.h"
417 ** 16-bit x tile depthbuffer functions.
419 #define VALUE_TYPE GLushort
420 #define WRITE_DEPTH(_x, _y, d) \
421 pwrite_16(irb, x_tile_swizzle(irb, intel, _x, _y), d)
422 #define READ_DEPTH(d, _x, _y) \
423 d = pread_16(irb, x_tile_swizzle(irb, intel, _x, _y))
424 #define TAG(x) intel_XTile_##x##_z16
425 #include "depthtmp.h"
428 ** 16-bit y tile depthbuffer functions.
430 #define VALUE_TYPE GLushort
431 #define WRITE_DEPTH(_x, _y, d) \
432 pwrite_16(irb, y_tile_swizzle(irb, intel, _x, _y), d)
433 #define READ_DEPTH(d, _x, _y) \
434 d = pread_16(irb, y_tile_swizzle(irb, intel, _x, _y))
435 #define TAG(x) intel_YTile_##x##_z16
436 #include "depthtmp.h"
440 ** 24/8-bit interleaved depth/stencil functions
441 ** Note: we're actually reading back combined depth+stencil values.
442 ** The wrappers in main/depthstencil.c are used to extract the depth
443 ** and stencil values.
445 #define VALUE_TYPE GLuint
447 /* Change ZZZS -> SZZZ */
448 #define WRITE_DEPTH(_x, _y, d) \
449 pwrite_32(irb, no_tile_swizzle(irb, intel, _x, _y), \
450 ((d) >> 8) | ((d) << 24))
452 /* Change SZZZ -> ZZZS */
453 #define READ_DEPTH( d, _x, _y ) { \
454 GLuint tmp = pread_32(irb, no_tile_swizzle(irb, intel, _x, _y)); \
455 d = (tmp << 8) | (tmp >> 24); \
458 #define TAG(x) intel##x##_z24_s8
459 #include "depthtmp.h"
463 ** 24/8-bit x-tile interleaved depth/stencil functions
464 ** Note: we're actually reading back combined depth+stencil values.
465 ** The wrappers in main/depthstencil.c are used to extract the depth
466 ** and stencil values.
468 #define VALUE_TYPE GLuint
470 /* Change ZZZS -> SZZZ */
471 #define WRITE_DEPTH(_x, _y, d) \
472 pwrite_32(irb, x_tile_swizzle(irb, intel, _x, _y), \
473 ((d) >> 8) | ((d) << 24)) \
475 /* Change SZZZ -> ZZZS */
476 #define READ_DEPTH( d, _x, _y ) { \
477 GLuint tmp = pread_32(irb, x_tile_swizzle(irb, intel, _x, _y)); \
478 d = (tmp << 8) | (tmp >> 24); \
481 #define TAG(x) intel_XTile_##x##_z24_s8
482 #include "depthtmp.h"
485 ** 24/8-bit y-tile interleaved depth/stencil functions
486 ** Note: we're actually reading back combined depth+stencil values.
487 ** The wrappers in main/depthstencil.c are used to extract the depth
488 ** and stencil values.
490 #define VALUE_TYPE GLuint
492 /* Change ZZZS -> SZZZ */
493 #define WRITE_DEPTH(_x, _y, d) \
494 pwrite_32(irb, y_tile_swizzle(irb, intel, _x, _y), \
495 ((d) >> 8) | ((d) << 24))
497 /* Change SZZZ -> ZZZS */
498 #define READ_DEPTH( d, _x, _y ) { \
499 GLuint tmp = pread_32(irb, y_tile_swizzle(irb, intel, _x, _y)); \
500 d = (tmp << 8) | (tmp >> 24); \
503 #define TAG(x) intel_YTile_##x##_z24_s8
504 #include "depthtmp.h"
508 ** 8-bit stencil function (XXX FBO: This is obsolete)
510 #define WRITE_STENCIL(_x, _y, d) \
511 pwrite_8(irb, no_tile_swizzle(irb, intel, _x, _y) + 3, d)
513 #define READ_STENCIL(d, _x, _y) \
514 d = pread_8(irb, no_tile_swizzle(irb, intel, _x, _y) + 3);
516 #define TAG(x) intel##x##_z24_s8
517 #include "stenciltmp.h"
520 ** 8-bit x-tile stencil function (XXX FBO: This is obsolete)
522 #define WRITE_STENCIL(_x, _y, d) \
523 pwrite_8(irb, x_tile_swizzle(irb, intel, _x, _y) + 3, d)
525 #define READ_STENCIL(d, _x, _y) \
526 d = pread_8(irb, x_tile_swizzle(irb, intel, _x, _y) + 3);
528 #define TAG(x) intel_XTile_##x##_z24_s8
529 #include "stenciltmp.h"
532 ** 8-bit y-tile stencil function (XXX FBO: This is obsolete)
534 #define WRITE_STENCIL(_x, _y, d) \
535 pwrite_8(irb, y_tile_swizzle(irb, intel, _x, _y) + 3, d)
537 #define READ_STENCIL(d, _x, _y) \
538 d = pread_8(irb, y_tile_swizzle(irb, intel, _x, _y) + 3)
540 #define TAG(x) intel_YTile_##x##_z24_s8
541 #include "stenciltmp.h"
544 intel_renderbuffer_map(struct intel_context
*intel
, struct gl_renderbuffer
*rb
)
546 struct intel_renderbuffer
*irb
= intel_renderbuffer(rb
);
548 if (irb
== NULL
|| irb
->region
== NULL
)
551 irb
->pfPitch
= irb
->region
->pitch
;
553 intel_set_span_functions(intel
, rb
);
557 intel_renderbuffer_unmap(struct intel_context
*intel
,
558 struct gl_renderbuffer
*rb
)
560 struct intel_renderbuffer
*irb
= intel_renderbuffer(rb
);
562 if (irb
== NULL
|| irb
->region
== NULL
)
565 clear_span_cache(irb
);
573 * Map or unmap all the renderbuffers which we may need during
574 * software rendering.
575 * XXX in the future, we could probably convey extra information to
576 * reduce the number of mappings needed. I.e. if doing a glReadPixels
577 * from the depth buffer, we really only need one mapping.
579 * XXX Rewrite this function someday.
580 * We can probably just loop over all the renderbuffer attachments,
581 * map/unmap all of them, and not worry about the _ColorDrawBuffers
582 * _ColorReadBuffer, _DepthBuffer or _StencilBuffer fields.
585 intel_map_unmap_buffers(struct intel_context
*intel
, GLboolean map
)
587 GLcontext
*ctx
= &intel
->ctx
;
590 /* color draw buffers */
591 for (j
= 0; j
< ctx
->DrawBuffer
->_NumColorDrawBuffers
; j
++) {
593 intel_renderbuffer_map(intel
, ctx
->DrawBuffer
->_ColorDrawBuffers
[j
]);
595 intel_renderbuffer_unmap(intel
, ctx
->DrawBuffer
->_ColorDrawBuffers
[j
]);
598 /* check for render to textures */
599 for (i
= 0; i
< BUFFER_COUNT
; i
++) {
600 struct gl_renderbuffer_attachment
*att
=
601 ctx
->DrawBuffer
->Attachment
+ i
;
602 struct gl_texture_object
*tex
= att
->Texture
;
604 /* render to texture */
605 ASSERT(att
->Renderbuffer
);
607 struct gl_texture_image
*texImg
;
608 texImg
= tex
->Image
[att
->CubeMapFace
][att
->TextureLevel
];
609 intel_tex_map_images(intel
, intel_texture_object(tex
));
612 intel_tex_unmap_images(intel
, intel_texture_object(tex
));
617 /* color read buffers */
619 intel_renderbuffer_map(intel
, ctx
->ReadBuffer
->_ColorReadBuffer
);
621 intel_renderbuffer_unmap(intel
, ctx
->ReadBuffer
->_ColorReadBuffer
);
623 /* depth buffer (Note wrapper!) */
624 if (ctx
->DrawBuffer
->_DepthBuffer
) {
626 intel_renderbuffer_map(intel
, ctx
->DrawBuffer
->_DepthBuffer
->Wrapped
);
628 intel_renderbuffer_unmap(intel
,
629 ctx
->DrawBuffer
->_DepthBuffer
->Wrapped
);
632 /* stencil buffer (Note wrapper!) */
633 if (ctx
->DrawBuffer
->_StencilBuffer
) {
635 intel_renderbuffer_map(intel
,
636 ctx
->DrawBuffer
->_StencilBuffer
->Wrapped
);
638 intel_renderbuffer_unmap(intel
,
639 ctx
->DrawBuffer
->_StencilBuffer
->Wrapped
);
646 * Prepare for softare rendering. Map current read/draw framebuffers'
647 * renderbuffes and all currently bound texture objects.
649 * Old note: Moved locking out to get reasonable span performance.
652 intelSpanRenderStart(GLcontext
* ctx
)
654 struct intel_context
*intel
= intel_context(ctx
);
657 intelFlush(&intel
->ctx
);
658 LOCK_HARDWARE(intel
);
660 for (i
= 0; i
< ctx
->Const
.MaxTextureCoordUnits
; i
++) {
661 if (ctx
->Texture
.Unit
[i
]._ReallyEnabled
) {
662 struct gl_texture_object
*texObj
= ctx
->Texture
.Unit
[i
]._Current
;
663 intel_tex_map_images(intel
, intel_texture_object(texObj
));
667 intel_map_unmap_buffers(intel
, GL_TRUE
);
671 * Called when done softare rendering. Unmap the buffers we mapped in
672 * the above function.
675 intelSpanRenderFinish(GLcontext
* ctx
)
677 struct intel_context
*intel
= intel_context(ctx
);
682 for (i
= 0; i
< ctx
->Const
.MaxTextureCoordUnits
; i
++) {
683 if (ctx
->Texture
.Unit
[i
]._ReallyEnabled
) {
684 struct gl_texture_object
*texObj
= ctx
->Texture
.Unit
[i
]._Current
;
685 intel_tex_unmap_images(intel
, intel_texture_object(texObj
));
689 intel_map_unmap_buffers(intel
, GL_FALSE
);
691 UNLOCK_HARDWARE(intel
);
696 intelInitSpanFuncs(GLcontext
* ctx
)
698 struct swrast_device_driver
*swdd
= _swrast_GetDeviceDriverReference(ctx
);
699 swdd
->SpanRenderStart
= intelSpanRenderStart
;
700 swdd
->SpanRenderFinish
= intelSpanRenderFinish
;
705 * Plug in appropriate span read/write functions for the given renderbuffer.
706 * These are used for the software fallbacks.
709 intel_set_span_functions(struct intel_context
*intel
,
710 struct gl_renderbuffer
*rb
)
712 struct intel_renderbuffer
*irb
= (struct intel_renderbuffer
*) rb
;
715 /* If in GEM mode, we need to do the tile address swizzling ourselves,
716 * instead of the fence registers handling it.
719 tiling
= irb
->region
->tiling
;
721 tiling
= I915_TILING_NONE
;
723 if (rb
->_ActualFormat
== GL_RGB5
) {
726 case I915_TILING_NONE
:
728 intelInitPointers_RGB565(rb
);
731 intel_XTile_InitPointers_RGB565(rb
);
734 intel_YTile_InitPointers_RGB565(rb
);
738 else if (rb
->_ActualFormat
== GL_RGB8
) {
741 case I915_TILING_NONE
:
743 intelInitPointers_xRGB8888(rb
);
746 intel_XTile_InitPointers_xRGB8888(rb
);
749 intel_YTile_InitPointers_xRGB8888(rb
);
753 else if (rb
->_ActualFormat
== GL_RGBA8
) {
756 case I915_TILING_NONE
:
758 intelInitPointers_ARGB8888(rb
);
761 intel_XTile_InitPointers_ARGB8888(rb
);
764 intel_YTile_InitPointers_ARGB8888(rb
);
768 else if (rb
->_ActualFormat
== GL_DEPTH_COMPONENT16
) {
770 case I915_TILING_NONE
:
772 intelInitDepthPointers_z16(rb
);
775 intel_XTile_InitDepthPointers_z16(rb
);
778 intel_YTile_InitDepthPointers_z16(rb
);
782 else if (rb
->_ActualFormat
== GL_DEPTH_COMPONENT24
|| /* XXX FBO remove */
783 rb
->_ActualFormat
== GL_DEPTH24_STENCIL8_EXT
) {
785 case I915_TILING_NONE
:
787 intelInitDepthPointers_z24_s8(rb
);
790 intel_XTile_InitDepthPointers_z24_s8(rb
);
793 intel_YTile_InitDepthPointers_z24_s8(rb
);
797 else if (rb
->_ActualFormat
== GL_STENCIL_INDEX8_EXT
) {
799 case I915_TILING_NONE
:
801 intelInitStencilPointers_z24_s8(rb
);
804 intel_XTile_InitStencilPointers_z24_s8(rb
);
807 intel_YTile_InitStencilPointers_z24_s8(rb
);
813 "Unexpected _ActualFormat in intelSetSpanFunctions");