i965: Mark that depth buffer needs depth resolve after drawing
[mesa.git] / src / mesa / drivers / dri / intel / intel_tex_layout.c
1 /**************************************************************************
2 *
3 * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 * Michel Dänzer <michel@tungstengraphics.com>
31 */
32
33 #include "intel_mipmap_tree.h"
34 #include "intel_tex_layout.h"
35 #include "intel_context.h"
36 #include "main/macros.h"
37
38 void
39 intel_get_texture_alignment_unit(gl_format format,
40 unsigned int *w, unsigned int *h)
41 {
42 if (_mesa_is_format_compressed(format)) {
43 /* The hardware alignment requirements for compressed textures
44 * happen to match the block boundaries.
45 */
46 _mesa_get_format_block_size(format, w, h);
47 } else {
48 *w = 4;
49 *h = 2;
50 }
51 }
52
53 void i945_miptree_layout_2d(struct intel_mipmap_tree *mt)
54 {
55 GLuint align_h, align_w;
56 GLuint level;
57 GLuint x = 0;
58 GLuint y = 0;
59 GLuint width = mt->width0;
60 GLuint height = mt->height0;
61 GLuint depth = mt->depth0; /* number of array layers. */
62
63 mt->total_width = mt->width0;
64 intel_get_texture_alignment_unit(mt->format, &align_w, &align_h);
65
66 if (mt->compressed) {
67 mt->total_width = ALIGN(mt->width0, align_w);
68 }
69
70 /* May need to adjust width to accomodate the placement of
71 * the 2nd mipmap. This occurs when the alignment
72 * constraints of mipmap placement push the right edge of the
73 * 2nd mipmap out past the width of its parent.
74 */
75 if (mt->first_level != mt->last_level) {
76 GLuint mip1_width;
77
78 if (mt->compressed) {
79 mip1_width = ALIGN(minify(mt->width0), align_w)
80 + ALIGN(minify(minify(mt->width0)), align_w);
81 } else {
82 mip1_width = ALIGN(minify(mt->width0), align_w)
83 + minify(minify(mt->width0));
84 }
85
86 if (mip1_width > mt->total_width) {
87 mt->total_width = mip1_width;
88 }
89 }
90
91 mt->total_height = 0;
92
93 for ( level = mt->first_level ; level <= mt->last_level ; level++ ) {
94 GLuint img_height;
95
96 intel_miptree_set_level_info(mt, level, x, y, width,
97 height, depth);
98
99 img_height = ALIGN(height, align_h);
100 if (mt->compressed)
101 img_height /= align_h;
102
103 /* Because the images are packed better, the final offset
104 * might not be the maximal one:
105 */
106 mt->total_height = MAX2(mt->total_height, y + img_height);
107
108 /* Layout_below: step right after second mipmap.
109 */
110 if (level == mt->first_level + 1) {
111 x += ALIGN(width, align_w);
112 }
113 else {
114 y += img_height;
115 }
116
117 width = minify(width);
118 height = minify(height);
119 }
120 }