don't include intel_depthstencil.h
[mesa.git] / src / mesa / drivers / dri / intel_winsys / intel_buffers.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include "intel_screen.h"
29 #include "intel_context.h"
30 #include "intel_blit.h"
31 #include "intel_buffers.h"
32 #include "intel_batchbuffer.h"
33 #include "intel_reg.h"
34 #include "context.h"
35 #include "utils.h"
36 #include "drirenderbuffer.h"
37 #include "vblank.h"
38
39 #include "pipe/p_context.h"
40
41
42 /* This block can be removed when libdrm >= 2.3.1 is required */
43
44 #ifndef DRM_VBLANK_FLIP
45
46 #define DRM_VBLANK_FLIP 0x8000000
47
48 typedef struct drm_i915_flip {
49 int pipes;
50 } drm_i915_flip_t;
51
52 #undef DRM_IOCTL_I915_FLIP
53 #define DRM_IOCTL_I915_FLIP DRM_IOW(DRM_COMMAND_BASE + DRM_I915_FLIP, \
54 drm_i915_flip_t)
55
56 #endif
57
58
59 /**
60 * XXX move this into a new dri/common/cliprects.c file.
61 */
62 GLboolean
63 intel_intersect_cliprects(drm_clip_rect_t * dst,
64 const drm_clip_rect_t * a,
65 const drm_clip_rect_t * b)
66 {
67 GLint bx = b->x1;
68 GLint by = b->y1;
69 GLint bw = b->x2 - bx;
70 GLint bh = b->y2 - by;
71
72 if (bx < a->x1)
73 bw -= a->x1 - bx, bx = a->x1;
74 if (by < a->y1)
75 bh -= a->y1 - by, by = a->y1;
76 if (bx + bw > a->x2)
77 bw = a->x2 - bx;
78 if (by + bh > a->y2)
79 bh = a->y2 - by;
80 if (bw <= 0)
81 return GL_FALSE;
82 if (bh <= 0)
83 return GL_FALSE;
84
85 dst->x1 = bx;
86 dst->y1 = by;
87 dst->x2 = bx + bw;
88 dst->y2 = by + bh;
89
90 return GL_TRUE;
91 }
92
93 <<<<<<< HEAD:src/mesa/drivers/dri/intel_winsys/intel_buffers.c
94 /**
95 * Return pointer to current color drawing region, or NULL.
96 */
97 #if 0
98 struct pipe_region *
99 intel_drawbuf_region(struct intel_context *intel)
100 {
101 struct intel_renderbuffer *irbColor =
102 intel_renderbuffer(intel->ctx.DrawBuffer->_ColorDrawBuffers[0][0]);
103 if (irbColor)
104 return irbColor->Base.surface->region;
105 else
106 return NULL;
107 }
108 =======
109 >>>>>>> remove dead code, remove intel_fbo.h includes:src/mesa/drivers/dri/intel_winsys/intel_buffers.c
110
111 <<<<<<< HEAD:src/mesa/drivers/dri/intel_winsys/intel_buffers.c
112 /**
113 * Return pointer to current color reading region, or NULL.
114 */
115 struct pipe_region *
116 intel_readbuf_region(struct intel_context *intel)
117 {
118 struct intel_renderbuffer *irb
119 = intel_renderbuffer(intel->ctx.ReadBuffer->_ColorReadBuffer);
120 if (irb)
121 return irb->Base.surface->region;
122 else
123 return NULL;
124 }
125 #endif
126 =======
127 >>>>>>> remove dead code, remove intel_fbo.h includes:src/mesa/drivers/dri/intel_winsys/intel_buffers.c
128
129 /**
130 * This will be called whenever the currently bound window is moved/resized.
131 * XXX: actually, it seems to NOT be called when the window is only moved (BP).
132 */
133 void
134 intelWindowMoved(struct intel_context *intel)
135 {
136 GLcontext *ctx = &intel->ctx;
137 __DRIdrawablePrivate *dPriv = intel->driDrawable;
138 struct intel_framebuffer *intel_fb = dPriv->driverPrivate;
139
140 if (!intel->ctx.DrawBuffer) {
141 /* when would this happen? -BP */
142 assert(0);
143 intel->numClipRects = 0;
144 }
145
146 /* Update Mesa's notion of window size */
147 driUpdateFramebufferSize(ctx, dPriv);
148 intel_fb->Base.Initialized = GL_TRUE; /* XXX remove someday */
149
150 {
151 drmI830Sarea *sarea = intel->sarea;
152 drm_clip_rect_t drw_rect = { .x1 = dPriv->x, .x2 = dPriv->x + dPriv->w,
153 .y1 = dPriv->y, .y2 = dPriv->y + dPriv->h };
154 drm_clip_rect_t pipeA_rect = { .x1 = sarea->pipeA_x, .y1 = sarea->pipeA_y,
155 .x2 = sarea->pipeA_x + sarea->pipeA_w,
156 .y2 = sarea->pipeA_y + sarea->pipeA_h };
157 drm_clip_rect_t pipeB_rect = { .x1 = sarea->pipeB_x, .y1 = sarea->pipeB_y,
158 .x2 = sarea->pipeB_x + sarea->pipeB_w,
159 .y2 = sarea->pipeB_y + sarea->pipeB_h };
160 GLint areaA = driIntersectArea( drw_rect, pipeA_rect );
161 GLint areaB = driIntersectArea( drw_rect, pipeB_rect );
162 GLuint flags = intel_fb->vblank_flags;
163 GLboolean pf_active;
164 GLint pf_pipes;
165
166 /* Update page flipping info
167 */
168 pf_pipes = 0;
169
170 if (areaA > 0)
171 pf_pipes |= 1;
172
173 if (areaB > 0)
174 pf_pipes |= 2;
175
176 intel_fb->pf_current_page = (intel->sarea->pf_current_page >>
177 (intel_fb->pf_pipes & 0x2)) & 0x3;
178
179 intel_fb->pf_num_pages = 2 /*intel->intelScreen->third.handle ? 3 : 2*/;
180
181 pf_active = pf_pipes && (pf_pipes & intel->sarea->pf_active) == pf_pipes;
182
183 if (INTEL_DEBUG & DEBUG_LOCK)
184 if (pf_active != intel_fb->pf_active)
185 _mesa_printf("%s - Page flipping %sactive\n", __progname,
186 pf_active ? "" : "in");
187
188 if (pf_active) {
189 /* Sync pages between pipes if we're flipping on both at the same time */
190 if (pf_pipes == 0x3 && pf_pipes != intel_fb->pf_pipes &&
191 (intel->sarea->pf_current_page & 0x3) !=
192 (((intel->sarea->pf_current_page) >> 2) & 0x3)) {
193 drm_i915_flip_t flip;
194
195 if (intel_fb->pf_current_page ==
196 (intel->sarea->pf_current_page & 0x3)) {
197 /* XXX: This is ugly, but emitting two flips 'in a row' can cause
198 * lockups for unknown reasons.
199 */
200 intel->sarea->pf_current_page =
201 intel->sarea->pf_current_page & 0x3;
202 intel->sarea->pf_current_page |=
203 ((intel_fb->pf_current_page + intel_fb->pf_num_pages - 1) %
204 intel_fb->pf_num_pages) << 2;
205
206 flip.pipes = 0x2;
207 } else {
208 intel->sarea->pf_current_page =
209 intel->sarea->pf_current_page & (0x3 << 2);
210 intel->sarea->pf_current_page |=
211 (intel_fb->pf_current_page + intel_fb->pf_num_pages - 1) %
212 intel_fb->pf_num_pages;
213
214 flip.pipes = 0x1;
215 }
216
217 drmCommandWrite(intel->driFd, DRM_I915_FLIP, &flip, sizeof(flip));
218 }
219
220 intel_fb->pf_pipes = pf_pipes;
221 }
222
223 intel_fb->pf_active = pf_active;
224 #if 0
225 intel_flip_renderbuffers(intel_fb);
226 intel_draw_buffer(&intel->ctx, intel->ctx.DrawBuffer);
227 #endif
228
229 /* Update vblank info
230 */
231 if (areaB > areaA || (areaA == areaB && areaB > 0)) {
232 flags = intel_fb->vblank_flags | VBLANK_FLAG_SECONDARY;
233 } else {
234 flags = intel_fb->vblank_flags & ~VBLANK_FLAG_SECONDARY;
235 }
236
237 if (flags != intel_fb->vblank_flags && intel_fb->vblank_flags &&
238 !(intel_fb->vblank_flags & VBLANK_FLAG_NO_IRQ)) {
239 drmVBlank vbl;
240 int i;
241
242 vbl.request.type = DRM_VBLANK_ABSOLUTE;
243
244 if ( intel_fb->vblank_flags & VBLANK_FLAG_SECONDARY ) {
245 vbl.request.type |= DRM_VBLANK_SECONDARY;
246 }
247
248 for (i = 0; i < intel_fb->pf_num_pages; i++) {
249 if ((intel_fb->vbl_waited - intel_fb->vbl_pending[i]) <= (1<<23))
250 continue;
251
252 vbl.request.sequence = intel_fb->vbl_pending[i];
253 drmWaitVBlank(intel->driFd, &vbl);
254 }
255
256 intel_fb->vblank_flags = flags;
257 driGetCurrentVBlank(dPriv, intel_fb->vblank_flags, &intel_fb->vbl_seq);
258 intel_fb->vbl_waited = intel_fb->vbl_seq;
259
260 for (i = 0; i < intel_fb->pf_num_pages; i++) {
261 intel_fb->vbl_pending[i] = intel_fb->vbl_waited;
262 }
263 }
264 }
265
266 /* This will be picked up by looking at the dirty state flags:
267 */
268
269 /* Update hardware scissor */
270 // ctx->Driver.Scissor(ctx, ctx->Scissor.X, ctx->Scissor.Y,
271 // ctx->Scissor.Width, ctx->Scissor.Height);
272
273 /* Re-calculate viewport related state */
274 // ctx->Driver.DepthRange( ctx, ctx->Viewport.Near, ctx->Viewport.Far );
275 }
276
277
278
279
280
281 /* Emit wait for pending flips */
282 #if 0
283 void
284 intel_wait_flips(struct intel_context *intel, GLuint batch_flags)
285 {
286 struct intel_framebuffer *intel_fb =
287 (struct intel_framebuffer *) intel->ctx.DrawBuffer;
288 struct intel_renderbuffer *intel_rb =
289 intel_get_renderbuffer(&intel_fb->Base,
290 intel_fb->Base._ColorDrawBufferMask[0] ==
291 BUFFER_BIT_FRONT_LEFT ? BUFFER_FRONT_LEFT :
292 BUFFER_BACK_LEFT);
293
294 if (intel_fb->Base.Name == 0 && intel_rb->pf_pending == intel_fb->pf_seq) {
295 GLint pf_pipes = intel_fb->pf_pipes;
296 BATCH_LOCALS;
297
298 /* Wait for pending flips to take effect */
299 BEGIN_BATCH(2, batch_flags);
300 OUT_BATCH(pf_pipes & 0x1 ? (MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP)
301 : 0);
302 OUT_BATCH(pf_pipes & 0x2 ? (MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_B_FLIP)
303 : 0);
304 ADVANCE_BATCH();
305
306 intel_rb->pf_pending--;
307 }
308 }
309 #endif
310
311 #if 0
312 /* Flip the front & back buffers
313 */
314 static GLboolean
315 intelPageFlip(const __DRIdrawablePrivate * dPriv)
316 {
317 struct intel_context *intel;
318 int ret;
319 struct intel_framebuffer *intel_fb = dPriv->driverPrivate;
320
321 if (INTEL_DEBUG & DEBUG_IOCTL)
322 fprintf(stderr, "%s\n", __FUNCTION__);
323
324 assert(dPriv);
325 assert(dPriv->driContextPriv);
326 assert(dPriv->driContextPriv->driverPrivate);
327
328 intel = (struct intel_context *) dPriv->driContextPriv->driverPrivate;
329
330 if (intel->intelScreen->drmMinor < 9)
331 return GL_FALSE;
332
333 intelFlush(&intel->ctx);
334
335 ret = 0;
336
337 LOCK_HARDWARE(intel);
338
339 if (dPriv->numClipRects && intel_fb->pf_active) {
340 drm_i915_flip_t flip;
341
342 flip.pipes = intel_fb->pf_pipes;
343
344 ret = drmCommandWrite(intel->driFd, DRM_I915_FLIP, &flip, sizeof(flip));
345 }
346
347 UNLOCK_HARDWARE(intel);
348
349 if (ret || !intel_fb->pf_active)
350 return GL_FALSE;
351
352 if (!dPriv->numClipRects) {
353 usleep(10000); /* throttle invisible client 10ms */
354 }
355
356 intel_fb->pf_current_page = (intel->sarea->pf_current_page >>
357 (intel_fb->pf_pipes & 0x2)) & 0x3;
358
359 if (dPriv->numClipRects != 0) {
360 intel_get_renderbuffer(&intel_fb->Base, BUFFER_FRONT_LEFT)->pf_pending =
361 intel_get_renderbuffer(&intel_fb->Base, BUFFER_BACK_LEFT)->pf_pending =
362 ++intel_fb->pf_seq;
363 }
364
365 #if 0
366 intel_flip_renderbuffers(intel_fb);
367 intel_draw_buffer(&intel->ctx, &intel_fb->Base);
368 #endif
369
370 if (INTEL_DEBUG & DEBUG_IOCTL)
371 fprintf(stderr, "%s: success\n", __FUNCTION__);
372
373 return GL_TRUE;
374 }
375 #endif
376
377
378 static GLboolean
379 intelScheduleSwap(const __DRIdrawablePrivate * dPriv, GLboolean *missed_target)
380 {
381 struct intel_framebuffer *intel_fb = dPriv->driverPrivate;
382 unsigned int interval = driGetVBlankInterval(dPriv, intel_fb->vblank_flags);
383 struct intel_context *intel =
384 intelScreenContext(dPriv->driScreenPriv->private);
385 const intelScreenPrivate *intelScreen = intel->intelScreen;
386 unsigned int target;
387 drm_i915_vblank_swap_t swap;
388 GLboolean ret;
389
390 if (!intel_fb->vblank_flags ||
391 (intel_fb->vblank_flags & VBLANK_FLAG_NO_IRQ) ||
392 intelScreen->drmMinor < (intel_fb->pf_active ? 9 : 6))
393 return GL_FALSE;
394
395 swap.seqtype = DRM_VBLANK_ABSOLUTE;
396
397 if (intel_fb->vblank_flags & VBLANK_FLAG_SYNC) {
398 swap.seqtype |= DRM_VBLANK_NEXTONMISS;
399 } else if (interval == 0) {
400 return GL_FALSE;
401 }
402
403 swap.drawable = dPriv->hHWDrawable;
404 target = swap.sequence = intel_fb->vbl_seq + interval;
405
406 if ( intel_fb->vblank_flags & VBLANK_FLAG_SECONDARY ) {
407 swap.seqtype |= DRM_VBLANK_SECONDARY;
408 }
409
410 LOCK_HARDWARE(intel);
411
412 intel_batchbuffer_flush(intel->batch);
413
414 if ( intel_fb->pf_active ) {
415 swap.seqtype |= DRM_VBLANK_FLIP;
416
417 intel_fb->pf_current_page = (((intel->sarea->pf_current_page >>
418 (intel_fb->pf_pipes & 0x2)) & 0x3) + 1) %
419 intel_fb->pf_num_pages;
420 }
421
422 if (!drmCommandWriteRead(intel->driFd, DRM_I915_VBLANK_SWAP, &swap,
423 sizeof(swap))) {
424 intel_fb->vbl_seq = swap.sequence;
425 swap.sequence -= target;
426 *missed_target = swap.sequence > 0 && swap.sequence <= (1 << 23);
427
428 #if 1
429 intel_fb->vbl_pending[1] = intel_fb->vbl_pending[0] = intel_fb->vbl_seq;
430 #else
431 intel_get_renderbuffer(&intel_fb->Base, BUFFER_BACK_LEFT)->vbl_pending =
432 intel_get_renderbuffer(&intel_fb->Base,
433 BUFFER_FRONT_LEFT)->vbl_pending =
434 intel_fb->vbl_seq;
435 #endif
436
437 if (swap.seqtype & DRM_VBLANK_FLIP) {
438 #if 0
439 intel_flip_renderbuffers(intel_fb);
440 intel_draw_buffer(&intel->ctx, intel->ctx.DrawBuffer);
441 #endif
442 }
443
444 ret = GL_TRUE;
445 } else {
446 if (swap.seqtype & DRM_VBLANK_FLIP) {
447 intel_fb->pf_current_page = ((intel->sarea->pf_current_page >>
448 (intel_fb->pf_pipes & 0x2)) & 0x3) %
449 intel_fb->pf_num_pages;
450 }
451
452 ret = GL_FALSE;
453 }
454
455 UNLOCK_HARDWARE(intel);
456
457 return ret;
458 }
459
460 void
461 intelSwapBuffers(__DRIdrawablePrivate * dPriv)
462 {
463 if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
464 GET_CURRENT_CONTEXT(ctx);
465 struct intel_context *intel;
466
467 if (ctx == NULL)
468 return;
469
470 intel = intel_context(ctx);
471
472 if (ctx->Visual.doubleBufferMode) {
473 GLboolean missed_target;
474 struct intel_framebuffer *intel_fb = dPriv->driverPrivate;
475 int64_t ust;
476
477 _mesa_notifySwapBuffers(ctx); /* flush pending rendering comands */
478
479 if (!intelScheduleSwap(dPriv, &missed_target)) {
480 driWaitForVBlank(dPriv, &intel_fb->vbl_seq, intel_fb->vblank_flags,
481 &missed_target);
482
483 intelCopyBuffer(dPriv, NULL);
484 }
485
486 intel_fb->swap_count++;
487 (*dri_interface->getUST) (&ust);
488 if (missed_target) {
489 intel_fb->swap_missed_count++;
490 intel_fb->swap_missed_ust = ust - intel_fb->swap_ust;
491 }
492
493 intel_fb->swap_ust = ust;
494 }
495 }
496 else {
497 /* XXX this shouldn't be an error but we can't handle it for now */
498 fprintf(stderr, "%s: drawable has no context!\n", __FUNCTION__);
499 }
500 }
501
502 void
503 intelCopySubBuffer(__DRIdrawablePrivate * dPriv, int x, int y, int w, int h)
504 {
505 if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
506 struct intel_context *intel =
507 (struct intel_context *) dPriv->driContextPriv->driverPrivate;
508 GLcontext *ctx = &intel->ctx;
509
510 if (ctx->Visual.doubleBufferMode) {
511 drm_clip_rect_t rect;
512 /* fixup cliprect (driDrawable may have changed?) later */
513 rect.x1 = x;
514 rect.y1 = y;
515 rect.x2 = w;
516 rect.y2 = h;
517 _mesa_notifySwapBuffers(ctx); /* flush pending rendering comands */
518 intelCopyBuffer(dPriv, &rect);
519 }
520 }
521 else {
522 /* XXX this shouldn't be an error but we can't handle it for now */
523 fprintf(stderr, "%s: drawable has no context!\n", __FUNCTION__);
524 }
525 }