1 /* $XFree86$ */ /* -*- mode: c; c-basic-offset: 3 -*- */
3 * Copyright 2000 Gareth Hughes
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 * Gareth Hughes <gareth@valinux.com>
28 * Leif Delgass <ldelgass@retinalburn.net>
29 * Jos�Fonseca <j_r_fonseca@yahoo.co.uk>
33 #include "mach64_context.h"
34 #include "mach64_state.h"
35 #include "mach64_ioctl.h"
36 #include "mach64_tex.h"
41 #include "swrast/swrast.h"
45 #define MACH64_TIMEOUT 10 /* the DRM already has a timeout, so keep this small */
48 /* =============================================================
49 * Hardware vertex buffer handling
52 /* Get a new VB from the pool of vertex buffers in AGP space.
54 drmBufPtr
mach64GetBufferLocked( mach64ContextPtr mmesa
)
56 int fd
= mmesa
->mach64Screen
->driScreen
->fd
;
64 dma
.context
= mmesa
->hHWContext
;
67 dma
.send_sizes
= NULL
;
69 dma
.request_count
= 1;
70 dma
.request_size
= MACH64_BUFFER_SIZE
;
71 dma
.request_list
= &index
;
72 dma
.request_sizes
= &size
;
73 dma
.granted_count
= 0;
75 while ( !buf
&& ( to
++ < MACH64_TIMEOUT
) ) {
76 ret
= drmDMA( fd
, &dma
);
79 buf
= &mmesa
->mach64Screen
->buffers
->list
[index
];
82 /* Bump the performance counter */
83 mmesa
->c_vertexBuffers
++;
90 drmCommandNone( fd
, DRM_MACH64_RESET
);
91 UNLOCK_HARDWARE( mmesa
);
92 fprintf( stderr
, "Error: Could not get new VB... exiting\n" );
99 void mach64FlushVerticesLocked( mach64ContextPtr mmesa
)
101 drm_clip_rect_t
*pbox
= mmesa
->pClipRects
;
102 int nbox
= mmesa
->numClipRects
;
103 void *buffer
= mmesa
->vert_buf
;
104 int count
= mmesa
->vert_used
;
105 int prim
= mmesa
->hw_primitive
;
106 int fd
= mmesa
->driScreen
->fd
;
107 drm_mach64_vertex_t vertex
;
110 mmesa
->num_verts
= 0;
111 mmesa
->vert_used
= 0;
116 if ( mmesa
->dirty
& ~MACH64_UPLOAD_CLIPRECTS
)
117 mach64EmitHwStateLocked( mmesa
);
122 if ( nbox
> MACH64_NR_SAREA_CLIPRECTS
)
123 mmesa
->dirty
|= MACH64_UPLOAD_CLIPRECTS
;
125 if ( !count
|| !(mmesa
->dirty
& MACH64_UPLOAD_CLIPRECTS
) ) {
126 /* FIXME: Is this really necessary */
128 mmesa
->sarea
->nbox
= 0;
130 mmesa
->sarea
->nbox
= nbox
;
136 ret
= drmCommandWrite( fd
, DRM_MACH64_VERTEX
, &vertex
, sizeof(drm_mach64_vertex_t
) );
138 UNLOCK_HARDWARE( mmesa
);
139 fprintf( stderr
, "Error flushing vertex buffer: return = %d\n", ret
);
145 for ( i
= 0 ; i
< nbox
; ) {
146 int nr
= MIN2( i
+ MACH64_NR_SAREA_CLIPRECTS
, nbox
);
147 drm_clip_rect_t
*b
= mmesa
->sarea
->boxes
;
150 mmesa
->sarea
->nbox
= nr
- i
;
151 for ( ; i
< nr
; i
++ ) {
155 /* Finished with the buffer?
161 mmesa
->sarea
->dirty
|= MACH64_UPLOAD_CLIPRECTS
;
166 vertex
.discard
= discard
;
167 ret
= drmCommandWrite( fd
, DRM_MACH64_VERTEX
, &vertex
, sizeof(drm_mach64_vertex_t
) );
169 UNLOCK_HARDWARE( mmesa
);
170 fprintf( stderr
, "Error flushing vertex buffer: return = %d\n", ret
);
176 mmesa
->dirty
&= ~MACH64_UPLOAD_CLIPRECTS
;
179 /* ================================================================
183 void mach64FireBlitLocked( mach64ContextPtr mmesa
, drmBufPtr buffer
,
184 GLint offset
, GLint pitch
, GLint format
,
185 GLint x
, GLint y
, GLint width
, GLint height
)
187 drm_mach64_blit_t blit
;
190 blit
.idx
= buffer
->idx
;
191 blit
.offset
= offset
;
193 blit
.format
= format
;
197 blit
.height
= height
;
199 ret
= drmCommandWrite( mmesa
->driFd
, DRM_MACH64_BLIT
,
200 &blit
, sizeof(drm_mach64_blit_t
) );
203 UNLOCK_HARDWARE( mmesa
);
204 fprintf( stderr
, "DRM_MACH64_BLIT: return = %d\n", ret
);
210 /* ================================================================
211 * SwapBuffers with client-side throttling
213 static void delay( void ) {
214 /* Prevent an optimizing compiler from removing a spin loop */
217 /* Throttle the frame rate -- only allow MACH64_MAX_QUEUED_FRAMES
218 * pending swap buffers requests at a time.
220 * GH: We probably don't want a timeout here, as we can wait as
221 * long as we want for a frame to complete. If it never does, then
222 * the card has locked.
224 static int mach64WaitForFrameCompletion( mach64ContextPtr mmesa
)
226 int fd
= mmesa
->driFd
;
232 drm_mach64_getparam_t gp
;
235 if ( mmesa
->sarea
->frames_queued
< MACH64_MAX_QUEUED_FRAMES
) {
239 if (MACH64_DEBUG
& DEBUG_NOWAIT
) {
243 gp
.param
= MACH64_PARAM_FRAMES_QUEUED
;
244 gp
.value
= &frames
; /* also copied into sarea->frames_queued by DRM */
246 ret
= drmCommandWriteRead( fd
, DRM_MACH64_GETPARAM
, &gp
, sizeof(gp
) );
249 UNLOCK_HARDWARE( mmesa
);
250 fprintf( stderr
, "DRM_MACH64_GETPARAM: return = %d\n", ret
);
254 /* Spin in place a bit so we aren't hammering the register */
257 for ( i
= 0 ; i
< 1024 ; i
++ ) {
266 /* Copy the back color buffer to the front color buffer.
268 void mach64CopyBuffer( const __DRIdrawablePrivate
*dPriv
)
270 mach64ContextPtr mmesa
;
272 drm_clip_rect_t
*pbox
;
273 GLboolean missed_target
;
276 assert(dPriv
->driContextPriv
);
277 assert(dPriv
->driContextPriv
->driverPrivate
);
279 mmesa
= (mach64ContextPtr
) dPriv
->driContextPriv
->driverPrivate
;
281 if ( MACH64_DEBUG
& DEBUG_VERBOSE_API
) {
282 fprintf( stderr
, "\n********************************\n" );
283 fprintf( stderr
, "\n%s( %p )\n\n",
284 __FUNCTION__
, mmesa
->glCtx
);
288 /* Flush any outstanding vertex buffers */
289 FLUSH_BATCH( mmesa
);
291 LOCK_HARDWARE( mmesa
);
293 /* Throttle the frame rate -- only allow one pending swap buffers
296 if ( !mach64WaitForFrameCompletion( mmesa
) ) {
297 mmesa
->hardwareWentIdle
= 1;
299 mmesa
->hardwareWentIdle
= 0;
302 #if ENABLE_PERF_BOXES
303 if ( mmesa
->boxes
) {
304 mach64PerformanceBoxesLocked( mmesa
);
308 UNLOCK_HARDWARE( mmesa
);
309 driWaitForVBlank( dPriv
, &mmesa
->vbl_seq
, mmesa
->vblank_flags
, &missed_target
);
310 LOCK_HARDWARE( mmesa
);
312 /* use front buffer cliprects */
313 nbox
= dPriv
->numClipRects
;
314 pbox
= dPriv
->pClipRects
;
316 for ( i
= 0 ; i
< nbox
; ) {
317 GLint nr
= MIN2( i
+ MACH64_NR_SAREA_CLIPRECTS
, nbox
);
318 drm_clip_rect_t
*b
= mmesa
->sarea
->boxes
;
321 for ( ; i
< nr
; i
++ ) {
325 mmesa
->sarea
->nbox
= n
;
327 ret
= drmCommandNone( mmesa
->driFd
, DRM_MACH64_SWAP
);
330 UNLOCK_HARDWARE( mmesa
);
331 fprintf( stderr
, "DRM_MACH64_SWAP: return = %d\n", ret
);
336 if ( MACH64_DEBUG
& DEBUG_ALWAYS_SYNC
) {
337 mach64WaitForIdleLocked( mmesa
);
340 UNLOCK_HARDWARE( mmesa
);
342 mmesa
->dirty
|= (MACH64_UPLOAD_CONTEXT
|
344 MACH64_UPLOAD_CLIPRECTS
);
346 #if ENABLE_PERF_BOXES
347 /* Log the performance counters if necessary */
348 mach64PerformanceCounters( mmesa
);
352 #if ENABLE_PERF_BOXES
353 /* ================================================================
354 * Performance monitoring
357 void mach64PerformanceCounters( mach64ContextPtr mmesa
)
360 if (MACH64_DEBUG
& DEBUG_VERBOSE_COUNT
) {
361 /* report performance counters */
362 fprintf( stderr
, "mach64CopyBuffer: vertexBuffers:%i drawWaits:%i clears:%i\n",
363 mmesa
->c_vertexBuffers
, mmesa
->c_drawWaits
, mmesa
->c_clears
);
366 mmesa
->c_vertexBuffers
= 0;
367 mmesa
->c_drawWaits
= 0;
370 if ( mmesa
->c_textureSwaps
|| mmesa
->c_textureBytes
|| mmesa
->c_agpTextureBytes
) {
371 if (MACH64_DEBUG
& DEBUG_VERBOSE_COUNT
) {
372 fprintf( stderr
, " textureSwaps:%i textureBytes:%i agpTextureBytes:%i\n",
373 mmesa
->c_textureSwaps
, mmesa
->c_textureBytes
, mmesa
->c_agpTextureBytes
);
375 mmesa
->c_textureSwaps
= 0;
376 mmesa
->c_textureBytes
= 0;
377 mmesa
->c_agpTextureBytes
= 0;
380 mmesa
->c_texsrc_agp
= 0;
381 mmesa
->c_texsrc_card
= 0;
383 if (MACH64_DEBUG
& DEBUG_VERBOSE_COUNT
)
384 fprintf( stderr
, "---------------------------------------------------------\n" );
388 void mach64PerformanceBoxesLocked( mach64ContextPtr mmesa
)
391 drm_mach64_clear_t clear
;
395 GLint x1
, y1
, x2
, y2
;
396 drm_clip_rect_t
*b
= mmesa
->sarea
->boxes
;
399 nbox
= mmesa
->sarea
->nbox
;
405 /* setup a single cliprect and call the clear ioctl for each box */
406 mmesa
->sarea
->nbox
= 1;
416 clear
.flags
= MACH64_BACK
;
417 clear
.clear_depth
= 0;
419 /* Red box if DDFinish was called to wait for rendering to complete */
420 if ( mmesa
->c_drawWaits
) {
421 color
= mach64PackColor( mmesa
->mach64Screen
->cpp
, 255, 0, 0, 0 );
427 clear
.clear_color
= color
;
429 ret
= drmCommandWrite( mmesa
->driFd
, DRM_MACH64_CLEAR
,
430 &clear
, sizeof(drm_mach64_clear_t
) );
433 UNLOCK_HARDWARE( mmesa
);
434 fprintf( stderr
, "DRM_MACH64_CLEAR: return = %d\n", ret
);
444 /* draw a green box if we had to wait for previous frame(s) to complete */
445 if ( !mmesa
->hardwareWentIdle
) {
446 color
= mach64PackColor( mmesa
->mach64Screen
->cpp
, 0, 255, 0, 0 );
452 clear
.clear_color
= color
;
454 ret
= drmCommandWrite( mmesa
->driFd
, DRM_MACH64_CLEAR
,
455 &clear
, sizeof(drm_mach64_clear_t
) );
458 UNLOCK_HARDWARE( mmesa
);
459 fprintf( stderr
, "DRM_MACH64_CLEAR: return = %d\n", ret
);
469 /* show approx. ratio of AGP/card textures used - Blue = AGP, Purple = Card */
470 if ( mmesa
->c_texsrc_agp
|| mmesa
->c_texsrc_card
) {
471 color
= mach64PackColor( mmesa
->mach64Screen
->cpp
, 0, 0, 255, 0 );
472 w
= ((GLfloat
)mmesa
->c_texsrc_agp
/ (GLfloat
)(mmesa
->c_texsrc_agp
+ mmesa
->c_texsrc_card
))*20;
481 clear
.clear_color
= color
;
483 ret
= drmCommandWrite( mmesa
->driFd
, DRM_MACH64_CLEAR
,
484 &clear
, sizeof(drm_mach64_clear_t
) );
487 UNLOCK_HARDWARE( mmesa
);
488 fprintf( stderr
, "DRM_MACH64_CLEAR: return = %d\n", ret
);
500 color
= mach64PackColor( mmesa
->mach64Screen
->cpp
, 255, 0, 255, 0 );
506 clear
.clear_color
= color
;
508 ret
= drmCommandWrite( mmesa
->driFd
, DRM_MACH64_CLEAR
,
509 &clear
, sizeof(drm_mach64_clear_t
) );
512 UNLOCK_HARDWARE( mmesa
);
513 fprintf( stderr
, "DRM_MACH64_CLEAR: return = %d\n", ret
);
524 /* Yellow box if we swapped textures */
525 if ( mmesa
->c_textureSwaps
) {
526 color
= mach64PackColor( mmesa
->mach64Screen
->cpp
, 255, 255, 0, 0 );
532 clear
.clear_color
= color
;
534 ret
= drmCommandWrite( mmesa
->driFd
, DRM_MACH64_CLEAR
,
535 &clear
, sizeof(drm_mach64_clear_t
) );
538 UNLOCK_HARDWARE( mmesa
);
539 fprintf( stderr
, "DRM_MACH64_CLEAR: return = %d\n", ret
);
550 /* Purple bar for card memory texture blits/uploads */
551 if ( mmesa
->c_textureBytes
) {
552 color
= mach64PackColor( mmesa
->mach64Screen
->cpp
, 255, 0, 255, 0 );
553 w
= mmesa
->c_textureBytes
/ 16384;
556 if (w
> (mmesa
->driDrawable
->w
- 44))
557 w
= mmesa
->driDrawable
->w
- 44;
565 clear
.clear_color
= color
;
567 ret
= drmCommandWrite( mmesa
->driFd
, DRM_MACH64_CLEAR
,
568 &clear
, sizeof(drm_mach64_clear_t
) );
571 UNLOCK_HARDWARE( mmesa
);
572 fprintf( stderr
, "DRM_MACH64_CLEAR: return = %d\n", ret
);
577 /* Blue bar for AGP memory texture blits/uploads */
578 if ( mmesa
->c_agpTextureBytes
) {
579 color
= mach64PackColor( mmesa
->mach64Screen
->cpp
, 0, 0, 255, 0 );
580 w
= mmesa
->c_agpTextureBytes
/ 16384;
583 if (w
> (mmesa
->driDrawable
->w
- 44))
584 w
= mmesa
->driDrawable
->w
- 44;
595 clear
.clear_color
= color
;
597 ret
= drmCommandWrite( mmesa
->driFd
, DRM_MACH64_CLEAR
,
598 &clear
, sizeof(drm_mach64_clear_t
) );
601 UNLOCK_HARDWARE( mmesa
);
602 fprintf( stderr
, "DRM_MACH64_CLEAR: return = %d\n", ret
);
607 /* Pink bar for number of vertex buffers used */
608 if ( mmesa
->c_vertexBuffers
) {
609 color
= mach64PackColor( mmesa
->mach64Screen
->cpp
, 196, 128, 128, 0 );
611 w
= mmesa
->c_vertexBuffers
;
612 if (w
> (mmesa
->driDrawable
->w
))
613 w
= mmesa
->driDrawable
->w
;
617 y
= mmesa
->drawY
+ 8;
627 clear
.clear_color
= color
;
629 ret
= drmCommandWrite( mmesa
->driFd
, DRM_MACH64_CLEAR
,
630 &clear
, sizeof(drm_mach64_clear_t
) );
633 UNLOCK_HARDWARE( mmesa
);
634 fprintf( stderr
, "DRM_MACH64_CLEAR: return = %d\n", ret
);
639 /* restore cliprects */
640 mmesa
->sarea
->nbox
= nbox
;
650 /* ================================================================
654 static void mach64DDClear( GLcontext
*ctx
, GLbitfield mask
, GLboolean all
,
655 GLint cx
, GLint cy
, GLint cw
, GLint ch
)
657 mach64ContextPtr mmesa
= MACH64_CONTEXT( ctx
);
658 __DRIdrawablePrivate
*dPriv
= mmesa
->driDrawable
;
659 drm_mach64_clear_t clear
;
664 if ( MACH64_DEBUG
& DEBUG_VERBOSE_API
) {
665 fprintf( stderr
, "%s: all=%d %d,%d %dx%d\n",
666 __FUNCTION__
, all
, cx
, cy
, cw
, ch
);
669 #if ENABLE_PERF_BOXES
670 /* Bump the performance counter */
674 FLUSH_BATCH( mmesa
);
676 /* The only state changes we care about here are the RGBA colormask
677 * and scissor/clipping. We'll just update that state, if needed.
679 if ( mmesa
->new_state
& (MACH64_NEW_MASKS
| MACH64_NEW_CLIP
) ) {
680 const GLuint save_state
= mmesa
->new_state
;
681 mmesa
->new_state
&= (MACH64_NEW_MASKS
| MACH64_NEW_CLIP
);
682 mach64DDUpdateHWState( ctx
);
683 mmesa
->new_state
= save_state
& ~(MACH64_NEW_MASKS
| MACH64_NEW_CLIP
);
686 if ( mask
& DD_FRONT_LEFT_BIT
) {
687 flags
|= MACH64_FRONT
;
688 mask
&= ~DD_FRONT_LEFT_BIT
;
691 if ( mask
& DD_BACK_LEFT_BIT
) {
692 flags
|= MACH64_BACK
;
693 mask
&= ~DD_BACK_LEFT_BIT
;
696 if ( ( mask
& DD_DEPTH_BIT
) && ctx
->Depth
.Mask
) {
697 flags
|= MACH64_DEPTH
;
698 mask
&= ~DD_DEPTH_BIT
;
702 _swrast_Clear( ctx
, mask
, all
, cx
, cy
, cw
, ch
);
707 LOCK_HARDWARE( mmesa
);
709 /* This needs to be in the locked region, so updated drawable origin is used */
710 /* Flip top to bottom */
712 cy
= mmesa
->drawY
+ dPriv
->h
- cy
- ch
;
716 if ( mmesa
->dirty
& ~MACH64_UPLOAD_CLIPRECTS
) {
717 mach64EmitHwStateLocked( mmesa
);
720 for ( i
= 0 ; i
< mmesa
->numClipRects
; ) {
721 int nr
= MIN2( i
+ MACH64_NR_SAREA_CLIPRECTS
, mmesa
->numClipRects
);
722 drm_clip_rect_t
*box
= mmesa
->pClipRects
;
723 drm_clip_rect_t
*b
= mmesa
->sarea
->boxes
;
727 for ( ; i
< nr
; i
++ ) {
730 GLint w
= box
[i
].x2
- x
;
731 GLint h
= box
[i
].y2
- y
;
733 if ( x
< cx
) w
-= cx
- x
, x
= cx
;
734 if ( y
< cy
) h
-= cy
- y
, y
= cy
;
735 if ( x
+ w
> cx
+ cw
) w
= cx
+ cw
- x
;
736 if ( y
+ h
> cy
+ ch
) h
= cy
+ ch
- y
;
737 if ( w
<= 0 ) continue;
738 if ( h
<= 0 ) continue;
748 for ( ; i
< nr
; i
++ ) {
754 mmesa
->sarea
->nbox
= n
;
756 if ( MACH64_DEBUG
& DEBUG_VERBOSE_IOCTL
) {
758 "DRM_MACH64_CLEAR: flag 0x%x color %x depth %x nbox %d\n",
760 (GLuint
)mmesa
->ClearColor
,
761 (GLuint
)mmesa
->ClearDepth
,
762 mmesa
->sarea
->nbox
);
770 clear
.clear_color
= mmesa
->ClearColor
;
771 clear
.clear_depth
= mmesa
->ClearDepth
;
773 ret
= drmCommandWrite( mmesa
->driFd
, DRM_MACH64_CLEAR
,
774 &clear
, sizeof(drm_mach64_clear_t
) );
777 UNLOCK_HARDWARE( mmesa
);
778 fprintf( stderr
, "DRM_MACH64_CLEAR: return = %d\n", ret
);
783 UNLOCK_HARDWARE( mmesa
);
785 mmesa
->dirty
|= (MACH64_UPLOAD_CONTEXT
|
787 MACH64_UPLOAD_CLIPRECTS
);
792 void mach64WaitForIdleLocked( mach64ContextPtr mmesa
)
794 int fd
= mmesa
->driFd
;
799 ret
= drmCommandNone( fd
, DRM_MACH64_IDLE
);
800 } while ( ( ret
== -EBUSY
) && ( to
++ < MACH64_TIMEOUT
) );
803 drmCommandNone( fd
, DRM_MACH64_RESET
);
804 UNLOCK_HARDWARE( mmesa
);
805 fprintf( stderr
, "Error: Mach64 timed out... exiting\n" );
810 /* Flush the DMA queue to the hardware */
811 void mach64FlushDMALocked( mach64ContextPtr mmesa
)
813 int fd
= mmesa
->driFd
;
816 ret
= drmCommandNone( fd
, DRM_MACH64_FLUSH
);
819 drmCommandNone( fd
, DRM_MACH64_RESET
);
820 UNLOCK_HARDWARE( mmesa
);
821 fprintf( stderr
, "Error flushing DMA... exiting\n" );
825 mmesa
->dirty
|= (MACH64_UPLOAD_CONTEXT
|
827 MACH64_UPLOAD_CLIPRECTS
);
831 /* For client-side state emits - currently unused */
832 void mach64UploadHwStateLocked( mach64ContextPtr mmesa
)
834 drm_mach64_sarea_t
*sarea
= mmesa
->sarea
;
836 drm_mach64_context_regs_t
*regs
= &sarea
->context_state
;
837 unsigned int dirty
= sarea
->dirty
;
838 CARD32 offset
= ((regs
->tex_size_pitch
& 0xf0) >> 2);
844 if ( dirty
& MACH64_UPLOAD_MISC
) {
845 DMAOUTREG( MACH64_DP_MIX
, regs
->dp_mix
);
846 DMAOUTREG( MACH64_DP_SRC
, regs
->dp_src
);
847 DMAOUTREG( MACH64_CLR_CMP_CNTL
, regs
->clr_cmp_cntl
);
848 DMAOUTREG( MACH64_GUI_TRAJ_CNTL
, regs
->gui_traj_cntl
);
849 DMAOUTREG( MACH64_SC_LEFT_RIGHT
, regs
->sc_left_right
);
850 DMAOUTREG( MACH64_SC_TOP_BOTTOM
, regs
->sc_top_bottom
);
851 sarea
->dirty
&= ~MACH64_UPLOAD_MISC
;
854 if ( dirty
& MACH64_UPLOAD_DST_OFF_PITCH
) {
855 DMAOUTREG( MACH64_DST_OFF_PITCH
, regs
->dst_off_pitch
);
856 sarea
->dirty
&= ~MACH64_UPLOAD_DST_OFF_PITCH
;
858 if ( dirty
& MACH64_UPLOAD_Z_OFF_PITCH
) {
859 DMAOUTREG( MACH64_Z_OFF_PITCH
, regs
->z_off_pitch
);
860 sarea
->dirty
&= ~MACH64_UPLOAD_Z_OFF_PITCH
;
862 if ( dirty
& MACH64_UPLOAD_Z_ALPHA_CNTL
) {
863 DMAOUTREG( MACH64_Z_CNTL
, regs
->z_cntl
);
864 DMAOUTREG( MACH64_ALPHA_TST_CNTL
, regs
->alpha_tst_cntl
);
865 sarea
->dirty
&= ~MACH64_UPLOAD_Z_ALPHA_CNTL
;
867 if ( dirty
& MACH64_UPLOAD_SCALE_3D_CNTL
) {
868 DMAOUTREG( MACH64_SCALE_3D_CNTL
, regs
->scale_3d_cntl
);
869 sarea
->dirty
&= ~MACH64_UPLOAD_SCALE_3D_CNTL
;
871 if ( dirty
& MACH64_UPLOAD_DP_FOG_CLR
) {
872 DMAOUTREG( MACH64_DP_FOG_CLR
, regs
->dp_fog_clr
);
873 sarea
->dirty
&= ~MACH64_UPLOAD_DP_FOG_CLR
;
875 if ( dirty
& MACH64_UPLOAD_DP_WRITE_MASK
) {
876 DMAOUTREG( MACH64_DP_WRITE_MASK
, regs
->dp_write_mask
);
877 sarea
->dirty
&= ~MACH64_UPLOAD_DP_WRITE_MASK
;
879 if ( dirty
& MACH64_UPLOAD_DP_PIX_WIDTH
) {
880 DMAOUTREG( MACH64_DP_PIX_WIDTH
, regs
->dp_pix_width
);
881 sarea
->dirty
&= ~MACH64_UPLOAD_DP_PIX_WIDTH
;
883 if ( dirty
& MACH64_UPLOAD_SETUP_CNTL
) {
884 DMAOUTREG( MACH64_SETUP_CNTL
, regs
->setup_cntl
);
885 sarea
->dirty
&= ~MACH64_UPLOAD_SETUP_CNTL
;
888 if ( dirty
& MACH64_UPLOAD_TEXTURE
) {
889 DMAOUTREG( MACH64_TEX_SIZE_PITCH
, regs
->tex_size_pitch
);
890 DMAOUTREG( MACH64_TEX_CNTL
, regs
->tex_cntl
);
891 DMAOUTREG( MACH64_SECONDARY_TEX_OFF
, regs
->secondary_tex_off
);
892 DMAOUTREG( MACH64_TEX_0_OFF
+ offset
, regs
->tex_offset
);
893 sarea
->dirty
&= ~MACH64_UPLOAD_TEXTURE
;
897 if ( dirty
& MACH64_UPLOAD_CLIPRECTS
) {
898 DMAOUTREG( MACH64_SC_LEFT_RIGHT
, regs
->sc_left_right
);
899 DMAOUTREG( MACH64_SC_TOP_BOTTOM
, regs
->sc_top_bottom
);
900 sarea
->dirty
&= ~MACH64_UPLOAD_CLIPRECTS
;
909 void mach64InitIoctlFuncs( struct dd_function_table
*functions
)
911 functions
->Clear
= mach64DDClear
;