dri/nouveau: Kill a bunch of ternary operators.
[mesa.git] / src / mesa / drivers / dri / mach64 / mach64_reg.h
1 /* -*- mode: c; c-basic-offset: 3 -*- */
2 /*
3 * Copyright 2000 Gareth Hughes
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * GARETH HUGHES BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25 /*
26 * Authors:
27 * Gareth Hughes <gareth@valinux.com>
28 * Leif Delgass <ldelgass@retinalburn.net>
29 * José Fonseca <j_r_fonseca@yahoo.co.uk>
30 */
31
32 #ifndef __MACH64_REG_H__
33 #define __MACH64_REG_H__
34
35 /*
36 * Not sure how this compares with the G200, but the Rage Pro has two
37 * banks of registers, with bank 0 at (aperture base + memmap offset - 1KB)
38 * and bank 1 at (aperture base + memmap offset - 2KB). But, to send them
39 * via DMA, we need to encode them as memory map select rather than physical
40 * offsets.
41 */
42 #define DWMREG0 0x0400
43 #define DWMREG0_END 0x07ff
44 #define DWMREG1 0x0000
45 #define DWMREG1_END 0x03ff
46
47 #define ISREG0(r) ( ( (r) >= DWMREG0 ) && ( (r) <= DWMREG0_END ) )
48 #define ADRINDEX0(r) ( ((r) - DWMREG0) >> 2 )
49 #define ADRINDEX1(r) ( ( ((r) - DWMREG1) >> 2 ) | 0x0100 )
50 #define ADRINDEX(r) ( ISREG0(r) ? ADRINDEX0(r) : ADRINDEX1(r) )
51
52 #define MMREG0 0x0000
53 #define MMREG0_END 0x00ff
54
55 #define ISMMREG0(r) ( ( (r) >= MMREG0 ) && ( (r) <= MMREG0_END ) )
56 #define MMSELECT0(r) ( ((r)<<2) + DWMREG0 )
57 #define MMSELECT1(r) ( ( (((r) & 0xff)<<2) + DWMREG1 ) )
58 #define MMSELECT(r) ( ISMMREG0(r) ? MMSELECT0(r) : MMSELECT1(r) )
59
60 /* FIXME: If register reads are necessary, we should account for endianess here */
61 #define MACH64_BASE(reg) ((CARD32)(mmesa->mach64Screen->mmio.map))
62 #define MACH64_ADDR(reg) (MACH64_BASE(reg) + reg)
63
64 #define MACH64_DEREF(reg) *(__volatile__ CARD32 *)MACH64_ADDR(reg)
65 #define MACH64_READ(reg) MACH64_DEREF(reg)
66
67
68 /* ================================================================
69 * Registers
70 */
71
72 #define MACH64_ALPHA_TST_CNTL 0x0550
73 # define MACH64_ALPHA_TEST_EN (1 << 0)
74 # define MACH64_ALPHA_TEST_MASK (7 << 4)
75 # define MACH64_ALPHA_TEST_NEVER (0 << 4)
76 # define MACH64_ALPHA_TEST_LESS (1 << 4)
77 # define MACH64_ALPHA_TEST_LEQUAL (2 << 4)
78 # define MACH64_ALPHA_TEST_EQUAL (3 << 4)
79 # define MACH64_ALPHA_TEST_GEQUAL (4 << 4)
80 # define MACH64_ALPHA_TEST_GREATER (5 << 4)
81 # define MACH64_ALPHA_TEST_NOTEQUAL (6 << 4)
82 # define MACH64_ALPHA_TEST_ALWAYS (7 << 4)
83 # define MACH64_ALPHA_MOD_MSB (1 << 7)
84 # define MACH64_ALPHA_DST_MASK (7 << 8)
85 # define MACH64_ALPHA_DST_ZERO (0 << 8)
86 # define MACH64_ALPHA_DST_ONE (1 << 8)
87 # define MACH64_ALPHA_DST_SRCALPHA (4 << 8)
88 # define MACH64_ALPHA_DST_INVSRCALPHA (5 << 8)
89 # define MACH64_ALPHA_DST_DSTALPHA (6 << 8)
90 # define MACH64_ALPHA_DST_INVDSTALPHA (7 << 8)
91 # define MACH64_ALPHA_TST_SRC_TEXEL (0 << 12)
92 # define MACH64_ALPHA_TST_SRC_SRCALPHA (1 << 12)
93 # define MACH64_REF_ALPHA_MASK (0xff << 16)
94 # define MACH64_REF_ALPHA_SHIFT 16
95 # define MACH64_COMPOSITE_SHADOW (1 << 30)
96 # define MACH64_SPECULAR_LIGHT_EN (1 << 31)
97
98 #define MACH64_BUS_CNTL 0x04a0
99 # define MACH64_BUS_MSTR_RESET (1 << 1)
100 # define MACH64_BUS_FLUSH_BUF (1 << 2)
101 # define MACH64_BUS_MASTER_DIS (1 << 6)
102 # define MACH64_BUS_EXT_REG_EN (1 << 27)
103
104 #define MACH64_COMPOSITE_SHADOW_ID 0x0798
105
106 #define MACH64_CLR_CMP_CLR 0x0700
107 #define MACH64_CLR_CMP_CNTL 0x0708
108 #define MACH64_CLR_CMP_MASK 0x0704
109
110 #define MACH64_DP_BKGD_CLR 0x06c0
111 #define MACH64_DP_FOG_CLR 0x06c4
112 #define MACH64_DP_FGRD_BKGD_CLR 0x06e0
113 #define MACH64_DP_FRGD_CLR 0x06c4
114 #define MACH64_DP_FGRD_CLR_MIX 0x06dc
115
116 #define MACH64_DP_MIX 0x06d4
117 # define BKGD_MIX_NOT_D (0 << 0)
118 # define BKGD_MIX_ZERO (1 << 0)
119 # define BKGD_MIX_ONE (2 << 0)
120 # define MACH64_BKGD_MIX_D (3 << 0)
121 # define BKGD_MIX_NOT_S (4 << 0)
122 # define BKGD_MIX_D_XOR_S (5 << 0)
123 # define BKGD_MIX_NOT_D_XOR_S (6 << 0)
124 # define MACH64_BKGD_MIX_S (7 << 0)
125 # define BKGD_MIX_NOT_D_OR_NOT_S (8 << 0)
126 # define BKGD_MIX_D_OR_NOT_S (9 << 0)
127 # define BKGD_MIX_NOT_D_OR_S (10 << 0)
128 # define BKGD_MIX_D_OR_S (11 << 0)
129 # define BKGD_MIX_D_AND_S (12 << 0)
130 # define BKGD_MIX_NOT_D_AND_S (13 << 0)
131 # define BKGD_MIX_D_AND_NOT_S (14 << 0)
132 # define BKGD_MIX_NOT_D_AND_NOT_S (15 << 0)
133 # define BKGD_MIX_D_PLUS_S_DIV2 (23 << 0)
134 # define FRGD_MIX_NOT_D (0 << 16)
135 # define FRGD_MIX_ZERO (1 << 16)
136 # define FRGD_MIX_ONE (2 << 16)
137 # define FRGD_MIX_D (3 << 16)
138 # define FRGD_MIX_NOT_S (4 << 16)
139 # define FRGD_MIX_D_XOR_S (5 << 16)
140 # define FRGD_MIX_NOT_D_XOR_S (6 << 16)
141 # define MACH64_FRGD_MIX_S (7 << 16)
142 # define FRGD_MIX_NOT_D_OR_NOT_S (8 << 16)
143 # define FRGD_MIX_D_OR_NOT_S (9 << 16)
144 # define FRGD_MIX_NOT_D_OR_S (10 << 16)
145 # define FRGD_MIX_D_OR_S (11 << 16)
146 # define FRGD_MIX_D_AND_S (12 << 16)
147 # define FRGD_MIX_NOT_D_AND_S (13 << 16)
148 # define FRGD_MIX_D_AND_NOT_S (14 << 16)
149 # define FRGD_MIX_NOT_D_AND_NOT_S (15 << 16)
150 # define FRGD_MIX_D_PLUS_S_DIV2 (23 << 16)
151
152 #define MACH64_DP_PIX_WIDTH 0x06d0
153 # define MACH64_COMPOSITE_PIX_WIDTH_MASK (0xf << 4)
154 # define MACH64_HOST_TRIPLE_ENABLE (1 << 13)
155 # define MACH64_BYTE_ORDER_MSB_TO_LSB (0 << 24)
156 # define MACH64_BYTE_ORDER_LSB_TO_MSB (1 << 24)
157 # define MACH64_SCALE_PIX_WIDTH_MASK (0xf << 28)
158
159 #define MACH64_DP_SRC 0x06d8
160 # define MACH64_BKGD_SRC_BKGD_CLR (0 << 0)
161 # define MACH64_BKGD_SRC_FRGD_CLR (1 << 0)
162 # define MACH64_BKGD_SRC_HOST (2 << 0)
163 # define MACH64_BKGD_SRC_BLIT (3 << 0)
164 # define MACH64_BKGD_SRC_PATTERN (4 << 0)
165 # define MACH64_BKGD_SRC_3D (5 << 0)
166 # define MACH64_FRGD_SRC_BKGD_CLR (0 << 8)
167 # define MACH64_FRGD_SRC_FRGD_CLR (1 << 8)
168 # define MACH64_FRGD_SRC_HOST (2 << 8)
169 # define MACH64_FRGD_SRC_BLIT (3 << 8)
170 # define MACH64_FRGD_SRC_PATTERN (4 << 8)
171 # define MACH64_FRGD_SRC_3D (5 << 8)
172 # define MACH64_MONO_SRC_ONE (0 << 16)
173 # define MACH64_MONO_SRC_PATTERN (1 << 16)
174 # define MACH64_MONO_SRC_HOST (2 << 16)
175 # define MACH64_MONO_SRC_BLIT (3 << 16)
176
177 #define MACH64_DP_WRITE_MASK 0x06c8
178
179 #define MACH64_DST_CNTL 0x0530
180 # define MACH64_DST_X_RIGHT_TO_LEFT (0 << 0)
181 # define MACH64_DST_X_LEFT_TO_RIGHT (1 << 0)
182 # define MACH64_DST_Y_BOTTOM_TO_TOP (0 << 1)
183 # define MACH64_DST_Y_TOP_TO_BOTTOM (1 << 1)
184 # define MACH64_DST_X_MAJOR (0 << 2)
185 # define MACH64_DST_Y_MAJOR (1 << 2)
186 # define MACH64_DST_X_TILE (1 << 3)
187 # define MACH64_DST_Y_TILE (1 << 4)
188 # define MACH64_DST_LAST_PEL (1 << 5)
189 # define MACH64_DST_POLYGON_ENABLE (1 << 6)
190 # define MACH64_DST_24_ROTATION_ENABLE (1 << 7)
191
192 #define MACH64_DST_HEIGHT_WIDTH 0x0518
193 #define MACH64_DST_OFF_PITCH 0x0500
194 #define MACH64_DST_WIDTH_HEIGHT 0x06ec
195 #define MACH64_DST_X_Y 0x06e8
196 #define MACH64_DST_Y_X 0x050c
197
198 #define MACH64_FIFO_STAT 0x0710
199 # define MACH64_FIFO_SLOT_MASK 0x0000ffff
200 # define MACH64_FIFO_ERR (1 << 31)
201
202 #define MACH64_GEN_TEST_CNTL 0x04d0
203 #define MACH64_GUI_CMDFIFO_DEBUG 0x0170
204 #define MACH64_GUI_CMDFIFO_DATA 0x0174
205 #define MACH64_GUI_CNTL 0x0178
206 #define MACH64_GUI_STAT 0x0738
207 # define MACH64_GUI_ACTIVE (1 << 0)
208 #define MACH64_GUI_TRAJ_CNTL 0x0730
209
210 #define MACH64_HOST_CNTL 0x0640
211 #define MACH64_HOST_DATA0 0x0600
212 #define MACH64_HW_DEBUG 0x047c
213
214 #define MACH64_ONE_OVER_AREA 0x029c
215 #define MACH64_ONE_OVER_AREA_UC 0x0300
216
217 #define MACH64_PAT_REG0 0x0680
218 #define MACH64_PAT_REG1 0x0684
219
220 #define MACH64_SC_LEFT_RIGHT 0x06a8
221 #define MACH64_SC_TOP_BOTTOM 0x06b4
222 #define MACH64_SCALE_3D_CNTL 0x05fc
223 # define MACH64_SCALE_PIX_EXPAND_ZERO_EXTEND (0 << 0)
224 # define MACH64_SCALE_PIX_EXPAND_DYNAMIC_RANGE (1 << 0)
225 # define MACH64_SCALE_DITHER_ERROR_DIFFUSE (0 << 1)
226 # define MACH64_SCALE_DITHER_2D_TABLE (1 << 1)
227 # define MACH64_DITHER_EN (1 << 2)
228 # define MACH64_DITHER_INIT_CURRENT (O << 3)
229 # define MACH64_DITHER_INIT_RESET (1 << 3)
230 # define MACH64_ROUND_EN (1 << 4)
231 # define MACH64_TEX_CACHE_DIS (1 << 5)
232 # define MACH64_SCALE_3D_FCN_MASK (3 << 6)
233 # define MACH64_SCALE_3D_FCN_NOP (0 << 6)
234 # define MACH64_SCALE_3D_FCN_SCALE (1 << 6)
235 # define MACH64_SCALE_3D_FCN_TEXTURE (2 << 6)
236 # define MACH64_SCALE_3D_FCN_SHADE (3 << 6)
237 # define MACH64_TEXTURE_DISABLE (1 << 6)
238 # define MACH64_EDGE_ANTI_ALIAS (1 << 8)
239 # define MACH64_TEX_CACHE_SPLIT (1 << 9)
240 # define MACH64_APPLE_YUV_MODE (1 << 10)
241 # define MACH64_ALPHA_FOG_EN_MASK (3 << 11)
242 # define MACH64_ALPHA_FOG_DIS (0 << 11)
243 # define MACH64_ALPHA_FOG_EN_ALPHA (1 << 11)
244 # define MACH64_ALPHA_FOG_EN_FOG (2 << 11)
245 # define MACH64_ALPHA_BLEND_SAT (1 << 13)
246 # define MACH64_RED_DITHER_MAX (1 << 14)
247 # define MACH64_SIGNED_DST_CLAMP (1 << 15)
248 # define MACH64_ALPHA_BLEND_SRC_MASK (7 << 16)
249 # define MACH64_ALPHA_BLEND_SRC_ZERO (0 << 16)
250 # define MACH64_ALPHA_BLEND_SRC_ONE (1 << 16)
251 # define MACH64_ALPHA_BLEND_SRC_DSTCOLOR (2 << 16)
252 # define MACH64_ALPHA_BLEND_SRC_INVDSTCOLOR (3 << 16)
253 # define MACH64_ALPHA_BLEND_SRC_SRCALPHA (4 << 16)
254 # define MACH64_ALPHA_BLEND_SRC_INVSRCALPHA (5 << 16)
255 # define MACH64_ALPHA_BLEND_SRC_DSTALPHA (6 << 16)
256 # define MACH64_ALPHA_BLEND_SRC_INVDSTALPHA (7 << 16)
257 # define MACH64_ALPHA_BLEND_DST_MASK (7 << 19)
258 # define MACH64_ALPHA_BLEND_DST_ZERO (0 << 19)
259 # define MACH64_ALPHA_BLEND_DST_ONE (1 << 19)
260 # define MACH64_ALPHA_BLEND_DST_SRCCOLOR (2 << 19)
261 # define MACH64_ALPHA_BLEND_DST_INVSRCCOLOR (3 << 19)
262 # define MACH64_ALPHA_BLEND_DST_SRCALPHA (4 << 19)
263 # define MACH64_ALPHA_BLEND_DST_INVSRCALPHA (5 << 19)
264 # define MACH64_ALPHA_BLEND_DST_DSTALPHA (6 << 19)
265 # define MACH64_ALPHA_BLEND_DST_INVDSTALPHA (7 << 19)
266 # define MACH64_TEX_LIGHT_FCN_MASK (3 << 22)
267 # define MACH64_TEX_LIGHT_FCN_REPLACE (0 << 22)
268 # define MACH64_TEX_LIGHT_FCN_MODULATE (1 << 22)
269 # define MACH64_TEX_LIGHT_FCN_ALPHA_DECAL (2 << 22)
270 # define MACH64_MIP_MAP_DISABLE (1 << 24)
271 # define MACH64_BILINEAR_TEX_EN (1 << 25)
272 # define MACH64_TEX_BLEND_FCN_MASK (3 << 26)
273 # define MACH64_TEX_BLEND_FCN_NEAREST (0 << 26)
274 # define MACH64_TEX_BLEND_FCN_LINEAR (2 << 26)
275 # define MACH64_TEX_BLEND_FCN_TRILINEAR (3 << 26)
276 # define MACH64_TEX_AMASK_AEN (1 << 28)
277 # define MACH64_TEX_AMASK_BLEND_EDGE (1 << 29)
278 # define MACH64_TEX_MAP_AEN (1 << 30)
279 # define MACH64_SRC_3D_HOST_FIFO (1 << 31)
280 #define MACH64_SCRATCH_REG0 0x0480
281 #define MACH64_SCRATCH_REG1 0x0484
282 #define MACH64_SECONDARY_TEX_OFF 0x0778
283 #define MACH64_SETUP_CNTL 0x0304
284 # define MACH64_DONT_START_TRI (1 << 0)
285 # define MACH64_DONT_START_ANY (1 << 2)
286 # define MACH64_FLAT_SHADE_MASK (3 << 3)
287 # define MACH64_FLAT_SHADE_OFF (0 << 3)
288 # define MACH64_FLAT_SHADE_VERTEX_1 (1 << 3)
289 # define MACH64_FLAT_SHADE_VERTEX_2 (2 << 3)
290 # define MACH64_FLAT_SHADE_VERTEX_3 (3 << 3)
291 # define MACH64_SOLID_MODE_OFF (0 << 5)
292 # define MACH64_SOLID_MODE_ON (1 << 5)
293 # define MACH64_LOG_MAX_INC_ADJ (1 << 6)
294 # define MACH64_SET_UP_CONTINUE (1 << 31)
295 #define MACH64_SRC_CNTL 0x05b4
296 #define MACH64_SRC_HEIGHT1 0x0594
297 #define MACH64_SRC_HEIGHT2 0x05ac
298 #define MACH64_SRC_HEIGHT1_WIDTH1 0x0598
299 #define MACH64_SRC_HEIGHT2_WIDTH2 0x05b0
300 #define MACH64_SRC_OFF_PITCH 0x0580
301 #define MACH64_SRC_WIDTH1 0x0590
302 #define MACH64_SRC_Y_X 0x058c
303
304 #define MACH64_TEX_0_OFF 0x05c0
305 #define MACH64_TEX_CNTL 0x0774
306 # define MACH64_LOD_BIAS_SHIFT 0
307 # define MACH64_LOD_BIAS_MASK (0xf << 0)
308 # define MACH64_COMP_FACTOR_SHIFT 4
309 # define MACH64_COMP_FACTOR_MASK (0xf << 4)
310 # define MACH64_TEXTURE_COMPOSITE (1 << 8)
311 # define MACH64_COMP_COMBINE_BLEND (0 << 9)
312 # define MACH64_COMP_COMBINE_MODULATE (1 << 9)
313 # define MACH64_COMP_BLEND_NEAREST (0 << 11)
314 # define MACH64_COMP_BLEND_BILINEAR (1 << 11)
315 # define MACH64_COMP_FILTER_NEAREST (0 << 12)
316 # define MACH64_COMP_FILTER_BILINEAR (1 << 12)
317 # define MACH64_COMP_ALPHA (1 << 13)
318 # define MACH64_TEXTURE_TILING (1 << 14)
319 # define MACH64_COMPOSITE_TEX_TILING (1 << 15)
320 # define MACH64_TEX_COLLISION_DISABLE (1 << 16)
321 # define MACH64_TEXTURE_CLAMP_S (1 << 17)
322 # define MACH64_TEXTURE_CLAMP_T (1 << 18)
323 # define MACH64_TEX_ST_MULT_W (0 << 19)
324 # define MACH64_TEX_ST_DIRECT (1 << 19)
325 # define MACH64_TEX_SRC_LOCAL (0 << 20)
326 # define MACH64_TEX_SRC_AGP (1 << 20)
327 # define MACH64_TEX_UNCOMPRESSED (0 << 21)
328 # define MACH64_TEX_VQ_COMPRESSED (1 << 21)
329 # define MACH64_COMP_TEX_UNCOMPRESSED (0 << 22)
330 # define MACH64_COMP_TEX_VQ_COMPRESSED (1 << 22)
331 # define MACH64_TEX_CACHE_FLUSH (1 << 23)
332 # define MACH64_SEC_TEX_CLAMP_S (1 << 24)
333 # define MACH64_SEC_TEX_CLAMP_T (1 << 25)
334 # define MACH64_TEX_WRAP_S (1 << 28)
335 # define MACH64_TEX_WRAP_T (1 << 29)
336 # define MACH64_TEX_CACHE_SIZE_4K (1 << 30)
337 # define MACH64_TEX_CACHE_SIZE_2K (1 << 30)
338 # define MACH64_SECONDARY_STW (1 << 31)
339 #define MACH64_TEX_PALETTE 0x077c
340 #define MACH64_TEX_PALETTE_INDEX 0x0740
341 #define MACH64_TEX_SIZE_PITCH 0x0770
342
343 #define MACH64_VERTEX_1_ARGB 0x0254
344 #define MACH64_VERTEX_1_S 0x0240
345 #define MACH64_VERTEX_1_SECONDARY_S 0x0328
346 #define MACH64_VERTEX_1_SECONDARY_T 0x032c
347 #define MACH64_VERTEX_1_SECONDARY_W 0x0330
348 #define MACH64_VERTEX_1_SPEC_ARGB 0x024c
349 #define MACH64_VERTEX_1_T 0x0244
350 #define MACH64_VERTEX_1_W 0x0248
351 #define MACH64_VERTEX_1_X_Y 0x0258
352 #define MACH64_VERTEX_1_Z 0x0250
353 #define MACH64_VERTEX_2_ARGB 0x0274
354 #define MACH64_VERTEX_2_S 0x0260
355 #define MACH64_VERTEX_2_SECONDARY_S 0x0334
356 #define MACH64_VERTEX_2_SECONDARY_T 0x0338
357 #define MACH64_VERTEX_2_SECONDARY_W 0x033c
358 #define MACH64_VERTEX_2_SPEC_ARGB 0x026c
359 #define MACH64_VERTEX_2_T 0x0264
360 #define MACH64_VERTEX_2_W 0x0268
361 #define MACH64_VERTEX_2_X_Y 0x0278
362 #define MACH64_VERTEX_2_Z 0x0270
363 #define MACH64_VERTEX_3_ARGB 0x0294
364 #define MACH64_VERTEX_3_S 0x0280
365 #define MACH64_VERTEX_3_SECONDARY_S 0x02a0
366 #define MACH64_VERTEX_3_SECONDARY_T 0x02a4
367 #define MACH64_VERTEX_3_SECONDARY_W 0x02a8
368 #define MACH64_VERTEX_3_SPEC_ARGB 0x028c
369 #define MACH64_VERTEX_3_T 0x0284
370 #define MACH64_VERTEX_3_W 0x0288
371 #define MACH64_VERTEX_3_X_Y 0x0298
372 #define MACH64_VERTEX_3_Z 0x0290
373
374 #define MACH64_Z_CNTL 0x054c
375 # define MACH64_Z_EN (1 << 0)
376 # define MACH64_Z_SRC_2D (1 << 1)
377 # define MACH64_Z_TEST_MASK (7 << 4)
378 # define MACH64_Z_TEST_NEVER (0 << 4)
379 # define MACH64_Z_TEST_LESS (1 << 4)
380 # define MACH64_Z_TEST_LEQUAL (2 << 4)
381 # define MACH64_Z_TEST_EQUAL (3 << 4)
382 # define MACH64_Z_TEST_GEQUAL (4 << 4)
383 # define MACH64_Z_TEST_GREATER (5 << 4)
384 # define MACH64_Z_TEST_NOTEQUAL (6 << 4)
385 # define MACH64_Z_TEST_ALWAYS (7 << 4)
386 # define MACH64_Z_MASK_EN (1 << 8)
387 #define MACH64_Z_OFF_PITCH 0x0548
388
389
390
391 #define MACH64_DATATYPE_CI8 2
392 #define MACH64_DATATYPE_ARGB1555 3
393 #define MACH64_DATATYPE_RGB565 4
394 #define MACH64_DATATYPE_ARGB8888 6
395 #define MACH64_DATATYPE_RGB332 7
396 #define MACH64_DATATYPE_Y8 8
397 #define MACH64_DATATYPE_RGB8 9
398 #define MACH64_DATATYPE_VYUY422 11
399 #define MACH64_DATATYPE_YVYU422 12
400 #define MACH64_DATATYPE_AYUV444 14
401 #define MACH64_DATATYPE_ARGB4444 15
402
403 #define MACH64_LAST_FRAME_REG MACH64_PAT_REG0
404 #define MACH64_LAST_DISPATCH_REG MACH64_PAT_REG1
405
406 #endif /* __MACH64_REG_H__ */