src/mesa/drivers/dri/nouveau/nouveau_fifo.c

   1 /**************************************************************************
   2
   3 Copyright 2006 Stephane Marchesin
   4 All Rights Reserved.
   5
   6 Permission is hereby granted, free of charge, to any person obtaining a
   7 copy of this software and associated documentation files (the "Software"),
   8 to deal in the Software without restriction, including without limitation
   9 on the rights to use, copy, modify, merge, publish, distribute, sub
  10 license, and/or sell copies of the Software, and to permit persons to whom
  11 the Software is furnished to do so, subject to the following conditions:
  12
  13 The above copyright notice and this permission notice (including the next
  14 paragraph) shall be included in all copies or substantial portions of the
  15 Software.
  16
  17 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19 FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  20 ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
  21 DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  22 OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  23 USE OR OTHER DEALINGS IN THE SOFTWARE.
  24
  25 **************************************************************************/
  26
  27
  28 #include "vblank.h"
  29 #include <errno.h>
  30 #include "mtypes.h"
  31 #include "macros.h"
  32 #include "dd.h"
  33 #include "swrast/swrast.h"
  34 #include "nouveau_context.h"
  35 #include "nouveau_msg.h"
  36 #include "nouveau_fifo.h"
  37 #include "nouveau_lock.h"
  38 #include "nouveau_object.h"
  39 #include "nouveau_sync.h"
  40
  41 #ifdef NOUVEAU_RING_DEBUG
  42 int nouveau_fifo_remaining=0;
  43 #endif
  44
  45
  46 #define RING_SKIPS 8
  47
  48 void WAIT_RING(nouveauContextPtr nmesa,u_int32_t size)
  49 {
  50 #ifdef NOUVEAU_RING_DEBUG
  51         return;
  52 #endif
  53         u_int32_t fifo_get;
  54         while(nmesa->fifo.free < size+1) {
  55                 fifo_get = NV_FIFO_READ_GET();
  56
  57                 if(nmesa->fifo.put >= fifo_get) {
  58                         nmesa->fifo.free = nmesa->fifo.max - nmesa->fifo.current;
  59                         if(nmesa->fifo.free < size+1) {
  60                                 OUT_RING(NV03_FIFO_CMD_JUMP |
  61                                          nmesa->fifo.drm.put_base);
  62                                 if(fifo_get <= RING_SKIPS) {
  63                                         if(nmesa->fifo.put <= RING_SKIPS) /* corner case - will be idle */
  64                                                 NV_FIFO_WRITE_PUT(RING_SKIPS + 1);
  65                                         do { fifo_get = NV_FIFO_READ_GET(); }
  66                                         while(fifo_get <= RING_SKIPS);
  67                                 }
  68                                 NV_FIFO_WRITE_PUT(RING_SKIPS);
  69                                 nmesa->fifo.current = nmesa->fifo.put = RING_SKIPS;
  70                                 nmesa->fifo.free = fifo_get - (RING_SKIPS + 1);
  71                         }
  72                 } else
  73                         nmesa->fifo.free = fifo_get - nmesa->fifo.current - 1;
  74         }
  75 }
  76
  77 /*
  78  * Wait for the channel to be idle
  79  */
  80 void nouveauWaitForIdleLocked(nouveauContextPtr nmesa)
  81 {
  82         /* Wait for FIFO idle */
  83         FIRE_RING();
  84         while(RING_AHEAD()>0);
  85
  86         /* Wait on notifier to indicate all commands in the channel have
  87          * been completed.
  88          */
  89         nouveau_notifier_wait_nop(nmesa->glCtx, nmesa->syncNotifier, NvSub3D);
  90 }
  91
  92 void nouveauWaitForIdle(nouveauContextPtr nmesa)
  93 {
  94         LOCK_HARDWARE(nmesa);
  95         nouveauWaitForIdleLocked(nmesa);
  96         UNLOCK_HARDWARE(nmesa);
  97 }
  98
  99 // here we call the fifo initialization ioctl and fill in stuff accordingly
 100 GLboolean nouveauFifoInit(nouveauContextPtr nmesa)
 101 {
 102         int i, ret;
 103
 104 #ifdef NOUVEAU_RING_DEBUG
 105         return GL_TRUE;
 106 #endif
 107
 108         nmesa->fifo.drm.fb_ctxdma_handle = NvDmaFB;
 109         nmesa->fifo.drm.tt_ctxdma_handle = NvDmaTT;
 110         ret = drmCommandWriteRead(nmesa->driFd, DRM_NOUVEAU_CHANNEL_ALLOC,
 111                                   &nmesa->fifo.drm, sizeof(nmesa->fifo.drm));
 112         if (ret) {
 113                 FATAL("Fifo initialization ioctl failed (returned %d)\n", ret);
 114                 return GL_FALSE;
 115         }
 116
 117         ret = drmMap(nmesa->driFd, nmesa->fifo.drm.cmdbuf,
 118                      nmesa->fifo.drm.cmdbuf_size, &nmesa->fifo.pushbuf);
 119         if (ret) {
 120                 FATAL("Unable to map the fifo (returned %d)\n", ret);
 121                 return GL_FALSE;
 122         }
 123
 124         ret = drmMap(nmesa->driFd, nmesa->fifo.drm.ctrl,
 125                      nmesa->fifo.drm.ctrl_size, &nmesa->fifo.mmio);
 126         if (ret) {
 127                 FATAL("Unable to map the control regs (returned %d)\n", ret);
 128                 return GL_FALSE;
 129         }
 130
 131         ret = drmMap(nmesa->driFd, nmesa->fifo.drm.notifier,
 132                                    nmesa->fifo.drm.notifier_size,
 133                                    &nmesa->fifo.notifier_block);
 134         if (ret) {
 135                 FATAL("Unable to map the notifier block (returned %d)\n", ret);
 136                 return GL_FALSE;
 137         }
 138
 139         /* Setup our initial FIFO tracking params */
 140         nmesa->fifo.current  = 0;
 141         nmesa->fifo.put      = 0;
 142         nmesa->fifo.max      = (nmesa->fifo.drm.cmdbuf_size >> 2) - 1;
 143         nmesa->fifo.free     = nmesa->fifo.max - nmesa->fifo.current;
 144
 145         for (i=0; i<RING_SKIPS; i++)
 146            OUT_RING(0);
 147         nmesa->fifo.free -= RING_SKIPS;
 148
 149         MESSAGE("Fifo init ok. Using context %d\n", nmesa->fifo.drm.channel);
 150         return GL_TRUE;
 151 }
 152
 153