src/mesa/drivers/dri/nouveau/nouveau_object.c

   1
   2 #include "nouveau_fifo.h"
   3 #include "nouveau_object.h"
   4 #include "nouveau_reg.h"
   5
   6
   7 GLboolean nouveauCreateContextObject(nouveauContextPtr nmesa, int handle, int class, uint32_t flags, uint32_t dma_in, uint32_t dma_out, uint32_t dma_notifier)
   8 {
   9         drm_nouveau_object_init_t cto;
  10         int ret;
  11
  12         cto.handle = handle;
  13         cto.class  = class;
  14         cto.flags  = flags;
  15         cto.dma0= dma_in;
  16         cto.dma1= dma_out;
  17         cto.dma_notifier = dma_notifier;
  18         ret = drmCommandWrite(nmesa->driFd, DRM_NOUVEAU_OBJECT_INIT, &cto, sizeof(cto));
  19
  20         return ret == 0;
  21 }
  22
  23 GLboolean nouveauCreateDmaObject(nouveauContextPtr nmesa,
  24                                  uint32_t handle,
  25                                  uint32_t offset,
  26                                  uint32_t size,
  27                                  int      target,
  28                                  int      access)
  29 {
  30         drm_nouveau_dma_object_init_t dma;
  31         int ret;
  32
  33         dma.handle = handle;
  34         dma.target = target;
  35         dma.access = access;
  36         dma.offset = offset;
  37         dma.size   = size;
  38         ret = drmCommandWriteRead(nmesa->driFd, DRM_NOUVEAU_DMA_OBJECT_INIT,
  39                                   &dma, sizeof(dma));
  40         return ret == 0;
  41 }
  42
  43 void nouveauObjectOnSubchannel(nouveauContextPtr nmesa, int subchannel, int handle)
  44 {
  45         BEGIN_RING_SIZE(subchannel, 0, 1);
  46         OUT_RING(handle);
  47 }
  48
  49 void nouveauObjectInit(nouveauContextPtr nmesa)
  50 {
  51 #ifdef NOUVEAU_RING_DEBUG
  52         return;
  53 #endif
  54
  55 /* We need to know vram size.. and AGP size (and even if the card is AGP..) */
  56         nouveauCreateDmaObject( nmesa, NvDmaFB,
  57                                 0, (256*1024*1024),
  58                                 0 /*NV_DMA_TARGET_FB*/, 0 /*NV_DMA_ACCESS_RW*/);
  59         nouveauCreateDmaObject( nmesa, NvDmaAGP,
  60                                 nmesa->agp_phys, (128*1024*1024),
  61                                 3 /* AGP */, 0 /* RW */);
  62
  63         nouveauCreateContextObject(nmesa, Nv3D, nmesa->screen->card->class_3d,
  64                                    0, 0, 0, 0);
  65         if (nmesa->screen->card->type>=NV_10) {
  66                 nouveauCreateContextObject(nmesa, NvCtxSurf2D, NV10_CONTEXT_SURFACES_2D,
  67                                    0, 0, 0, 0);
  68                 nouveauCreateContextObject(nmesa, NvImageBlit, NV10_IMAGE_BLIT,
  69                                    NV_DMA_CONTEXT_FLAGS_PATCH_SRCCOPY, 0, 0, 0);
  70         } else {
  71                 nouveauCreateContextObject(nmesa, NvCtxSurf2D, NV04_CONTEXT_SURFACES_2D,
  72                                    0, 0, 0, 0);
  73                 nouveauCreateContextObject(nmesa, NvImageBlit, NV_IMAGE_BLIT,
  74                                    NV_DMA_CONTEXT_FLAGS_PATCH_SRCCOPY, 0, 0, 0);
  75         }
  76         nouveauCreateContextObject(nmesa, NvMemFormat,
  77                                    NV_MEMORY_TO_MEMORY_FORMAT,
  78                                    0, 0, 0, 0);
  79
  80 #ifdef ALLOW_MULTI_SUBCHANNEL
  81         nouveauObjectOnSubchannel(nmesa, NvSubCtxSurf2D, NvCtxSurf2D);
  82         BEGIN_RING_SIZE(NvSubCtxSurf2D, NV10_CONTEXT_SURFACES_2D_SET_DMA_IN_MEMORY0, 2);
  83         OUT_RING(NvDmaFB);
  84         OUT_RING(NvDmaFB);
  85
  86         nouveauObjectOnSubchannel(nmesa, NvSubImageBlit, NvImageBlit);
  87         BEGIN_RING_SIZE(NvSubImageBlit, NV10_IMAGE_BLIT_SET_CONTEXT_SURFACES_2D, 1);
  88         OUT_RING(NvCtxSurf2D);
  89         BEGIN_RING_SIZE(NvSubImageBlit, NV10_IMAGE_BLIT_SET_OPERATION, 1);
  90         OUT_RING(3); /* SRCCOPY */
  91
  92         nouveauObjectOnSubchannel(nmesa, NvSubMemFormat, NvMemFormat);
  93 #endif
  94
  95         nouveauObjectOnSubchannel(nmesa, NvSub3D, Nv3D);
  96 }
  97
  98
  99