2 * Copyright (C) 2007-2010 The Nouveau Project.
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 #include "nouveau_driver.h"
28 #include "nv_object.xml.h"
29 #include "nv_m2mf.xml.h"
30 #include "nv01_2d.xml.h"
31 #include "nv04_3d.xml.h"
32 #include "nouveau_context.h"
33 #include "nouveau_util.h"
34 #include "nv04_driver.h"
37 swzsurf_format(mesa_format format
)
40 case MESA_FORMAT_A_UNORM8
:
41 case MESA_FORMAT_L_UNORM8
:
42 case MESA_FORMAT_I_UNORM8
:
43 case MESA_FORMAT_B2G3R3_UNORM
:
44 return NV04_SWIZZLED_SURFACE_FORMAT_COLOR_Y8
;
46 case MESA_FORMAT_B5G6R5_UNORM
:
47 case MESA_FORMAT_R5G6B5_UNORM
:
48 case MESA_FORMAT_B4G4R4A4_UNORM
:
49 case MESA_FORMAT_A4R4G4B4_UNORM
:
50 case MESA_FORMAT_B5G5R5A1_UNORM
:
51 case MESA_FORMAT_A1B5G5R5_UNORM
:
52 case MESA_FORMAT_A1R5G5B5_UNORM
:
53 case MESA_FORMAT_L8A8_UNORM
:
54 case MESA_FORMAT_A8L8_UNORM
:
55 case MESA_FORMAT_YCBCR
:
56 case MESA_FORMAT_YCBCR_REV
:
57 case MESA_FORMAT_Z_UNORM16
:
58 return NV04_SWIZZLED_SURFACE_FORMAT_COLOR_R5G6B5
;
60 case MESA_FORMAT_A8B8G8R8_UNORM
:
61 case MESA_FORMAT_R8G8B8A8_UNORM
:
62 case MESA_FORMAT_B8G8R8X8_UNORM
:
63 case MESA_FORMAT_B8G8R8A8_UNORM
:
64 case MESA_FORMAT_A8R8G8B8_UNORM
:
65 case MESA_FORMAT_Z24_UNORM_S8_UINT
:
66 case MESA_FORMAT_S8_UINT_Z24_UNORM
:
67 case MESA_FORMAT_Z_UNORM32
:
68 return NV04_SWIZZLED_SURFACE_FORMAT_COLOR_A8R8G8B8
;
76 surf2d_format(mesa_format format
)
79 case MESA_FORMAT_A_UNORM8
:
80 case MESA_FORMAT_L_UNORM8
:
81 case MESA_FORMAT_I_UNORM8
:
82 case MESA_FORMAT_B2G3R3_UNORM
:
83 return NV04_CONTEXT_SURFACES_2D_FORMAT_Y8
;
85 case MESA_FORMAT_B5G6R5_UNORM
:
86 case MESA_FORMAT_R5G6B5_UNORM
:
87 case MESA_FORMAT_B4G4R4A4_UNORM
:
88 case MESA_FORMAT_A4R4G4B4_UNORM
:
89 case MESA_FORMAT_B5G5R5A1_UNORM
:
90 case MESA_FORMAT_A1B5G5R5_UNORM
:
91 case MESA_FORMAT_A1R5G5B5_UNORM
:
92 case MESA_FORMAT_L8A8_UNORM
:
93 case MESA_FORMAT_A8L8_UNORM
:
94 case MESA_FORMAT_YCBCR
:
95 case MESA_FORMAT_YCBCR_REV
:
96 case MESA_FORMAT_Z_UNORM16
:
97 return NV04_CONTEXT_SURFACES_2D_FORMAT_R5G6B5
;
99 case MESA_FORMAT_A8B8G8R8_UNORM
:
100 case MESA_FORMAT_R8G8B8A8_UNORM
:
101 case MESA_FORMAT_B8G8R8X8_UNORM
:
102 case MESA_FORMAT_B8G8R8A8_UNORM
:
103 case MESA_FORMAT_A8R8G8B8_UNORM
:
104 case MESA_FORMAT_Z24_UNORM_S8_UINT
:
105 case MESA_FORMAT_S8_UINT_Z24_UNORM
:
106 case MESA_FORMAT_Z_UNORM32
:
107 return NV04_CONTEXT_SURFACES_2D_FORMAT_Y32
;
115 rect_format(mesa_format format
)
118 case MESA_FORMAT_A_UNORM8
:
119 case MESA_FORMAT_L_UNORM8
:
120 case MESA_FORMAT_I_UNORM8
:
121 case MESA_FORMAT_B2G3R3_UNORM
:
122 return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8
;
124 case MESA_FORMAT_B5G6R5_UNORM
:
125 case MESA_FORMAT_R5G6B5_UNORM
:
126 case MESA_FORMAT_B4G4R4A4_UNORM
:
127 case MESA_FORMAT_A4R4G4B4_UNORM
:
128 case MESA_FORMAT_B5G5R5A1_UNORM
:
129 case MESA_FORMAT_A1B5G5R5_UNORM
:
130 case MESA_FORMAT_A1R5G5B5_UNORM
:
131 case MESA_FORMAT_L8A8_UNORM
:
132 case MESA_FORMAT_A8L8_UNORM
:
133 case MESA_FORMAT_YCBCR
:
134 case MESA_FORMAT_YCBCR_REV
:
135 case MESA_FORMAT_Z_UNORM16
:
136 return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A16R5G6B5
;
138 case MESA_FORMAT_A8B8G8R8_UNORM
:
139 case MESA_FORMAT_R8G8B8A8_UNORM
:
140 case MESA_FORMAT_B8G8R8X8_UNORM
:
141 case MESA_FORMAT_B8G8R8A8_UNORM
:
142 case MESA_FORMAT_A8R8G8B8_UNORM
:
143 case MESA_FORMAT_Z24_UNORM_S8_UINT
:
144 case MESA_FORMAT_S8_UINT_Z24_UNORM
:
145 case MESA_FORMAT_Z_UNORM32
:
146 return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8
;
154 sifm_format(mesa_format format
)
157 case MESA_FORMAT_A_UNORM8
:
158 case MESA_FORMAT_L_UNORM8
:
159 case MESA_FORMAT_I_UNORM8
:
160 case MESA_FORMAT_B2G3R3_UNORM
:
161 return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_AY8
;
163 case MESA_FORMAT_B5G6R5_UNORM
:
164 case MESA_FORMAT_R5G6B5_UNORM
:
165 case MESA_FORMAT_B4G4R4A4_UNORM
:
166 case MESA_FORMAT_A4R4G4B4_UNORM
:
167 case MESA_FORMAT_B5G5R5A1_UNORM
:
168 case MESA_FORMAT_A1B5G5R5_UNORM
:
169 case MESA_FORMAT_A1R5G5B5_UNORM
:
170 case MESA_FORMAT_L8A8_UNORM
:
171 case MESA_FORMAT_A8L8_UNORM
:
172 case MESA_FORMAT_YCBCR
:
173 case MESA_FORMAT_YCBCR_REV
:
174 case MESA_FORMAT_Z_UNORM16
:
175 return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_R5G6B5
;
177 case MESA_FORMAT_A8B8G8R8_UNORM
:
178 case MESA_FORMAT_R8G8B8A8_UNORM
:
179 case MESA_FORMAT_B8G8R8X8_UNORM
:
180 case MESA_FORMAT_B8G8R8A8_UNORM
:
181 case MESA_FORMAT_A8R8G8B8_UNORM
:
182 case MESA_FORMAT_Z24_UNORM_S8_UINT
:
183 case MESA_FORMAT_S8_UINT_Z24_UNORM
:
184 case MESA_FORMAT_Z_UNORM32
:
185 return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A8R8G8B8
;
193 nv04_surface_copy_swizzle(struct gl_context
*ctx
,
194 struct nouveau_surface
*dst
,
195 struct nouveau_surface
*src
,
196 int dx
, int dy
, int sx
, int sy
,
199 struct nouveau_pushbuf_refn refs
[] = {
200 { src
->bo
, NOUVEAU_BO_RD
| NOUVEAU_BO_VRAM
| NOUVEAU_BO_GART
},
201 { dst
->bo
, NOUVEAU_BO_WR
| NOUVEAU_BO_VRAM
},
203 struct nouveau_pushbuf
*push
= context_push(ctx
);
204 struct nouveau_hw_state
*hw
= &to_nouveau_context(ctx
)->hw
;
205 struct nouveau_object
*swzsurf
= hw
->swzsurf
;
206 struct nv04_fifo
*fifo
= hw
->chan
->data
;
207 /* Max width & height may not be the same on all HW, but must be POT */
208 const unsigned max_w
= 1024;
209 const unsigned max_h
= 1024;
210 unsigned sub_w
= w
> max_w
? max_w
: w
;
211 unsigned sub_h
= h
> max_h
? max_h
: h
;
214 /* Swizzled surfaces must be POT */
215 assert(_mesa_is_pow_two(dst
->width
) &&
216 _mesa_is_pow_two(dst
->height
));
218 if (context_chipset(ctx
) < 0x10) {
219 BEGIN_NV04(push
, NV01_SUBC(SURF
, OBJECT
), 1);
220 PUSH_DATA (push
, swzsurf
->handle
);
223 for (y
= 0; y
< h
; y
+= sub_h
) {
224 sub_h
= MIN2(sub_h
, h
- y
);
226 for (x
= 0; x
< w
; x
+= sub_w
) {
227 sub_w
= MIN2(sub_w
, w
- x
);
229 if (nouveau_pushbuf_space(push
, 64, 4, 0) ||
230 nouveau_pushbuf_refn (push
, refs
, 2))
233 BEGIN_NV04(push
, NV04_SSWZ(DMA_IMAGE
), 1);
234 PUSH_DATA (push
, fifo
->vram
);
235 BEGIN_NV04(push
, NV04_SSWZ(FORMAT
), 2);
236 PUSH_DATA (push
, swzsurf_format(dst
->format
) |
237 log2i(dst
->width
) << 16 |
238 log2i(dst
->height
) << 24);
239 PUSH_RELOC(push
, dst
->bo
, dst
->offset
, NOUVEAU_BO_LOW
, 0, 0);
241 BEGIN_NV04(push
, NV03_SIFM(DMA_IMAGE
), 1);
242 PUSH_RELOC(push
, src
->bo
, 0, NOUVEAU_BO_OR
, fifo
->vram
, fifo
->gart
);
243 BEGIN_NV04(push
, NV05_SIFM(SURFACE
), 1);
244 PUSH_DATA (push
, swzsurf
->handle
);
246 BEGIN_NV04(push
, NV03_SIFM(COLOR_FORMAT
), 8);
247 PUSH_DATA (push
, sifm_format(src
->format
));
248 PUSH_DATA (push
, NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY
);
249 PUSH_DATA (push
, (y
+ dy
) << 16 | (x
+ dx
));
250 PUSH_DATA (push
, sub_h
<< 16 | sub_w
);
251 PUSH_DATA (push
, (y
+ dy
) << 16 | (x
+ dx
));
252 PUSH_DATA (push
, sub_h
<< 16 | sub_w
);
253 PUSH_DATA (push
, 1 << 20);
254 PUSH_DATA (push
, 1 << 20);
256 BEGIN_NV04(push
, NV03_SIFM(SIZE
), 4);
257 PUSH_DATA (push
, align(sub_h
, 2) << 16 | align(sub_w
, 2));
258 PUSH_DATA (push
, src
->pitch
|
259 NV03_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_CENTER
|
260 NV03_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_POINT_SAMPLE
);
261 PUSH_RELOC(push
, src
->bo
, src
->offset
+ (y
+ sy
) * src
->pitch
+
262 (x
+ sx
) * src
->cpp
, NOUVEAU_BO_LOW
, 0, 0);
267 if (context_chipset(ctx
) < 0x10) {
268 BEGIN_NV04(push
, NV01_SUBC(SURF
, OBJECT
), 1);
269 PUSH_DATA (push
, hw
->surf3d
->handle
);
274 nv04_surface_copy_m2mf(struct gl_context
*ctx
,
275 struct nouveau_surface
*dst
,
276 struct nouveau_surface
*src
,
277 int dx
, int dy
, int sx
, int sy
,
280 struct nouveau_pushbuf_refn refs
[] = {
281 { src
->bo
, NOUVEAU_BO_RD
| NOUVEAU_BO_VRAM
| NOUVEAU_BO_GART
},
282 { dst
->bo
, NOUVEAU_BO_WR
| NOUVEAU_BO_VRAM
| NOUVEAU_BO_GART
},
284 struct nouveau_pushbuf
*push
= context_push(ctx
);
285 struct nouveau_hw_state
*hw
= &to_nouveau_context(ctx
)->hw
;
286 struct nv04_fifo
*fifo
= hw
->chan
->data
;
287 unsigned dst_offset
= dst
->offset
+ dy
* dst
->pitch
+ dx
* dst
->cpp
;
288 unsigned src_offset
= src
->offset
+ sy
* src
->pitch
+ sx
* src
->cpp
;
291 int count
= (h
> 2047) ? 2047 : h
;
293 if (nouveau_pushbuf_space(push
, 16, 4, 0) ||
294 nouveau_pushbuf_refn (push
, refs
, 2))
297 BEGIN_NV04(push
, NV03_M2MF(DMA_BUFFER_IN
), 2);
298 PUSH_RELOC(push
, src
->bo
, 0, NOUVEAU_BO_OR
, fifo
->vram
, fifo
->gart
);
299 PUSH_RELOC(push
, dst
->bo
, 0, NOUVEAU_BO_OR
, fifo
->vram
, fifo
->gart
);
300 BEGIN_NV04(push
, NV03_M2MF(OFFSET_IN
), 8);
301 PUSH_RELOC(push
, src
->bo
, src
->offset
, NOUVEAU_BO_LOW
, 0, 0);
302 PUSH_RELOC(push
, dst
->bo
, dst
->offset
, NOUVEAU_BO_LOW
, 0, 0);
303 PUSH_DATA (push
, src
->pitch
);
304 PUSH_DATA (push
, dst
->pitch
);
305 PUSH_DATA (push
, w
* src
->cpp
);
306 PUSH_DATA (push
, count
);
307 PUSH_DATA (push
, 0x0101);
310 src_offset
+= src
->pitch
* count
;
311 dst_offset
+= dst
->pitch
* count
;
316 typedef unsigned (*get_offset_t
)(struct nouveau_surface
*s
,
317 unsigned x
, unsigned y
);
320 get_linear_offset(struct nouveau_surface
*s
, unsigned x
, unsigned y
)
322 return x
* s
->cpp
+ y
* s
->pitch
;
326 get_swizzled_offset(struct nouveau_surface
*s
, unsigned x
, unsigned y
)
328 unsigned k
= log2i(MIN2(s
->width
, s
->height
));
330 unsigned u
= (x
& 0x001) << 0 |
343 unsigned v
= (y
& 0x001) << 1 |
356 return s
->cpp
* (((u
| v
) & ~(~0 << 2*k
)) |
357 (x
& (~0 << k
)) << k
|
358 (y
& (~0 << k
)) << k
);
362 nv04_surface_copy_cpu(struct gl_context
*ctx
,
363 struct nouveau_surface
*dst
,
364 struct nouveau_surface
*src
,
365 int dx
, int dy
, int sx
, int sy
,
369 get_offset_t get_dst
= (dst
->layout
== SWIZZLED
?
370 get_swizzled_offset
: get_linear_offset
);
371 get_offset_t get_src
= (src
->layout
== SWIZZLED
?
372 get_swizzled_offset
: get_linear_offset
);
375 nouveau_bo_map(dst
->bo
, NOUVEAU_BO_WR
, context_client(ctx
));
376 nouveau_bo_map(src
->bo
, NOUVEAU_BO_RD
, context_client(ctx
));
378 dp
= dst
->bo
->map
+ dst
->offset
;
379 sp
= src
->bo
->map
+ src
->offset
;
381 for (y
= 0; y
< h
; y
++) {
382 for (x
= 0; x
< w
; x
++) {
383 memcpy(dp
+ get_dst(dst
, dx
+ x
, dy
+ y
),
384 sp
+ get_src(src
, sx
+ x
, sy
+ y
), dst
->cpp
);
390 nv04_surface_copy(struct gl_context
*ctx
,
391 struct nouveau_surface
*dst
,
392 struct nouveau_surface
*src
,
393 int dx
, int dy
, int sx
, int sy
,
396 if (_mesa_is_format_compressed(src
->format
)) {
397 sx
= get_format_blocksx(src
->format
, sx
);
398 sy
= get_format_blocksy(src
->format
, sy
);
399 dx
= get_format_blocksx(dst
->format
, dx
);
400 dy
= get_format_blocksy(dst
->format
, dy
);
401 w
= get_format_blocksx(src
->format
, w
);
402 h
= get_format_blocksy(src
->format
, h
);
405 /* Linear texture copy. */
406 if ((src
->layout
== LINEAR
&& dst
->layout
== LINEAR
) ||
407 dst
->width
<= 2 || dst
->height
<= 1) {
408 nv04_surface_copy_m2mf(ctx
, dst
, src
, dx
, dy
, sx
, sy
, w
, h
);
412 /* Swizzle using sifm+swzsurf. */
413 if (src
->layout
== LINEAR
&& dst
->layout
== SWIZZLED
&&
414 dst
->cpp
!= 1 && !(dst
->offset
& 63)) {
415 nv04_surface_copy_swizzle(ctx
, dst
, src
, dx
, dy
, sx
, sy
, w
, h
);
419 /* Fallback to CPU copy. */
420 nv04_surface_copy_cpu(ctx
, dst
, src
, dx
, dy
, sx
, sy
, w
, h
);
424 nv04_surface_fill(struct gl_context
*ctx
,
425 struct nouveau_surface
*dst
,
426 unsigned mask
, unsigned value
,
427 int dx
, int dy
, int w
, int h
)
429 struct nouveau_pushbuf_refn refs
[] = {
430 { dst
->bo
, NOUVEAU_BO_WR
| NOUVEAU_BO_VRAM
| NOUVEAU_BO_GART
},
432 struct nouveau_pushbuf
*push
= context_push(ctx
);
433 struct nouveau_hw_state
*hw
= &to_nouveau_context(ctx
)->hw
;
434 struct nv04_fifo
*fifo
= hw
->chan
->data
;
436 if (nouveau_pushbuf_space(push
, 64, 4, 0) ||
437 nouveau_pushbuf_refn (push
, refs
, 1))
440 BEGIN_NV04(push
, NV04_SF2D(DMA_IMAGE_SOURCE
), 2);
441 PUSH_RELOC(push
, dst
->bo
, 0, NOUVEAU_BO_OR
, fifo
->vram
, fifo
->gart
);
442 PUSH_RELOC(push
, dst
->bo
, 0, NOUVEAU_BO_OR
, fifo
->vram
, fifo
->gart
);
443 BEGIN_NV04(push
, NV04_SF2D(FORMAT
), 4);
444 PUSH_DATA (push
, surf2d_format(dst
->format
));
445 PUSH_DATA (push
, (dst
->pitch
<< 16) | dst
->pitch
);
446 PUSH_RELOC(push
, dst
->bo
, dst
->offset
, NOUVEAU_BO_LOW
, 0, 0);
447 PUSH_RELOC(push
, dst
->bo
, dst
->offset
, NOUVEAU_BO_LOW
, 0, 0);
449 BEGIN_NV04(push
, NV01_PATT(COLOR_FORMAT
), 1);
450 PUSH_DATA (push
, rect_format(dst
->format
));
451 BEGIN_NV04(push
, NV01_PATT(MONOCHROME_COLOR1
), 1);
452 PUSH_DATA (push
, mask
| ~0ll << (8 * dst
->cpp
));
454 BEGIN_NV04(push
, NV04_GDI(COLOR_FORMAT
), 1);
455 PUSH_DATA (push
, rect_format(dst
->format
));
456 BEGIN_NV04(push
, NV04_GDI(COLOR1_A
), 1);
457 PUSH_DATA (push
, value
);
458 BEGIN_NV04(push
, NV04_GDI(UNCLIPPED_RECTANGLE_POINT(0)), 2);
459 PUSH_DATA (push
, (dx
<< 16) | dy
);
460 PUSH_DATA (push
, ( w
<< 16) | h
);
464 nv04_surface_takedown(struct gl_context
*ctx
)
466 struct nouveau_hw_state
*hw
= &to_nouveau_context(ctx
)->hw
;
468 nouveau_object_del(&hw
->swzsurf
);
469 nouveau_object_del(&hw
->sifm
);
470 nouveau_object_del(&hw
->rect
);
471 nouveau_object_del(&hw
->rop
);
472 nouveau_object_del(&hw
->patt
);
473 nouveau_object_del(&hw
->surf2d
);
474 nouveau_object_del(&hw
->m2mf
);
475 nouveau_object_del(&hw
->ntfy
);
479 nv04_surface_init(struct gl_context
*ctx
)
481 struct nouveau_pushbuf
*push
= context_push(ctx
);
482 struct nouveau_hw_state
*hw
= &to_nouveau_context(ctx
)->hw
;
483 struct nouveau_object
*chan
= hw
->chan
;
484 unsigned handle
= 0x88000000, class;
487 /* Notifier object. */
488 ret
= nouveau_object_new(chan
, handle
++, NOUVEAU_NOTIFIER_CLASS
,
489 &(struct nv04_notify
) {
491 }, sizeof(struct nv04_notify
), &hw
->ntfy
);
495 /* Memory to memory format. */
496 ret
= nouveau_object_new(chan
, handle
++, NV03_M2MF_CLASS
,
501 BEGIN_NV04(push
, NV01_SUBC(M2MF
, OBJECT
), 1);
502 PUSH_DATA (push
, hw
->m2mf
->handle
);
503 BEGIN_NV04(push
, NV03_M2MF(DMA_NOTIFY
), 1);
504 PUSH_DATA (push
, hw
->ntfy
->handle
);
506 /* Context surfaces 2D. */
507 if (context_chipset(ctx
) < 0x10)
508 class = NV04_SURFACE_2D_CLASS
;
510 class = NV10_SURFACE_2D_CLASS
;
512 ret
= nouveau_object_new(chan
, handle
++, class, NULL
, 0, &hw
->surf2d
);
516 BEGIN_NV04(push
, NV01_SUBC(SF2D
, OBJECT
), 1);
517 PUSH_DATA (push
, hw
->surf2d
->handle
);
520 ret
= nouveau_object_new(chan
, handle
++, NV03_ROP_CLASS
,
525 BEGIN_NV04(push
, NV01_SUBC(PATT
, OBJECT
), 1);
526 PUSH_DATA (push
, hw
->rop
->handle
);
527 BEGIN_NV04(push
, NV01_ROP(DMA_NOTIFY
), 1);
528 PUSH_DATA (push
, hw
->ntfy
->handle
);
530 BEGIN_NV04(push
, NV01_ROP(ROP
), 1);
531 PUSH_DATA (push
, 0xca); /* DPSDxax in the GDI speech. */
534 ret
= nouveau_object_new(chan
, handle
++, NV04_PATTERN_CLASS
,
539 BEGIN_NV04(push
, NV01_SUBC(PATT
, OBJECT
), 1);
540 PUSH_DATA (push
, hw
->patt
->handle
);
541 BEGIN_NV04(push
, NV01_PATT(DMA_NOTIFY
), 1);
542 PUSH_DATA (push
, hw
->ntfy
->handle
);
544 BEGIN_NV04(push
, NV01_PATT(MONOCHROME_FORMAT
), 3);
545 PUSH_DATA (push
, NV04_IMAGE_PATTERN_MONOCHROME_FORMAT_LE
);
546 PUSH_DATA (push
, NV04_IMAGE_PATTERN_MONOCHROME_SHAPE_8X8
);
547 PUSH_DATA (push
, NV04_IMAGE_PATTERN_PATTERN_SELECT_MONO
);
549 BEGIN_NV04(push
, NV01_PATT(MONOCHROME_COLOR0
), 4);
552 PUSH_DATA (push
, ~0);
553 PUSH_DATA (push
, ~0);
555 /* GDI rectangle text. */
556 ret
= nouveau_object_new(chan
, handle
++, NV04_GDI_CLASS
,
561 BEGIN_NV04(push
, NV01_SUBC(GDI
, OBJECT
), 1);
562 PUSH_DATA (push
, hw
->rect
->handle
);
563 BEGIN_NV04(push
, NV04_GDI(DMA_NOTIFY
), 1);
564 PUSH_DATA (push
, hw
->ntfy
->handle
);
565 BEGIN_NV04(push
, NV04_GDI(SURFACE
), 1);
566 PUSH_DATA (push
, hw
->surf2d
->handle
);
567 BEGIN_NV04(push
, NV04_GDI(ROP
), 1);
568 PUSH_DATA (push
, hw
->rop
->handle
);
569 BEGIN_NV04(push
, NV04_GDI(PATTERN
), 1);
570 PUSH_DATA (push
, hw
->patt
->handle
);
572 BEGIN_NV04(push
, NV04_GDI(OPERATION
), 1);
573 PUSH_DATA (push
, NV04_GDI_RECTANGLE_TEXT_OPERATION_ROP_AND
);
574 BEGIN_NV04(push
, NV04_GDI(MONOCHROME_FORMAT
), 1);
575 PUSH_DATA (push
, NV04_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT_LE
);
577 /* Swizzled surface. */
578 if (context_chipset(ctx
) < 0x20)
579 class = NV04_SURFACE_SWZ_CLASS
;
581 class = NV20_SURFACE_SWZ_CLASS
;
583 ret
= nouveau_object_new(chan
, handle
++, class, NULL
, 0, &hw
->swzsurf
);
587 BEGIN_NV04(push
, NV01_SUBC(SURF
, OBJECT
), 1);
588 PUSH_DATA (push
, hw
->swzsurf
->handle
);
590 /* Scaled image from memory. */
591 if (context_chipset(ctx
) < 0x10)
592 class = NV04_SIFM_CLASS
;
594 class = NV10_SIFM_CLASS
;
596 ret
= nouveau_object_new(chan
, handle
++, class, NULL
, 0, &hw
->sifm
);
600 BEGIN_NV04(push
, NV01_SUBC(SIFM
, OBJECT
), 1);
601 PUSH_DATA (push
, hw
->sifm
->handle
);
603 if (context_chipset(ctx
) >= 0x10) {
604 BEGIN_NV04(push
, NV05_SIFM(COLOR_CONVERSION
), 1);
605 PUSH_DATA (push
, NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_TRUNCATE
);
611 nv04_surface_takedown(ctx
);