src/mesa/drivers/dri/nouveau/nv10_context.c

   1 /*
   2  * Copyright (C) 2009-2010 Francisco Jerez.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining
   6  * a copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sublicense, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the
  14  * next paragraph) shall be included in all copies or substantial
  15  * portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24  *
  25  */
  26
  27 #include "nouveau_driver.h"
  28 #include "nouveau_context.h"
  29 #include "nouveau_fbo.h"
  30 #include "nouveau_util.h"
  31 #include "nouveau_class.h"
  32 #include "nv04_driver.h"
  33 #include "nv10_driver.h"
  34
  35 static const struct dri_extension nv10_extensions[] = {
  36         { "GL_ARB_texture_env_crossbar", NULL },
  37         { "GL_EXT_texture_rectangle",   NULL },
  38         { "GL_ARB_texture_env_combine", NULL },
  39         { "GL_ARB_texture_env_dot3",    NULL },
  40         { NULL,                         NULL }
  41 };
  42
  43 static GLboolean
  44 use_fast_zclear(GLcontext *ctx, GLbitfield buffers)
  45 {
  46         struct nouveau_context *nctx = to_nouveau_context(ctx);
  47         struct gl_framebuffer *fb = ctx->DrawBuffer;
  48
  49         if (buffers & BUFFER_BIT_STENCIL) {
  50                 /*
  51                  * The stencil test is bypassed when fast Z clears are
  52                  * enabled.
  53                  */
  54                 nctx->hierz.clear_blocked = GL_TRUE;
  55                 context_dirty(ctx, ZCLEAR);
  56                 return GL_FALSE;
  57         }
  58
  59         return !nctx->hierz.clear_blocked &&
  60                 fb->_Xmax == fb->Width && fb->_Xmin == 0 &&
  61                 fb->_Ymax == fb->Height && fb->_Ymin == 0;
  62 }
  63
  64 GLboolean
  65 nv10_use_viewport_zclear(GLcontext *ctx)
  66 {
  67         struct nouveau_context *nctx = to_nouveau_context(ctx);
  68         struct gl_framebuffer *fb = ctx->DrawBuffer;
  69
  70         return context_chipset(ctx) < 0x17 &&
  71                 !nctx->hierz.clear_blocked && fb->_DepthBuffer &&
  72                 (_mesa_get_format_bits(fb->_DepthBuffer->Format,
  73                                        GL_DEPTH_BITS) >= 24);
  74 }
  75
  76 float
  77 nv10_transform_depth(GLcontext *ctx, float z)
  78 {
  79         struct nouveau_context *nctx = to_nouveau_context(ctx);
  80
  81         if (nv10_use_viewport_zclear(ctx))
  82                 return 2097152.0 * (z + (nctx->hierz.clear_seq & 7));
  83         else
  84                 return ctx->DrawBuffer->_DepthMaxF * z;
  85 }
  86
  87 static void
  88 nv10_zclear(GLcontext *ctx, GLbitfield *buffers)
  89 {
  90         /*
  91          * Pre-nv17 cards don't have native support for fast Z clears,
  92          * but in some cases we can still "clear" the Z buffer without
  93          * actually blitting to it if we're willing to sacrifice a few
  94          * bits of depth precision.
  95          *
  96          * Each time a clear is requested we modify the viewport
  97          * transform in such a way that the old contents of the depth
  98          * buffer are clamped to the requested clear value when
  99          * they're read by the GPU.
 100          */
 101         struct nouveau_context *nctx = to_nouveau_context(ctx);
 102         struct gl_framebuffer *fb = ctx->DrawBuffer;
 103         struct nouveau_framebuffer *nfb = to_nouveau_framebuffer(fb);
 104         struct nouveau_surface *s = &to_nouveau_renderbuffer(
 105                 fb->_DepthBuffer->Wrapped)->surface;
 106
 107         if (nv10_use_viewport_zclear(ctx)) {
 108                 int x, y, w, h;
 109                 float z = ctx->Depth.Clear;
 110                 uint32_t value = pack_zs_f(s->format, z, 0);
 111
 112                 get_scissors(fb, &x, &y, &w, &h);
 113                 *buffers &= ~BUFFER_BIT_DEPTH;
 114
 115                 if (use_fast_zclear(ctx, *buffers)) {
 116                         if (nfb->hierz.clear_value != value) {
 117                                 /* Don't fast clear if we're changing
 118                                  * the depth value. */
 119                                 nfb->hierz.clear_value = value;
 120
 121                         } else if (z == 0.0) {
 122                                 nctx->hierz.clear_seq++;
 123                                 context_dirty(ctx, ZCLEAR);
 124
 125                                 if ((nctx->hierz.clear_seq & 7) != 0 &&
 126                                     nctx->hierz.clear_seq != 1)
 127                                         /* We didn't wrap around -- no need to
 128                                          * clear the depth buffer for real. */
 129                                         return;
 130
 131                         } else if (z == 1.0) {
 132                                 nctx->hierz.clear_seq--;
 133                                 context_dirty(ctx, ZCLEAR);
 134
 135                                 if ((nctx->hierz.clear_seq & 7) != 7)
 136                                         /* No wrap around */
 137                                         return;
 138                         }
 139                 }
 140
 141                 value = pack_zs_f(s->format,
 142                                   (z + (nctx->hierz.clear_seq & 7)) / 8, 0);
 143                 context_drv(ctx)->surface_fill(ctx, s, ~0, value, x, y, w, h);
 144         }
 145 }
 146
 147 static void
 148 nv17_zclear(GLcontext *ctx, GLbitfield *buffers)
 149 {
 150         struct nouveau_context *nctx = to_nouveau_context(ctx);
 151         struct nouveau_channel *chan = context_chan(ctx);
 152         struct nouveau_grobj *celsius = context_eng3d(ctx);
 153         struct nouveau_framebuffer *nfb = to_nouveau_framebuffer(
 154                 ctx->DrawBuffer);
 155         struct nouveau_surface *s = &to_nouveau_renderbuffer(
 156                 nfb->base._DepthBuffer->Wrapped)->surface;
 157
 158         /* Clear the hierarchical depth buffer */
 159         BEGIN_RING(chan, celsius, NV17TCL_LMA_DEPTH_FILL_VALUE, 1);
 160         OUT_RING(chan, pack_zs_f(s->format, ctx->Depth.Clear, 0));
 161         BEGIN_RING(chan, celsius, NV17TCL_LMA_DEPTH_BUFFER_CLEAR, 1);
 162         OUT_RING(chan, 1);
 163
 164         /* Mark the depth buffer as cleared */
 165         if (use_fast_zclear(ctx, *buffers)) {
 166                 if (nctx->hierz.clear_seq)
 167                         *buffers &= ~BUFFER_BIT_DEPTH;
 168
 169                 nfb->hierz.clear_value =
 170                         pack_zs_f(s->format, ctx->Depth.Clear, 0);
 171                 nctx->hierz.clear_seq++;
 172
 173                 context_dirty(ctx, ZCLEAR);
 174         }
 175 }
 176
 177 static void
 178 nv10_clear(GLcontext *ctx, GLbitfield buffers)
 179 {
 180         nouveau_validate_framebuffer(ctx);
 181
 182         if ((buffers & BUFFER_BIT_DEPTH) && ctx->Depth.Mask) {
 183                 if (context_chipset(ctx) >= 0x17)
 184                         nv17_zclear(ctx, &buffers);
 185                 else
 186                         nv10_zclear(ctx, &buffers);
 187         }
 188
 189         nouveau_clear(ctx, buffers);
 190 }
 191
 192 static void
 193 nv10_hwctx_init(GLcontext *ctx)
 194 {
 195         struct nouveau_channel *chan = context_chan(ctx);
 196         struct nouveau_grobj *celsius = context_eng3d(ctx);
 197         struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw;
 198         int i;
 199
 200         BEGIN_RING(chan, celsius, NV10TCL_DMA_NOTIFY, 1);
 201         OUT_RING(chan, hw->ntfy->handle);
 202
 203         BEGIN_RING(chan, celsius, NV10TCL_DMA_IN_MEMORY0, 3);
 204         OUT_RING(chan, chan->vram->handle);
 205         OUT_RING(chan, chan->gart->handle);
 206         OUT_RING(chan, chan->gart->handle);
 207         BEGIN_RING(chan, celsius, NV10TCL_DMA_IN_MEMORY2, 2);
 208         OUT_RING(chan, chan->vram->handle);
 209         OUT_RING(chan, chan->vram->handle);
 210
 211         BEGIN_RING(chan, celsius, NV10TCL_NOP, 1);
 212         OUT_RING(chan, 0);
 213
 214         BEGIN_RING(chan, celsius, NV10TCL_RT_HORIZ, 2);
 215         OUT_RING(chan, 0);
 216         OUT_RING(chan, 0);
 217
 218         BEGIN_RING(chan, celsius, NV10TCL_VIEWPORT_CLIP_HORIZ(0), 1);
 219         OUT_RING(chan, 0x7ff << 16 | 0x800);
 220         BEGIN_RING(chan, celsius, NV10TCL_VIEWPORT_CLIP_VERT(0), 1);
 221         OUT_RING(chan, 0x7ff << 16 | 0x800);
 222
 223         for (i = 1; i < 8; i++) {
 224                 BEGIN_RING(chan, celsius, NV10TCL_VIEWPORT_CLIP_HORIZ(i), 1);
 225                 OUT_RING(chan, 0);
 226                 BEGIN_RING(chan, celsius, NV10TCL_VIEWPORT_CLIP_VERT(i), 1);
 227                 OUT_RING(chan, 0);
 228         }
 229
 230         BEGIN_RING(chan, celsius, 0x290, 1);
 231         OUT_RING(chan, 0x10 << 16 | 1);
 232         BEGIN_RING(chan, celsius, 0x3f4, 1);
 233         OUT_RING(chan, 0);
 234
 235         BEGIN_RING(chan, celsius, NV10TCL_NOP, 1);
 236         OUT_RING(chan, 0);
 237
 238         if (context_chipset(ctx) >= 0x17) {
 239                 BEGIN_RING(chan, celsius, NV17TCL_DMA_IN_MEMORY4, 2);
 240                 OUT_RING(chan, chan->vram->handle);
 241                 OUT_RING(chan, chan->vram->handle);
 242
 243                 BEGIN_RING(chan, celsius, 0xd84, 1);
 244                 OUT_RING(chan, 0x3);
 245
 246                 BEGIN_RING(chan, celsius, NV17TCL_COLOR_MASK_ENABLE, 1);
 247                 OUT_RING(chan, 1);
 248         }
 249
 250         if (context_chipset(ctx) >= 0x11) {
 251                 BEGIN_RING(chan, celsius, 0x120, 3);
 252                 OUT_RING(chan, 0);
 253                 OUT_RING(chan, 1);
 254                 OUT_RING(chan, 2);
 255
 256                 BEGIN_RING(chan, celsius, NV10TCL_NOP, 1);
 257                 OUT_RING(chan, 0);
 258         }
 259
 260         BEGIN_RING(chan, celsius, NV10TCL_NOP, 1);
 261         OUT_RING(chan, 0);
 262
 263         /* Set state */
 264         BEGIN_RING(chan, celsius, NV10TCL_FOG_ENABLE, 1);
 265         OUT_RING(chan, 0);
 266         BEGIN_RING(chan, celsius, NV10TCL_ALPHA_FUNC_ENABLE, 1);
 267         OUT_RING(chan, 0);
 268         BEGIN_RING(chan, celsius, NV10TCL_ALPHA_FUNC_FUNC, 2);
 269         OUT_RING(chan, 0x207);
 270         OUT_RING(chan, 0);
 271         BEGIN_RING(chan, celsius, NV10TCL_TX_ENABLE(0), 2);
 272         OUT_RING(chan, 0);
 273         OUT_RING(chan, 0);
 274
 275         BEGIN_RING(chan, celsius, NV10TCL_BLEND_FUNC_ENABLE, 1);
 276         OUT_RING(chan, 0);
 277         BEGIN_RING(chan, celsius, NV10TCL_DITHER_ENABLE, 2);
 278         OUT_RING(chan, 1);
 279         OUT_RING(chan, 0);
 280         BEGIN_RING(chan, celsius, NV10TCL_LINE_SMOOTH_ENABLE, 1);
 281         OUT_RING(chan, 0);
 282         BEGIN_RING(chan, celsius, NV10TCL_VERTEX_WEIGHT_ENABLE, 2);
 283         OUT_RING(chan, 0);
 284         OUT_RING(chan, 0);
 285         BEGIN_RING(chan, celsius, NV10TCL_BLEND_FUNC_SRC, 4);
 286         OUT_RING(chan, 1);
 287         OUT_RING(chan, 0);
 288         OUT_RING(chan, 0);
 289         OUT_RING(chan, 0x8006);
 290         BEGIN_RING(chan, celsius, NV10TCL_STENCIL_MASK, 8);
 291         OUT_RING(chan, 0xff);
 292         OUT_RING(chan, 0x207);
 293         OUT_RING(chan, 0);
 294         OUT_RING(chan, 0xff);
 295         OUT_RING(chan, 0x1e00);
 296         OUT_RING(chan, 0x1e00);
 297         OUT_RING(chan, 0x1e00);
 298         OUT_RING(chan, 0x1d01);
 299         BEGIN_RING(chan, celsius, NV10TCL_NORMALIZE_ENABLE, 1);
 300         OUT_RING(chan, 0);
 301         BEGIN_RING(chan, celsius, NV10TCL_FOG_ENABLE, 2);
 302         OUT_RING(chan, 0);
 303         OUT_RING(chan, 0);
 304         BEGIN_RING(chan, celsius, NV10TCL_LIGHT_MODEL, 1);
 305         OUT_RING(chan, 0);
 306         BEGIN_RING(chan, celsius, NV10TCL_SEPARATE_SPECULAR_ENABLE, 1);
 307         OUT_RING(chan, 0);
 308         BEGIN_RING(chan, celsius, NV10TCL_ENABLED_LIGHTS, 1);
 309         OUT_RING(chan, 0);
 310         BEGIN_RING(chan, celsius, NV10TCL_POLYGON_OFFSET_POINT_ENABLE, 3);
 311         OUT_RING(chan, 0);
 312         OUT_RING(chan, 0);
 313         OUT_RING(chan, 0);
 314         BEGIN_RING(chan, celsius, NV10TCL_DEPTH_FUNC, 1);
 315         OUT_RING(chan, 0x201);
 316         BEGIN_RING(chan, celsius, NV10TCL_DEPTH_WRITE_ENABLE, 1);
 317         OUT_RING(chan, 0);
 318         BEGIN_RING(chan, celsius, NV10TCL_DEPTH_TEST_ENABLE, 1);
 319         OUT_RING(chan, 0);
 320         BEGIN_RING(chan, celsius, NV10TCL_POLYGON_OFFSET_FACTOR, 2);
 321         OUT_RING(chan, 0);
 322         OUT_RING(chan, 0);
 323         BEGIN_RING(chan, celsius, NV10TCL_POINT_SIZE, 1);
 324         OUT_RING(chan, 8);
 325         BEGIN_RING(chan, celsius, NV10TCL_POINT_PARAMETERS_ENABLE, 2);
 326         OUT_RING(chan, 0);
 327         OUT_RING(chan, 0);
 328         BEGIN_RING(chan, celsius, NV10TCL_LINE_WIDTH, 1);
 329         OUT_RING(chan, 8);
 330         BEGIN_RING(chan, celsius, NV10TCL_LINE_SMOOTH_ENABLE, 1);
 331         OUT_RING(chan, 0);
 332         BEGIN_RING(chan, celsius, NV10TCL_POLYGON_MODE_FRONT, 2);
 333         OUT_RING(chan, 0x1b02);
 334         OUT_RING(chan, 0x1b02);
 335         BEGIN_RING(chan, celsius, NV10TCL_CULL_FACE, 2);
 336         OUT_RING(chan, 0x405);
 337         OUT_RING(chan, 0x901);
 338         BEGIN_RING(chan, celsius, NV10TCL_POLYGON_SMOOTH_ENABLE, 1);
 339         OUT_RING(chan, 0);
 340         BEGIN_RING(chan, celsius, NV10TCL_CULL_FACE_ENABLE, 1);
 341         OUT_RING(chan, 0);
 342         BEGIN_RING(chan, celsius, NV10TCL_TX_GEN_MODE_S(0), 8);
 343         for (i = 0; i < 8; i++)
 344                 OUT_RING(chan, 0);
 345
 346         BEGIN_RING(chan, celsius, NV10TCL_TX_MATRIX_ENABLE(0), 2);
 347         OUT_RING(chan, 0);
 348         OUT_RING(chan, 0);
 349         BEGIN_RING(chan, celsius, NV10TCL_FOG_EQUATION_CONSTANT, 3);
 350         OUT_RING(chan, 0x3fc00000);     /* -1.50 */
 351         OUT_RING(chan, 0xbdb8aa0a);     /* -0.09 */
 352         OUT_RING(chan, 0);              /*  0.00 */
 353
 354         BEGIN_RING(chan, celsius, NV10TCL_NOP, 1);
 355         OUT_RING(chan, 0);
 356
 357         BEGIN_RING(chan, celsius, NV10TCL_FOG_MODE, 2);
 358         OUT_RING(chan, 0x802);
 359         OUT_RING(chan, 2);
 360         /* for some reason VIEW_MATRIX_ENABLE need to be 6 instead of 4 when
 361          * using texturing, except when using the texture matrix
 362          */
 363         BEGIN_RING(chan, celsius, NV10TCL_VIEW_MATRIX_ENABLE, 1);
 364         OUT_RING(chan, 6);
 365         BEGIN_RING(chan, celsius, NV10TCL_COLOR_MASK, 1);
 366         OUT_RING(chan, 0x01010101);
 367
 368         /* Set vertex component */
 369         BEGIN_RING(chan, celsius, NV10TCL_VERTEX_COL_4F_R, 4);
 370         OUT_RINGf(chan, 1.0);
 371         OUT_RINGf(chan, 0.0);
 372         OUT_RINGf(chan, 0.0);
 373         OUT_RINGf(chan, 1.0);
 374         BEGIN_RING(chan, celsius, NV10TCL_VERTEX_COL2_3F_R, 3);
 375         OUT_RING(chan, 0);
 376         OUT_RING(chan, 0);
 377         OUT_RING(chan, 0);
 378         BEGIN_RING(chan, celsius, NV10TCL_VERTEX_NOR_3F_X, 3);
 379         OUT_RING(chan, 0);
 380         OUT_RING(chan, 0);
 381         OUT_RINGf(chan, 1.0);
 382         BEGIN_RING(chan, celsius, NV10TCL_VERTEX_TX0_4F_S, 4);
 383         OUT_RINGf(chan, 0.0);
 384         OUT_RINGf(chan, 0.0);
 385         OUT_RINGf(chan, 0.0);
 386         OUT_RINGf(chan, 1.0);
 387         BEGIN_RING(chan, celsius, NV10TCL_VERTEX_TX1_4F_S, 4);
 388         OUT_RINGf(chan, 0.0);
 389         OUT_RINGf(chan, 0.0);
 390         OUT_RINGf(chan, 0.0);
 391         OUT_RINGf(chan, 1.0);
 392         BEGIN_RING(chan, celsius, NV10TCL_VERTEX_FOG_1F, 1);
 393         OUT_RINGf(chan, 0.0);
 394         BEGIN_RING(chan, celsius, NV10TCL_EDGEFLAG_ENABLE, 1);
 395         OUT_RING(chan, 1);
 396
 397         BEGIN_RING(chan, celsius, NV10TCL_DEPTH_RANGE_NEAR, 2);
 398         OUT_RINGf(chan, 0.0);
 399         OUT_RINGf(chan, 16777216.0);
 400
 401         FIRE_RING(chan);
 402 }
 403
 404 static void
 405 nv10_context_destroy(GLcontext *ctx)
 406 {
 407         struct nouveau_context *nctx = to_nouveau_context(ctx);
 408
 409         nv04_surface_takedown(ctx);
 410         nv10_render_destroy(ctx);
 411
 412         nouveau_grobj_free(&nctx->hw.eng3d);
 413
 414         nouveau_context_deinit(ctx);
 415         FREE(ctx);
 416 }
 417
 418 static GLcontext *
 419 nv10_context_create(struct nouveau_screen *screen, const GLvisual *visual,
 420                     GLcontext *share_ctx)
 421 {
 422         struct nouveau_context *nctx;
 423         GLcontext *ctx;
 424         unsigned celsius_class;
 425         int ret;
 426
 427         nctx = CALLOC_STRUCT(nouveau_context);
 428         if (!nctx)
 429                 return NULL;
 430
 431         ctx = &nctx->base;
 432
 433         if (!nouveau_context_init(ctx, screen, visual, share_ctx))
 434                 goto fail;
 435
 436         driInitExtensions(ctx, nv10_extensions, GL_FALSE);
 437
 438         /* GL constants. */
 439         ctx->Const.MaxTextureLevels = 12;
 440         ctx->Const.MaxTextureCoordUnits = NV10_TEXTURE_UNITS;
 441         ctx->Const.MaxTextureImageUnits = NV10_TEXTURE_UNITS;
 442         ctx->Const.MaxTextureUnits = NV10_TEXTURE_UNITS;
 443         ctx->Const.MaxTextureMaxAnisotropy = 2;
 444         ctx->Const.MaxTextureLodBias = 15;
 445         ctx->Driver.Clear = nv10_clear;
 446
 447         /* 2D engine. */
 448         ret = nv04_surface_init(ctx);
 449         if (!ret)
 450                 goto fail;
 451
 452         /* 3D engine. */
 453         if (context_chipset(ctx) >= 0x17)
 454                 celsius_class = NV17TCL;
 455         else if (context_chipset(ctx) >= 0x11)
 456                 celsius_class = NV11TCL;
 457         else
 458                 celsius_class = NV10TCL;
 459
 460         ret = nouveau_grobj_alloc(context_chan(ctx), 0xbeef0001, celsius_class,
 461                                   &nctx->hw.eng3d);
 462         if (ret)
 463                 goto fail;
 464
 465         nv10_hwctx_init(ctx);
 466         nv10_render_init(ctx);
 467
 468         return ctx;
 469
 470 fail:
 471         nv10_context_destroy(ctx);
 472         return NULL;
 473 }
 474
 475 const struct nouveau_driver nv10_driver = {
 476         .context_create = nv10_context_create,
 477         .context_destroy = nv10_context_destroy,
 478         .surface_copy = nv04_surface_copy,
 479         .surface_fill = nv04_surface_fill,
 480         .emit = (nouveau_state_func[]) {
 481                 nv10_emit_alpha_func,
 482                 nv10_emit_blend_color,
 483                 nv10_emit_blend_equation,
 484                 nv10_emit_blend_func,
 485                 nv10_emit_clip_plane,
 486                 nv10_emit_clip_plane,
 487                 nv10_emit_clip_plane,
 488                 nv10_emit_clip_plane,
 489                 nv10_emit_clip_plane,
 490                 nv10_emit_clip_plane,
 491                 nv10_emit_color_mask,
 492                 nv10_emit_color_material,
 493                 nv10_emit_cull_face,
 494                 nv10_emit_front_face,
 495                 nv10_emit_depth,
 496                 nv10_emit_dither,
 497                 nv10_emit_frag,
 498                 nv10_emit_framebuffer,
 499                 nv10_emit_fog,
 500                 nv10_emit_light_enable,
 501                 nv10_emit_light_model,
 502                 nv10_emit_light_source,
 503                 nv10_emit_light_source,
 504                 nv10_emit_light_source,
 505                 nv10_emit_light_source,
 506                 nv10_emit_light_source,
 507                 nv10_emit_light_source,
 508                 nv10_emit_light_source,
 509                 nv10_emit_light_source,
 510                 nv10_emit_line_stipple,
 511                 nv10_emit_line_mode,
 512                 nv10_emit_logic_opcode,
 513                 nv10_emit_material_ambient,
 514                 nouveau_emit_nothing,
 515                 nv10_emit_material_diffuse,
 516                 nouveau_emit_nothing,
 517                 nv10_emit_material_specular,
 518                 nouveau_emit_nothing,
 519                 nv10_emit_material_shininess,
 520                 nouveau_emit_nothing,
 521                 nv10_emit_modelview,
 522                 nv10_emit_point_mode,
 523                 nv10_emit_point_parameter,
 524                 nv10_emit_polygon_mode,
 525                 nv10_emit_polygon_offset,
 526                 nv10_emit_polygon_stipple,
 527                 nv10_emit_projection,
 528                 nv10_emit_render_mode,
 529                 nv10_emit_scissor,
 530                 nv10_emit_shade_model,
 531                 nv10_emit_stencil_func,
 532                 nv10_emit_stencil_mask,
 533                 nv10_emit_stencil_op,
 534                 nv10_emit_tex_env,
 535                 nv10_emit_tex_env,
 536                 nouveau_emit_nothing,
 537                 nouveau_emit_nothing,
 538                 nv10_emit_tex_gen,
 539                 nv10_emit_tex_gen,
 540                 nouveau_emit_nothing,
 541                 nouveau_emit_nothing,
 542                 nv10_emit_tex_mat,
 543                 nv10_emit_tex_mat,
 544                 nouveau_emit_nothing,
 545                 nouveau_emit_nothing,
 546                 nv10_emit_tex_obj,
 547                 nv10_emit_tex_obj,
 548                 nouveau_emit_nothing,
 549                 nouveau_emit_nothing,
 550                 nv10_emit_viewport,
 551                 nv10_emit_zclear
 552         },
 553         .num_emit = NUM_NV10_STATE,
 554 };