2 * Copyright (C) 2009 Francisco Jerez.
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 #include "nouveau_driver.h"
28 #include "nouveau_context.h"
29 #include "nouveau_gldefs.h"
30 #include "nouveau_texture.h"
31 #include "nouveau_class.h"
32 #include "nouveau_util.h"
33 #include "nv10_driver.h"
35 #define TX_GEN_MODE(i, j) (NV10TCL_TX_GEN_MODE_S(i) + 4 * (j))
36 #define TX_GEN_COEFF(i, j) (NV10TCL_TX_GEN_COEFF_S_A(i) + 16 * (j))
37 #define TX_MATRIX(i) (NV10TCL_TX0_MATRIX(0) + 64 * (i))
40 nv10_emit_tex_gen(GLcontext
*ctx
, int emit
)
42 const int i
= emit
- NOUVEAU_STATE_TEX_GEN0
;
43 struct nouveau_context
*nctx
= to_nouveau_context(ctx
);
44 struct nouveau_channel
*chan
= context_chan(ctx
);
45 struct nouveau_grobj
*celsius
= context_eng3d(ctx
);
46 struct gl_texture_unit
*unit
= &ctx
->Texture
.Unit
[i
];
49 for (j
= 0; j
< 4; j
++) {
50 if (nctx
->fallback
== HWTNL
&& (unit
->TexGenEnabled
& 1 << j
)) {
51 struct gl_texgen
*coord
= get_texgen_coord(unit
, j
);
52 float *k
= get_texgen_coeff(coord
);
55 BEGIN_RING(chan
, celsius
,
56 TX_GEN_COEFF(i
, j
), 4);
57 OUT_RINGf(chan
, k
[0]);
58 OUT_RINGf(chan
, k
[1]);
59 OUT_RINGf(chan
, k
[2]);
60 OUT_RINGf(chan
, k
[3]);
63 BEGIN_RING(chan
, celsius
, TX_GEN_MODE(i
, j
), 1);
64 OUT_RING(chan
, nvgl_texgen_mode(coord
->Mode
));
67 BEGIN_RING(chan
, celsius
, TX_GEN_MODE(i
, j
), 1);
72 context_dirty_i(ctx
, TEX_MAT
, i
);
76 nv10_emit_tex_mat(GLcontext
*ctx
, int emit
)
78 const int i
= emit
- NOUVEAU_STATE_TEX_MAT0
;
79 struct nouveau_context
*nctx
= to_nouveau_context(ctx
);
80 struct nouveau_channel
*chan
= context_chan(ctx
);
81 struct nouveau_grobj
*celsius
= context_eng3d(ctx
);
83 if (nctx
->fallback
== HWTNL
&&
84 ((ctx
->Texture
._TexMatEnabled
& 1 << i
) ||
85 ctx
->Texture
.Unit
[i
]._GenFlags
)) {
86 BEGIN_RING(chan
, celsius
, NV10TCL_TX_MATRIX_ENABLE(i
), 1);
89 BEGIN_RING(chan
, celsius
, TX_MATRIX(i
), 16);
90 OUT_RINGm(chan
, ctx
->TextureMatrixStack
[i
].Top
->m
);
93 BEGIN_RING(chan
, celsius
, NV10TCL_TX_MATRIX_ENABLE(i
), 1);
99 get_tex_format_pot(struct gl_texture_image
*ti
)
101 switch (ti
->TexFormat
) {
102 case MESA_FORMAT_ARGB8888
:
103 return NV10TCL_TX_FORMAT_FORMAT_A8R8G8B8
;
105 case MESA_FORMAT_XRGB8888
:
106 return NV10TCL_TX_FORMAT_FORMAT_X8R8G8B8
;
108 case MESA_FORMAT_ARGB1555
:
109 return NV10TCL_TX_FORMAT_FORMAT_A1R5G5B5
;
111 case MESA_FORMAT_ARGB4444
:
112 return NV10TCL_TX_FORMAT_FORMAT_A4R4G4B4
;
114 case MESA_FORMAT_RGB565
:
115 return NV10TCL_TX_FORMAT_FORMAT_R5G6B5
;
119 return NV10TCL_TX_FORMAT_FORMAT_A8
;
122 return NV10TCL_TX_FORMAT_FORMAT_L8
;
124 case MESA_FORMAT_CI8
:
125 return NV10TCL_TX_FORMAT_FORMAT_INDEX8
;
133 get_tex_format_rect(struct gl_texture_image
*ti
)
135 switch (ti
->TexFormat
) {
136 case MESA_FORMAT_ARGB1555
:
137 return NV10TCL_TX_FORMAT_FORMAT_A1R5G5B5_RECT
;
139 case MESA_FORMAT_RGB565
:
140 return NV10TCL_TX_FORMAT_FORMAT_R5G6B5_RECT
;
142 case MESA_FORMAT_ARGB8888
:
143 case MESA_FORMAT_XRGB8888
:
144 return NV10TCL_TX_FORMAT_FORMAT_A8R8G8B8_RECT
;
149 return NV10TCL_TX_FORMAT_FORMAT_A8_RECT
;
157 nv10_emit_tex_obj(GLcontext
*ctx
, int emit
)
159 const int i
= emit
- NOUVEAU_STATE_TEX_OBJ0
;
160 struct nouveau_channel
*chan
= context_chan(ctx
);
161 struct nouveau_grobj
*celsius
= context_eng3d(ctx
);
162 struct nouveau_bo_context
*bctx
= context_bctx_i(ctx
, TEXTURE
, i
);
163 const int bo_flags
= NOUVEAU_BO_RD
| NOUVEAU_BO_GART
| NOUVEAU_BO_VRAM
;
164 struct gl_texture_object
*t
;
165 struct nouveau_surface
*s
;
166 struct gl_texture_image
*ti
;
167 uint32_t tx_format
, tx_filter
, tx_enable
;
169 if (!ctx
->Texture
.Unit
[i
]._ReallyEnabled
) {
170 BEGIN_RING(chan
, celsius
, NV10TCL_TX_ENABLE(i
), 1);
175 t
= ctx
->Texture
.Unit
[i
]._Current
;
176 s
= &to_nouveau_texture(t
)->surfaces
[t
->BaseLevel
];
177 ti
= t
->Image
[0][t
->BaseLevel
];
179 if (!nouveau_texture_validate(ctx
, t
))
182 /* Recompute the texturing registers. */
183 tx_format
= nvgl_wrap_mode(t
->WrapT
) << 28
184 | nvgl_wrap_mode(t
->WrapS
) << 24
185 | ti
->HeightLog2
<< 20
186 | ti
->WidthLog2
<< 16
189 tx_filter
= nvgl_filter_mode(t
->MagFilter
) << 28
190 | nvgl_filter_mode(t
->MinFilter
) << 24;
192 tx_enable
= NV10TCL_TX_ENABLE_ENABLE
193 | log2i(t
->MaxAnisotropy
) << 4;
195 if (t
->Target
== GL_TEXTURE_RECTANGLE
) {
196 BEGIN_RING(chan
, celsius
, NV10TCL_TX_NPOT_PITCH(i
), 1);
197 OUT_RING(chan
, s
->pitch
<< 16);
198 BEGIN_RING(chan
, celsius
, NV10TCL_TX_NPOT_SIZE(i
), 1);
199 OUT_RING(chan
, align(s
->width
, 2) << 16 | s
->height
);
201 tx_format
|= get_tex_format_rect(ti
);
203 tx_format
|= get_tex_format_pot(ti
);
206 if (t
->MinFilter
!= GL_NEAREST
&&
207 t
->MinFilter
!= GL_LINEAR
) {
208 int lod_min
= t
->MinLod
;
209 int lod_max
= MIN2(t
->MaxLod
, t
->_MaxLambda
);
210 int lod_bias
= t
->LodBias
211 + ctx
->Texture
.Unit
[i
].LodBias
;
213 lod_max
= CLAMP(lod_max
, 0, 15);
214 lod_min
= CLAMP(lod_min
, 0, 15);
215 lod_bias
= CLAMP(lod_bias
, 0, 15);
217 tx_format
|= NV10TCL_TX_FORMAT_MIPMAP
;
218 tx_filter
|= lod_bias
<< 8;
219 tx_enable
|= lod_min
<< 26
223 /* Write it to the hardware. */
224 nouveau_bo_mark(bctx
, celsius
, NV10TCL_TX_FORMAT(i
),
226 NV10TCL_TX_FORMAT_DMA0
,
227 NV10TCL_TX_FORMAT_DMA1
,
228 bo_flags
| NOUVEAU_BO_OR
);
230 nouveau_bo_markl(bctx
, celsius
, NV10TCL_TX_OFFSET(i
),
233 BEGIN_RING(chan
, celsius
, NV10TCL_TX_FILTER(i
), 1);
234 OUT_RING(chan
, tx_filter
);
236 BEGIN_RING(chan
, celsius
, NV10TCL_TX_ENABLE(i
), 1);
237 OUT_RING(chan
, tx_enable
);