2 * Copyright (C) 2009 Francisco Jerez.
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 #include "nouveau_driver.h"
28 #include "nouveau_context.h"
29 #include "nouveau_gldefs.h"
30 #include "nouveau_texture.h"
31 #include "nv10_3d.xml.h"
32 #include "nouveau_util.h"
33 #include "nv10_driver.h"
34 #include "main/samplerobj.h"
37 nv10_emit_tex_gen(struct gl_context
*ctx
, int emit
)
39 const int i
= emit
- NOUVEAU_STATE_TEX_GEN0
;
40 struct nouveau_context
*nctx
= to_nouveau_context(ctx
);
41 struct nouveau_pushbuf
*push
= context_push(ctx
);
42 struct gl_fixedfunc_texture_unit
*unit
=
43 &ctx
->Texture
.FixedFuncUnit
[i
];
46 for (j
= 0; j
< 4; j
++) {
47 if (nctx
->fallback
== HWTNL
&& (unit
->TexGenEnabled
& 1 << j
)) {
48 struct gl_texgen
*coord
= get_texgen_coord(unit
, j
);
49 float *k
= get_texgen_coeff(coord
);
52 BEGIN_NV04(push
, NV10_3D(TEX_GEN_COEFF(i
, j
)), 4);
53 PUSH_DATAp(push
, k
, 4);
56 BEGIN_NV04(push
, NV10_3D(TEX_GEN_MODE(i
,j
)), 1);
57 PUSH_DATA (push
, nvgl_texgen_mode(coord
->Mode
));
60 BEGIN_NV04(push
, NV10_3D(TEX_GEN_MODE(i
,j
)), 1);
65 context_dirty_i(ctx
, TEX_MAT
, i
);
69 nv10_emit_tex_mat(struct gl_context
*ctx
, int emit
)
71 const int i
= emit
- NOUVEAU_STATE_TEX_MAT0
;
72 struct nouveau_context
*nctx
= to_nouveau_context(ctx
);
73 struct nouveau_pushbuf
*push
= context_push(ctx
);
75 if (nctx
->fallback
== HWTNL
&&
76 ((ctx
->Texture
._TexMatEnabled
& 1 << i
) ||
77 ctx
->Texture
.FixedFuncUnit
[i
]._GenFlags
)) {
78 BEGIN_NV04(push
, NV10_3D(TEX_MATRIX_ENABLE(i
)), 1);
81 BEGIN_NV04(push
, NV10_3D(TEX_MATRIX(i
, 0)), 16);
82 PUSH_DATAm(push
, ctx
->TextureMatrixStack
[i
].Top
->m
);
85 BEGIN_NV04(push
, NV10_3D(TEX_MATRIX_ENABLE(i
)), 1);
91 get_tex_format_pot(struct gl_texture_image
*ti
)
93 switch (ti
->TexFormat
) {
94 case MESA_FORMAT_B8G8R8A8_UNORM
:
95 return NV10_3D_TEX_FORMAT_FORMAT_A8R8G8B8
;
97 case MESA_FORMAT_B8G8R8X8_UNORM
:
98 return NV10_3D_TEX_FORMAT_FORMAT_X8R8G8B8
;
100 case MESA_FORMAT_B5G5R5A1_UNORM
:
101 return NV10_3D_TEX_FORMAT_FORMAT_A1R5G5B5
;
103 case MESA_FORMAT_B4G4R4A4_UNORM
:
104 return NV10_3D_TEX_FORMAT_FORMAT_A4R4G4B4
;
106 case MESA_FORMAT_B5G6R5_UNORM
:
107 return NV10_3D_TEX_FORMAT_FORMAT_R5G6B5
;
109 case MESA_FORMAT_A_UNORM8
:
110 case MESA_FORMAT_I_UNORM8
:
111 return NV10_3D_TEX_FORMAT_FORMAT_I8
;
113 case MESA_FORMAT_L_UNORM8
:
114 return NV10_3D_TEX_FORMAT_FORMAT_L8
;
116 case MESA_FORMAT_RGB_DXT1
:
117 case MESA_FORMAT_RGBA_DXT1
:
118 return NV10_3D_TEX_FORMAT_FORMAT_DXT1
;
120 case MESA_FORMAT_RGBA_DXT3
:
121 return NV10_3D_TEX_FORMAT_FORMAT_DXT3
;
123 case MESA_FORMAT_RGBA_DXT5
:
124 return NV10_3D_TEX_FORMAT_FORMAT_DXT5
;
132 get_tex_format_rect(struct gl_texture_image
*ti
)
134 switch (ti
->TexFormat
) {
135 case MESA_FORMAT_B5G5R5A1_UNORM
:
136 return NV10_3D_TEX_FORMAT_FORMAT_A1R5G5B5_RECT
;
138 case MESA_FORMAT_B5G6R5_UNORM
:
139 return NV10_3D_TEX_FORMAT_FORMAT_R5G6B5_RECT
;
141 case MESA_FORMAT_B8G8R8A8_UNORM
:
142 case MESA_FORMAT_B8G8R8X8_UNORM
:
143 return NV10_3D_TEX_FORMAT_FORMAT_A8R8G8B8_RECT
;
145 case MESA_FORMAT_A_UNORM8
:
146 case MESA_FORMAT_L_UNORM8
:
147 case MESA_FORMAT_I_UNORM8
:
148 return NV10_3D_TEX_FORMAT_FORMAT_I8_RECT
;
156 nv10_emit_tex_obj(struct gl_context
*ctx
, int emit
)
158 const int i
= emit
- NOUVEAU_STATE_TEX_OBJ0
;
159 struct nouveau_pushbuf
*push
= context_push(ctx
);
160 const int bo_flags
= NOUVEAU_BO_RD
| NOUVEAU_BO_GART
| NOUVEAU_BO_VRAM
;
161 struct gl_texture_object
*t
;
162 struct nouveau_surface
*s
;
163 struct gl_texture_image
*ti
;
164 const struct gl_sampler_object
*sa
;
165 uint32_t tx_format
, tx_filter
, tx_enable
;
167 PUSH_RESET(push
, BUFCTX_TEX(i
));
169 if (!ctx
->Texture
.Unit
[i
]._Current
) {
170 BEGIN_NV04(push
, NV10_3D(TEX_ENABLE(i
)), 1);
175 t
= ctx
->Texture
.Unit
[i
]._Current
;
176 s
= &to_nouveau_texture(t
)->surfaces
[t
->BaseLevel
];
177 ti
= t
->Image
[0][t
->BaseLevel
];
178 sa
= _mesa_get_samplerobj(ctx
, i
);
180 if (!nouveau_texture_validate(ctx
, t
))
183 /* Recompute the texturing registers. */
184 tx_format
= nvgl_wrap_mode(sa
->WrapT
) << 28
185 | nvgl_wrap_mode(sa
->WrapS
) << 24
186 | ti
->HeightLog2
<< 20
187 | ti
->WidthLog2
<< 16
190 tx_filter
= nvgl_filter_mode(sa
->MagFilter
) << 28
191 | nvgl_filter_mode(sa
->MinFilter
) << 24;
193 tx_enable
= NV10_3D_TEX_ENABLE_ENABLE
194 | log2i(sa
->MaxAnisotropy
) << 4;
196 if (t
->Target
== GL_TEXTURE_RECTANGLE
) {
197 BEGIN_NV04(push
, NV10_3D(TEX_NPOT_PITCH(i
)), 1);
198 PUSH_DATA (push
, s
->pitch
<< 16);
199 BEGIN_NV04(push
, NV10_3D(TEX_NPOT_SIZE(i
)), 1);
200 PUSH_DATA (push
, align(s
->width
, 2) << 16 | s
->height
);
202 tx_format
|= get_tex_format_rect(ti
);
204 tx_format
|= get_tex_format_pot(ti
);
207 if (sa
->MinFilter
!= GL_NEAREST
&&
208 sa
->MinFilter
!= GL_LINEAR
) {
209 int lod_min
= sa
->MinLod
;
210 int lod_max
= MIN2(sa
->MaxLod
, t
->_MaxLambda
);
211 int lod_bias
= sa
->LodBias
212 + ctx
->Texture
.Unit
[i
].LodBias
;
214 lod_max
= CLAMP(lod_max
, 0, 15);
215 lod_min
= CLAMP(lod_min
, 0, 15);
216 lod_bias
= CLAMP(lod_bias
, 0, 15);
218 tx_format
|= NV10_3D_TEX_FORMAT_MIPMAP
;
219 tx_filter
|= lod_bias
<< 8;
220 tx_enable
|= lod_min
<< 26
224 /* Write it to the hardware. */
225 BEGIN_NV04(push
, NV10_3D(TEX_FORMAT(i
)), 1);
226 PUSH_MTHD (push
, NV10_3D(TEX_FORMAT(i
)), BUFCTX_TEX(i
),
227 s
->bo
, tx_format
, bo_flags
| NOUVEAU_BO_OR
,
228 NV10_3D_TEX_FORMAT_DMA0
,
229 NV10_3D_TEX_FORMAT_DMA1
);
231 BEGIN_NV04(push
, NV10_3D(TEX_OFFSET(i
)), 1);
232 PUSH_MTHDl(push
, NV10_3D(TEX_OFFSET(i
)), BUFCTX_TEX(i
),
233 s
->bo
, s
->offset
, bo_flags
);
235 BEGIN_NV04(push
, NV10_3D(TEX_FILTER(i
)), 1);
236 PUSH_DATA (push
, tx_filter
);
238 BEGIN_NV04(push
, NV10_3D(TEX_ENABLE(i
)), 1);
239 PUSH_DATA (push
, tx_enable
);