Merge branch 'lp-offset-twoside'
[mesa.git] / src / mesa / drivers / dri / nouveau / nv20_context.c
1 /*
2 * Copyright (C) 2009-2010 Francisco Jerez.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 *
25 */
26
27 #include "nouveau_driver.h"
28 #include "nouveau_context.h"
29 #include "nouveau_fbo.h"
30 #include "nouveau_util.h"
31 #include "nv_object.xml.h"
32 #include "nv20_3d.xml.h"
33 #include "nv04_driver.h"
34 #include "nv10_driver.h"
35 #include "nv20_driver.h"
36
37 static const struct dri_extension nv20_extensions[] = {
38 { "GL_ARB_texture_env_crossbar", NULL },
39 { "GL_EXT_texture_rectangle", NULL },
40 { "GL_ARB_texture_env_combine", NULL },
41 { "GL_ARB_texture_env_dot3", NULL },
42 { NULL, NULL }
43 };
44
45 static void
46 nv20_clear(struct gl_context *ctx, GLbitfield buffers)
47 {
48 struct nouveau_channel *chan = context_chan(ctx);
49 struct nouveau_grobj *kelvin = context_eng3d(ctx);
50 struct gl_framebuffer *fb = ctx->DrawBuffer;
51 uint32_t clear = 0;
52
53 nouveau_validate_framebuffer(ctx);
54
55 if (buffers & BUFFER_BITS_COLOR) {
56 struct nouveau_surface *s = &to_nouveau_renderbuffer(
57 fb->_ColorDrawBuffers[0])->surface;
58
59 if (ctx->Color.ColorMask[0][RCOMP])
60 clear |= NV20_3D_CLEAR_BUFFERS_COLOR_R;
61 if (ctx->Color.ColorMask[0][GCOMP])
62 clear |= NV20_3D_CLEAR_BUFFERS_COLOR_G;
63 if (ctx->Color.ColorMask[0][BCOMP])
64 clear |= NV20_3D_CLEAR_BUFFERS_COLOR_B;
65 if (ctx->Color.ColorMask[0][ACOMP])
66 clear |= NV20_3D_CLEAR_BUFFERS_COLOR_A;
67
68 BEGIN_RING(chan, kelvin, NV20_3D_CLEAR_VALUE, 1);
69 OUT_RING(chan, pack_rgba_f(s->format, ctx->Color.ClearColor));
70
71 buffers &= ~BUFFER_BITS_COLOR;
72 }
73
74 if (buffers & (BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL)) {
75 struct nouveau_surface *s = &to_nouveau_renderbuffer(
76 fb->_DepthBuffer->Wrapped)->surface;
77
78 if (buffers & BUFFER_BIT_DEPTH && ctx->Depth.Mask)
79 clear |= NV20_3D_CLEAR_BUFFERS_DEPTH;
80 if (buffers & BUFFER_BIT_STENCIL && ctx->Stencil.WriteMask[0])
81 clear |= NV20_3D_CLEAR_BUFFERS_STENCIL;
82
83 BEGIN_RING(chan, kelvin, NV20_3D_CLEAR_DEPTH_VALUE, 1);
84 OUT_RING(chan, pack_zs_f(s->format, ctx->Depth.Clear,
85 ctx->Stencil.Clear));
86
87 buffers &= ~(BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL);
88 }
89
90 BEGIN_RING(chan, kelvin, NV20_3D_CLEAR_BUFFERS, 1);
91 OUT_RING(chan, clear);
92
93 nouveau_clear(ctx, buffers);
94 }
95
96 static void
97 nv20_hwctx_init(struct gl_context *ctx)
98 {
99 struct nouveau_channel *chan = context_chan(ctx);
100 struct nouveau_grobj *kelvin = context_eng3d(ctx);
101 struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw;
102 int i;
103
104 BEGIN_RING(chan, kelvin, NV20_3D_DMA_NOTIFY, 1);
105 OUT_RING (chan, hw->ntfy->handle);
106 BEGIN_RING(chan, kelvin, NV20_3D_DMA_TEXTURE0, 2);
107 OUT_RING (chan, chan->vram->handle);
108 OUT_RING (chan, chan->gart->handle);
109 BEGIN_RING(chan, kelvin, NV20_3D_DMA_COLOR, 2);
110 OUT_RING (chan, chan->vram->handle);
111 OUT_RING (chan, chan->vram->handle);
112 BEGIN_RING(chan, kelvin, NV20_3D_DMA_VTXBUF0, 2);
113 OUT_RING(chan, chan->vram->handle);
114 OUT_RING(chan, chan->gart->handle);
115
116 BEGIN_RING(chan, kelvin, NV20_3D_DMA_QUERY, 1);
117 OUT_RING (chan, 0);
118
119 BEGIN_RING(chan, kelvin, NV20_3D_RT_HORIZ, 2);
120 OUT_RING (chan, 0);
121 OUT_RING (chan, 0);
122
123 BEGIN_RING(chan, kelvin, NV20_3D_VIEWPORT_CLIP_HORIZ(0), 1);
124 OUT_RING (chan, 0xfff << 16 | 0x0);
125 BEGIN_RING(chan, kelvin, NV20_3D_VIEWPORT_CLIP_VERT(0), 1);
126 OUT_RING (chan, 0xfff << 16 | 0x0);
127
128 for (i = 1; i < NV20_3D_VIEWPORT_CLIP_HORIZ__LEN; i++) {
129 BEGIN_RING(chan, kelvin, NV20_3D_VIEWPORT_CLIP_HORIZ(i), 1);
130 OUT_RING (chan, 0);
131 BEGIN_RING(chan, kelvin, NV20_3D_VIEWPORT_CLIP_VERT(i), 1);
132 OUT_RING (chan, 0);
133 }
134
135 BEGIN_RING(chan, kelvin, NV20_3D_VIEWPORT_CLIP_MODE, 1);
136 OUT_RING (chan, 0);
137
138 BEGIN_RING(chan, kelvin, 0x17e0, 3);
139 OUT_RINGf (chan, 0.0);
140 OUT_RINGf (chan, 0.0);
141 OUT_RINGf (chan, 1.0);
142
143 if (context_chipset(ctx) >= 0x25) {
144 BEGIN_RING(chan, kelvin, NV20_3D_TEX_RCOMP, 1);
145 OUT_RING (chan, NV20_3D_TEX_RCOMP_LEQUAL | 0xdb0);
146 } else {
147 BEGIN_RING(chan, kelvin, 0x1e68, 1);
148 OUT_RING (chan, 0x4b800000); /* 16777216.000000 */
149 BEGIN_RING(chan, kelvin, NV20_3D_TEX_RCOMP, 1);
150 OUT_RING (chan, NV20_3D_TEX_RCOMP_LEQUAL);
151 }
152
153 BEGIN_RING(chan, kelvin, 0x290, 1);
154 OUT_RING (chan, 0x10 << 16 | 1);
155 BEGIN_RING(chan, kelvin, 0x9fc, 1);
156 OUT_RING (chan, 0);
157 BEGIN_RING(chan, kelvin, 0x1d80, 1);
158 OUT_RING (chan, 1);
159 BEGIN_RING(chan, kelvin, 0x9f8, 1);
160 OUT_RING (chan, 4);
161 BEGIN_RING(chan, kelvin, 0x17ec, 3);
162 OUT_RINGf (chan, 0.0);
163 OUT_RINGf (chan, 1.0);
164 OUT_RINGf (chan, 0.0);
165
166 if (context_chipset(ctx) >= 0x25) {
167 BEGIN_RING(chan, kelvin, 0x1d88, 1);
168 OUT_RING (chan, 3);
169
170 BEGIN_RING(chan, kelvin, NV25_3D_DMA_HIERZ, 1);
171 OUT_RING (chan, chan->vram->handle);
172 BEGIN_RING(chan, kelvin, NV25_3D_UNK01AC, 1);
173 OUT_RING (chan, chan->vram->handle);
174 }
175
176 BEGIN_RING(chan, kelvin, NV20_3D_DMA_FENCE, 1);
177 OUT_RING (chan, 0);
178
179 BEGIN_RING(chan, kelvin, 0x1e98, 1);
180 OUT_RING (chan, 0);
181
182 BEGIN_RING(chan, kelvin, NV01_GRAPH_NOTIFY, 1);
183 OUT_RING (chan, 0);
184
185 BEGIN_RING(chan, kelvin, 0x120, 3);
186 OUT_RING (chan, 0);
187 OUT_RING (chan, 1);
188 OUT_RING (chan, 2);
189
190 if (context_chipset(ctx) >= 0x25) {
191 BEGIN_RING(chan, kelvin, 0x1da4, 1);
192 OUT_RING (chan, 0);
193 }
194
195 BEGIN_RING(chan, kelvin, NV20_3D_RT_HORIZ, 2);
196 OUT_RING (chan, 0 << 16 | 0);
197 OUT_RING (chan, 0 << 16 | 0);
198
199 BEGIN_RING(chan, kelvin, NV20_3D_ALPHA_FUNC_ENABLE, 1);
200 OUT_RING (chan, 0);
201 BEGIN_RING(chan, kelvin, NV20_3D_ALPHA_FUNC_FUNC, 2);
202 OUT_RING (chan, NV20_3D_ALPHA_FUNC_FUNC_ALWAYS);
203 OUT_RING (chan, 0);
204
205 for (i = 0; i < NV20_3D_TEX__LEN; i++) {
206 BEGIN_RING(chan, kelvin, NV20_3D_TEX_ENABLE(i), 1);
207 OUT_RING (chan, 0);
208 }
209
210 BEGIN_RING(chan, kelvin, NV20_3D_TEX_SHADER_OP, 1);
211 OUT_RING (chan, 0);
212 BEGIN_RING(chan, kelvin, NV20_3D_TEX_SHADER_CULL_MODE, 1);
213 OUT_RING (chan, 0);
214
215 BEGIN_RING(chan, kelvin, NV20_3D_RC_IN_ALPHA(0), 4);
216 OUT_RING (chan, 0x30d410d0);
217 OUT_RING (chan, 0);
218 OUT_RING (chan, 0);
219 OUT_RING (chan, 0);
220 BEGIN_RING(chan, kelvin, NV20_3D_RC_OUT_RGB(0), 4);
221 OUT_RING (chan, 0x00000c00);
222 OUT_RING (chan, 0);
223 OUT_RING (chan, 0);
224 OUT_RING (chan, 0);
225 BEGIN_RING(chan, kelvin, NV20_3D_RC_ENABLE, 1);
226 OUT_RING (chan, 0x00011101);
227 BEGIN_RING(chan, kelvin, NV20_3D_RC_FINAL0, 2);
228 OUT_RING (chan, 0x130e0300);
229 OUT_RING (chan, 0x0c091c80);
230 BEGIN_RING(chan, kelvin, NV20_3D_RC_OUT_ALPHA(0), 4);
231 OUT_RING (chan, 0x00000c00);
232 OUT_RING (chan, 0);
233 OUT_RING (chan, 0);
234 OUT_RING (chan, 0);
235 BEGIN_RING(chan, kelvin, NV20_3D_RC_IN_RGB(0), 4);
236 OUT_RING (chan, 0x20c400c0);
237 OUT_RING (chan, 0);
238 OUT_RING (chan, 0);
239 OUT_RING (chan, 0);
240 BEGIN_RING(chan, kelvin, NV20_3D_RC_COLOR0, 2);
241 OUT_RING (chan, 0);
242 OUT_RING (chan, 0);
243 BEGIN_RING(chan, kelvin, NV20_3D_RC_CONSTANT_COLOR0(0), 4);
244 OUT_RING (chan, 0x035125a0);
245 OUT_RING (chan, 0);
246 OUT_RING (chan, 0x40002000);
247 OUT_RING (chan, 0);
248
249 BEGIN_RING(chan, kelvin, NV20_3D_MULTISAMPLE_CONTROL, 1);
250 OUT_RING (chan, 0xffff0000);
251 BEGIN_RING(chan, kelvin, NV20_3D_BLEND_FUNC_ENABLE, 1);
252 OUT_RING (chan, 0);
253 BEGIN_RING(chan, kelvin, NV20_3D_DITHER_ENABLE, 1);
254 OUT_RING (chan, 0);
255 BEGIN_RING(chan, kelvin, NV20_3D_STENCIL_ENABLE, 1);
256 OUT_RING (chan, 0);
257 BEGIN_RING(chan, kelvin, NV20_3D_BLEND_FUNC_SRC, 4);
258 OUT_RING (chan, NV20_3D_BLEND_FUNC_SRC_ONE);
259 OUT_RING (chan, NV20_3D_BLEND_FUNC_DST_ZERO);
260 OUT_RING (chan, 0);
261 OUT_RING (chan, NV20_3D_BLEND_EQUATION_FUNC_ADD);
262 BEGIN_RING(chan, kelvin, NV20_3D_STENCIL_MASK, 7);
263 OUT_RING (chan, 0xff);
264 OUT_RING (chan, NV20_3D_STENCIL_FUNC_FUNC_ALWAYS);
265 OUT_RING (chan, 0);
266 OUT_RING (chan, 0xff);
267 OUT_RING (chan, NV20_3D_STENCIL_OP_FAIL_KEEP);
268 OUT_RING (chan, NV20_3D_STENCIL_OP_ZFAIL_KEEP);
269 OUT_RING (chan, NV20_3D_STENCIL_OP_ZPASS_KEEP);
270
271 BEGIN_RING(chan, kelvin, NV20_3D_COLOR_LOGIC_OP_ENABLE, 2);
272 OUT_RING (chan, 0);
273 OUT_RING (chan, NV20_3D_COLOR_LOGIC_OP_OP_COPY);
274 BEGIN_RING(chan, kelvin, 0x17cc, 1);
275 OUT_RING (chan, 0);
276 if (context_chipset(ctx) >= 0x25) {
277 BEGIN_RING(chan, kelvin, 0x1d84, 1);
278 OUT_RING (chan, 1);
279 }
280 BEGIN_RING(chan, kelvin, NV20_3D_LIGHTING_ENABLE, 1);
281 OUT_RING (chan, 0);
282 BEGIN_RING(chan, kelvin, NV20_3D_LIGHT_MODEL, 1);
283 OUT_RING (chan, NV20_3D_LIGHT_MODEL_VIEWER_NONLOCAL);
284 BEGIN_RING(chan, kelvin, NV20_3D_SEPARATE_SPECULAR_ENABLE, 1);
285 OUT_RING (chan, 0);
286 BEGIN_RING(chan, kelvin, NV20_3D_LIGHT_MODEL_TWO_SIDE_ENABLE, 1);
287 OUT_RING (chan, 0);
288 BEGIN_RING(chan, kelvin, NV20_3D_ENABLED_LIGHTS, 1);
289 OUT_RING (chan, 0);
290 BEGIN_RING(chan, kelvin, NV20_3D_NORMALIZE_ENABLE, 1);
291 OUT_RING (chan, 0);
292 BEGIN_RING(chan, kelvin, NV20_3D_POLYGON_STIPPLE_PATTERN(0),
293 NV20_3D_POLYGON_STIPPLE_PATTERN__LEN);
294 for (i = 0; i < NV20_3D_POLYGON_STIPPLE_PATTERN__LEN; i++) {
295 OUT_RING(chan, 0xffffffff);
296 }
297
298 BEGIN_RING(chan, kelvin, NV20_3D_POLYGON_OFFSET_POINT_ENABLE, 3);
299 OUT_RING (chan, 0);
300 OUT_RING (chan, 0);
301 OUT_RING (chan, 0);
302 BEGIN_RING(chan, kelvin, NV20_3D_DEPTH_FUNC, 1);
303 OUT_RING (chan, NV20_3D_DEPTH_FUNC_LESS);
304 BEGIN_RING(chan, kelvin, NV20_3D_DEPTH_WRITE_ENABLE, 1);
305 OUT_RING (chan, 0);
306 BEGIN_RING(chan, kelvin, NV20_3D_DEPTH_TEST_ENABLE, 1);
307 OUT_RING (chan, 0);
308 BEGIN_RING(chan, kelvin, NV20_3D_POLYGON_OFFSET_FACTOR, 2);
309 OUT_RINGf (chan, 0.0);
310 OUT_RINGf (chan, 0.0);
311 BEGIN_RING(chan, kelvin, NV20_3D_DEPTH_CLAMP, 1);
312 OUT_RING (chan, 1);
313 if (context_chipset(ctx) < 0x25) {
314 BEGIN_RING(chan, kelvin, 0x1d84, 1);
315 OUT_RING (chan, 3);
316 }
317 BEGIN_RING(chan, kelvin, NV20_3D_POINT_SIZE, 1);
318 if (context_chipset(ctx) >= 0x25)
319 OUT_RINGf (chan, 1.0);
320 else
321 OUT_RING (chan, 8);
322
323 if (context_chipset(ctx) >= 0x25) {
324 BEGIN_RING(chan, kelvin, NV20_3D_POINT_PARAMETERS_ENABLE, 1);
325 OUT_RING (chan, 0);
326 BEGIN_RING(chan, kelvin, 0x0a1c, 1);
327 OUT_RING (chan, 0x800);
328 } else {
329 BEGIN_RING(chan, kelvin, NV20_3D_POINT_PARAMETERS_ENABLE, 2);
330 OUT_RING (chan, 0);
331 OUT_RING (chan, 0);
332 }
333
334 BEGIN_RING(chan, kelvin, NV20_3D_LINE_WIDTH, 1);
335 OUT_RING (chan, 8);
336 BEGIN_RING(chan, kelvin, NV20_3D_LINE_SMOOTH_ENABLE, 1);
337 OUT_RING (chan, 0);
338 BEGIN_RING(chan, kelvin, NV20_3D_POLYGON_MODE_FRONT, 2);
339 OUT_RING (chan, NV20_3D_POLYGON_MODE_FRONT_FILL);
340 OUT_RING (chan, NV20_3D_POLYGON_MODE_BACK_FILL);
341 BEGIN_RING(chan, kelvin, NV20_3D_CULL_FACE, 2);
342 OUT_RING (chan, NV20_3D_CULL_FACE_BACK);
343 OUT_RING (chan, NV20_3D_FRONT_FACE_CCW);
344 BEGIN_RING(chan, kelvin, NV20_3D_POLYGON_SMOOTH_ENABLE, 1);
345 OUT_RING (chan, 0);
346 BEGIN_RING(chan, kelvin, NV20_3D_CULL_FACE_ENABLE, 1);
347 OUT_RING (chan, 0);
348 BEGIN_RING(chan, kelvin, NV20_3D_SHADE_MODEL, 1);
349 OUT_RING (chan, NV20_3D_SHADE_MODEL_SMOOTH);
350 BEGIN_RING(chan, kelvin, NV20_3D_POLYGON_STIPPLE_ENABLE, 1);
351 OUT_RING (chan, 0);
352
353 BEGIN_RING(chan, kelvin, NV20_3D_TEX_GEN_MODE(0,0),
354 4 * NV20_3D_TEX_GEN_MODE__ESIZE);
355 for (i=0; i < 4 * NV20_3D_TEX_GEN_MODE__LEN; i++)
356 OUT_RING(chan, 0);
357
358 BEGIN_RING(chan, kelvin, NV20_3D_FOG_COEFF(0), 3);
359 OUT_RINGf (chan, 1.5);
360 OUT_RINGf (chan, -0.090168);
361 OUT_RINGf (chan, 0.0);
362 BEGIN_RING(chan, kelvin, NV20_3D_FOG_MODE, 2);
363 OUT_RING (chan, NV20_3D_FOG_MODE_EXP_SIGNED);
364 OUT_RING (chan, NV20_3D_FOG_COORD_FOG);
365 BEGIN_RING(chan, kelvin, NV20_3D_FOG_ENABLE, 2);
366 OUT_RING (chan, 0);
367 OUT_RING (chan, 0);
368
369 BEGIN_RING(chan, kelvin, NV20_3D_ENGINE, 1);
370 OUT_RING (chan, NV20_3D_ENGINE_FIXED);
371
372 for (i = 0; i < NV20_3D_TEX_MATRIX_ENABLE__LEN; i++) {
373 BEGIN_RING(chan, kelvin, NV20_3D_TEX_MATRIX_ENABLE(i), 1);
374 OUT_RING (chan, 0);
375 }
376
377 BEGIN_RING(chan, kelvin, NV20_3D_VERTEX_ATTR_4F_X(1), 4 * 15);
378 OUT_RINGf(chan, 1.0);
379 OUT_RINGf(chan, 0.0);
380 OUT_RINGf(chan, 0.0);
381 OUT_RINGf(chan, 1.0);
382 OUT_RINGf(chan, 0.0);
383 OUT_RINGf(chan, 0.0);
384 OUT_RINGf(chan, 1.0);
385 OUT_RINGf(chan, 1.0);
386 OUT_RINGf(chan, 1.0);
387 OUT_RINGf(chan, 1.0);
388 OUT_RINGf(chan, 1.0);
389 OUT_RINGf(chan, 1.0);
390 for (i = 0; i < 12; i++) {
391 OUT_RINGf(chan, 0.0);
392 OUT_RINGf(chan, 0.0);
393 OUT_RINGf(chan, 0.0);
394 OUT_RINGf(chan, 1.0);
395 }
396
397 BEGIN_RING(chan, kelvin, NV20_3D_EDGEFLAG_ENABLE, 1);
398 OUT_RING (chan, 1);
399 BEGIN_RING(chan, kelvin, NV20_3D_COLOR_MASK, 1);
400 OUT_RING (chan, 0x00010101);
401 BEGIN_RING(chan, kelvin, NV20_3D_CLEAR_VALUE, 1);
402 OUT_RING (chan, 0);
403
404 BEGIN_RING(chan, kelvin, NV20_3D_DEPTH_RANGE_NEAR, 2);
405 OUT_RINGf (chan, 0.0);
406 OUT_RINGf (chan, 16777216.0);
407
408 BEGIN_RING(chan, kelvin, NV20_3D_VIEWPORT_TRANSLATE_X, 4);
409 OUT_RINGf (chan, 0.0);
410 OUT_RINGf (chan, 0.0);
411 OUT_RINGf (chan, 0.0);
412 OUT_RINGf (chan, 16777215.0);
413
414 BEGIN_RING(chan, kelvin, NV20_3D_VIEWPORT_SCALE_X, 4);
415 OUT_RINGf (chan, 0.0);
416 OUT_RINGf (chan, 0.0);
417 OUT_RINGf (chan, 16777215.0 * 0.5);
418 OUT_RINGf (chan, 65535.0);
419
420 FIRE_RING(chan);
421 }
422
423 static void
424 nv20_context_destroy(struct gl_context *ctx)
425 {
426 struct nouveau_context *nctx = to_nouveau_context(ctx);
427
428 nv04_surface_takedown(ctx);
429 nv20_swtnl_destroy(ctx);
430 nv20_vbo_destroy(ctx);
431
432 nouveau_grobj_free(&nctx->hw.eng3d);
433
434 nouveau_context_deinit(ctx);
435 FREE(ctx);
436 }
437
438 static struct gl_context *
439 nv20_context_create(struct nouveau_screen *screen, const struct gl_config *visual,
440 struct gl_context *share_ctx)
441 {
442 struct nouveau_context *nctx;
443 struct gl_context *ctx;
444 unsigned kelvin_class;
445 int ret;
446
447 nctx = CALLOC_STRUCT(nouveau_context);
448 if (!nctx)
449 return NULL;
450
451 ctx = &nctx->base;
452
453 if (!nouveau_context_init(ctx, screen, visual, share_ctx))
454 goto fail;
455
456 driInitExtensions(ctx, nv20_extensions, GL_FALSE);
457
458 /* GL constants. */
459 ctx->Const.MaxTextureCoordUnits = NV20_TEXTURE_UNITS;
460 ctx->Const.MaxTextureImageUnits = NV20_TEXTURE_UNITS;
461 ctx->Const.MaxTextureUnits = NV20_TEXTURE_UNITS;
462 ctx->Const.MaxTextureMaxAnisotropy = 8;
463 ctx->Const.MaxTextureLodBias = 15;
464 ctx->Driver.Clear = nv20_clear;
465
466 /* 2D engine. */
467 ret = nv04_surface_init(ctx);
468 if (!ret)
469 goto fail;
470
471 /* 3D engine. */
472 if (context_chipset(ctx) >= 0x25)
473 kelvin_class = NV25_3D;
474 else
475 kelvin_class = NV20_3D;
476
477 ret = nouveau_grobj_alloc(context_chan(ctx), 0xbeef0001, kelvin_class,
478 &nctx->hw.eng3d);
479 if (ret)
480 goto fail;
481
482 nv20_hwctx_init(ctx);
483 nv20_vbo_init(ctx);
484 nv20_swtnl_init(ctx);
485
486 return ctx;
487
488 fail:
489 nv20_context_destroy(ctx);
490 return NULL;
491 }
492
493 const struct nouveau_driver nv20_driver = {
494 .context_create = nv20_context_create,
495 .context_destroy = nv20_context_destroy,
496 .surface_copy = nv04_surface_copy,
497 .surface_fill = nv04_surface_fill,
498 .emit = (nouveau_state_func[]) {
499 nv10_emit_alpha_func,
500 nv10_emit_blend_color,
501 nv10_emit_blend_equation,
502 nv10_emit_blend_func,
503 nv20_emit_clip_plane,
504 nv20_emit_clip_plane,
505 nv20_emit_clip_plane,
506 nv20_emit_clip_plane,
507 nv20_emit_clip_plane,
508 nv20_emit_clip_plane,
509 nv10_emit_color_mask,
510 nv20_emit_color_material,
511 nv10_emit_cull_face,
512 nv10_emit_front_face,
513 nv10_emit_depth,
514 nv10_emit_dither,
515 nv20_emit_frag,
516 nv20_emit_framebuffer,
517 nv20_emit_fog,
518 nv10_emit_light_enable,
519 nv20_emit_light_model,
520 nv20_emit_light_source,
521 nv20_emit_light_source,
522 nv20_emit_light_source,
523 nv20_emit_light_source,
524 nv20_emit_light_source,
525 nv20_emit_light_source,
526 nv20_emit_light_source,
527 nv20_emit_light_source,
528 nv10_emit_line_stipple,
529 nv10_emit_line_mode,
530 nv20_emit_logic_opcode,
531 nv20_emit_material_ambient,
532 nv20_emit_material_ambient,
533 nv20_emit_material_diffuse,
534 nv20_emit_material_diffuse,
535 nv20_emit_material_specular,
536 nv20_emit_material_specular,
537 nv20_emit_material_shininess,
538 nv20_emit_material_shininess,
539 nv20_emit_modelview,
540 nv20_emit_point_mode,
541 nv10_emit_point_parameter,
542 nv10_emit_polygon_mode,
543 nv10_emit_polygon_offset,
544 nv10_emit_polygon_stipple,
545 nv20_emit_projection,
546 nv10_emit_render_mode,
547 nv10_emit_scissor,
548 nv10_emit_shade_model,
549 nv10_emit_stencil_func,
550 nv10_emit_stencil_mask,
551 nv10_emit_stencil_op,
552 nv20_emit_tex_env,
553 nv20_emit_tex_env,
554 nv20_emit_tex_env,
555 nv20_emit_tex_env,
556 nv20_emit_tex_gen,
557 nv20_emit_tex_gen,
558 nv20_emit_tex_gen,
559 nv20_emit_tex_gen,
560 nv20_emit_tex_mat,
561 nv20_emit_tex_mat,
562 nv20_emit_tex_mat,
563 nv20_emit_tex_mat,
564 nv20_emit_tex_obj,
565 nv20_emit_tex_obj,
566 nv20_emit_tex_obj,
567 nv20_emit_tex_obj,
568 nv20_emit_viewport,
569 nv20_emit_tex_shader
570 },
571 .num_emit = NUM_NV20_STATE,
572 };