src/mesa/drivers/dri/nouveau/nv20_context.c

   1 /*
   2  * Copyright (C) 2009-2010 Francisco Jerez.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining
   6  * a copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sublicense, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the
  14  * next paragraph) shall be included in all copies or substantial
  15  * portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24  *
  25  */
  26
  27 #include "nouveau_driver.h"
  28 #include "nouveau_context.h"
  29 #include "nouveau_fbo.h"
  30 #include "nouveau_util.h"
  31 #include "nouveau_class.h"
  32 #include "nv04_driver.h"
  33 #include "nv10_driver.h"
  34 #include "nv20_driver.h"
  35
  36 static const struct dri_extension nv20_extensions[] = {
  37         { "GL_ARB_texture_env_crossbar", NULL },
  38         { "GL_EXT_texture_rectangle",   NULL },
  39         { "GL_ARB_texture_env_combine", NULL },
  40         { "GL_ARB_texture_env_dot3",    NULL },
  41         { NULL,                         NULL }
  42 };
  43
  44 static void
  45 nv20_clear(struct gl_context *ctx, GLbitfield buffers)
  46 {
  47         struct nouveau_channel *chan = context_chan(ctx);
  48         struct nouveau_grobj *kelvin = context_eng3d(ctx);
  49         struct gl_framebuffer *fb = ctx->DrawBuffer;
  50         uint32_t clear = 0;
  51
  52         nouveau_validate_framebuffer(ctx);
  53
  54         if (buffers & BUFFER_BITS_COLOR) {
  55                 struct nouveau_surface *s = &to_nouveau_renderbuffer(
  56                         fb->_ColorDrawBuffers[0])->surface;
  57
  58                 if (ctx->Color.ColorMask[0][RCOMP])
  59                         clear |= NV20TCL_CLEAR_BUFFERS_COLOR_R;
  60                 if (ctx->Color.ColorMask[0][GCOMP])
  61                         clear |= NV20TCL_CLEAR_BUFFERS_COLOR_G;
  62                 if (ctx->Color.ColorMask[0][BCOMP])
  63                         clear |= NV20TCL_CLEAR_BUFFERS_COLOR_B;
  64                 if (ctx->Color.ColorMask[0][ACOMP])
  65                         clear |= NV20TCL_CLEAR_BUFFERS_COLOR_A;
  66
  67                 BEGIN_RING(chan, kelvin, NV20TCL_CLEAR_VALUE, 1);
  68                 OUT_RING(chan, pack_rgba_f(s->format, ctx->Color.ClearColor));
  69
  70                 buffers &= ~BUFFER_BITS_COLOR;
  71         }
  72
  73         if (buffers & (BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL)) {
  74                 struct nouveau_surface *s = &to_nouveau_renderbuffer(
  75                         fb->_DepthBuffer->Wrapped)->surface;
  76
  77                 if (buffers & BUFFER_BIT_DEPTH && ctx->Depth.Mask)
  78                         clear |= NV20TCL_CLEAR_BUFFERS_DEPTH;
  79                 if (buffers & BUFFER_BIT_STENCIL && ctx->Stencil.WriteMask[0])
  80                         clear |= NV20TCL_CLEAR_BUFFERS_STENCIL;
  81
  82                 BEGIN_RING(chan, kelvin, NV20TCL_CLEAR_DEPTH_VALUE, 1);
  83                 OUT_RING(chan, pack_zs_f(s->format, ctx->Depth.Clear,
  84                                          ctx->Stencil.Clear));
  85
  86                 buffers &= ~(BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL);
  87         }
  88
  89         BEGIN_RING(chan, kelvin, NV20TCL_CLEAR_BUFFERS, 1);
  90         OUT_RING(chan, clear);
  91
  92         nouveau_clear(ctx, buffers);
  93 }
  94
  95 static void
  96 nv20_hwctx_init(struct gl_context *ctx)
  97 {
  98         struct nouveau_channel *chan = context_chan(ctx);
  99         struct nouveau_grobj *kelvin = context_eng3d(ctx);
 100         struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw;
 101         int i;
 102
 103         BEGIN_RING(chan, kelvin, NV20TCL_DMA_NOTIFY, 1);
 104         OUT_RING  (chan, hw->ntfy->handle);
 105         BEGIN_RING(chan, kelvin, NV20TCL_DMA_TEXTURE0, 2);
 106         OUT_RING  (chan, chan->vram->handle);
 107         OUT_RING  (chan, chan->gart->handle);
 108         BEGIN_RING(chan, kelvin, NV20TCL_DMA_COLOR, 2);
 109         OUT_RING  (chan, chan->vram->handle);
 110         OUT_RING  (chan, chan->vram->handle);
 111         BEGIN_RING(chan, kelvin, NV20TCL_DMA_VTXBUF0, 2);
 112         OUT_RING(chan, chan->vram->handle);
 113         OUT_RING(chan, chan->gart->handle);
 114
 115         BEGIN_RING(chan, kelvin, NV20TCL_DMA_QUERY, 1);
 116         OUT_RING  (chan, 0);
 117
 118         BEGIN_RING(chan, kelvin, NV20TCL_RT_HORIZ, 2);
 119         OUT_RING  (chan, 0);
 120         OUT_RING  (chan, 0);
 121
 122         BEGIN_RING(chan, kelvin, NV20TCL_VIEWPORT_CLIP_HORIZ(0), 1);
 123         OUT_RING  (chan, 0xfff << 16 | 0x0);
 124         BEGIN_RING(chan, kelvin, NV20TCL_VIEWPORT_CLIP_VERT(0), 1);
 125         OUT_RING  (chan, 0xfff << 16 | 0x0);
 126
 127         for (i = 1; i < NV20TCL_VIEWPORT_CLIP_HORIZ__SIZE; i++) {
 128                 BEGIN_RING(chan, kelvin, NV20TCL_VIEWPORT_CLIP_HORIZ(i), 1);
 129                 OUT_RING  (chan, 0);
 130                 BEGIN_RING(chan, kelvin, NV20TCL_VIEWPORT_CLIP_VERT(i), 1);
 131                 OUT_RING  (chan, 0);
 132         }
 133
 134         BEGIN_RING(chan, kelvin, NV20TCL_VIEWPORT_CLIP_MODE, 1);
 135         OUT_RING  (chan, 0);
 136
 137         BEGIN_RING(chan, kelvin, 0x17e0, 3);
 138         OUT_RINGf (chan, 0.0);
 139         OUT_RINGf (chan, 0.0);
 140         OUT_RINGf (chan, 1.0);
 141
 142         if (context_chipset(ctx) >= 0x25) {
 143                 BEGIN_RING(chan, kelvin, NV20TCL_TX_RCOMP, 1);
 144                 OUT_RING  (chan, NV20TCL_TX_RCOMP_LEQUAL | 0xdb0);
 145         } else {
 146                 BEGIN_RING(chan, kelvin, 0x1e68, 1);
 147                 OUT_RING  (chan, 0x4b800000); /* 16777216.000000 */
 148                 BEGIN_RING(chan, kelvin, NV20TCL_TX_RCOMP, 1);
 149                 OUT_RING  (chan, NV20TCL_TX_RCOMP_LEQUAL);
 150         }
 151
 152         BEGIN_RING(chan, kelvin, 0x290, 1);
 153         OUT_RING  (chan, 0x10 << 16 | 1);
 154         BEGIN_RING(chan, kelvin, 0x9fc, 1);
 155         OUT_RING  (chan, 0);
 156         BEGIN_RING(chan, kelvin, 0x1d80, 1);
 157         OUT_RING  (chan, 1);
 158         BEGIN_RING(chan, kelvin, 0x9f8, 1);
 159         OUT_RING  (chan, 4);
 160         BEGIN_RING(chan, kelvin, 0x17ec, 3);
 161         OUT_RINGf (chan, 0.0);
 162         OUT_RINGf (chan, 1.0);
 163         OUT_RINGf (chan, 0.0);
 164
 165         if (context_chipset(ctx) >= 0x25) {
 166                 BEGIN_RING(chan, kelvin, 0x1d88, 1);
 167                 OUT_RING  (chan, 3);
 168
 169                 BEGIN_RING(chan, kelvin, NV25TCL_DMA_IN_MEMORY9, 1);
 170                 OUT_RING  (chan, chan->vram->handle);
 171                 BEGIN_RING(chan, kelvin, NV25TCL_DMA_IN_MEMORY8, 1);
 172                 OUT_RING  (chan, chan->vram->handle);
 173         }
 174
 175         BEGIN_RING(chan, kelvin, NV20TCL_DMA_FENCE, 1);
 176         OUT_RING  (chan, 0);
 177
 178         BEGIN_RING(chan, kelvin, 0x1e98, 1);
 179         OUT_RING  (chan, 0);
 180
 181         BEGIN_RING(chan, kelvin, NV20TCL_NOTIFY, 1);
 182         OUT_RING  (chan, 0);
 183
 184         BEGIN_RING(chan, kelvin, 0x120, 3);
 185         OUT_RING  (chan, 0);
 186         OUT_RING  (chan, 1);
 187         OUT_RING  (chan, 2);
 188
 189         if (context_chipset(ctx) >= 0x25) {
 190                 BEGIN_RING(chan, kelvin, 0x1da4, 1);
 191                 OUT_RING  (chan, 0);
 192         }
 193
 194         BEGIN_RING(chan, kelvin, NV20TCL_RT_HORIZ, 2);
 195         OUT_RING  (chan, 0 << 16 | 0);
 196         OUT_RING  (chan, 0 << 16 | 0);
 197
 198         BEGIN_RING(chan, kelvin, NV20TCL_ALPHA_FUNC_ENABLE, 1);
 199         OUT_RING  (chan, 0);
 200         BEGIN_RING(chan, kelvin, NV20TCL_ALPHA_FUNC_FUNC, 2);
 201         OUT_RING  (chan, NV20TCL_ALPHA_FUNC_FUNC_ALWAYS);
 202         OUT_RING  (chan, 0);
 203
 204         for (i = 0; i < NV20TCL_TX_ENABLE__SIZE; i++) {
 205                 BEGIN_RING(chan, kelvin, NV20TCL_TX_ENABLE(i), 1);
 206                 OUT_RING  (chan, 0);
 207         }
 208
 209         BEGIN_RING(chan, kelvin, NV20TCL_TX_SHADER_OP, 1);
 210         OUT_RING  (chan, 0);
 211         BEGIN_RING(chan, kelvin, NV20TCL_TX_SHADER_CULL_MODE, 1);
 212         OUT_RING  (chan, 0);
 213
 214         BEGIN_RING(chan, kelvin, NV20TCL_RC_IN_ALPHA(0), 4);
 215         OUT_RING  (chan, 0x30d410d0);
 216         OUT_RING  (chan, 0);
 217         OUT_RING  (chan, 0);
 218         OUT_RING  (chan, 0);
 219         BEGIN_RING(chan, kelvin, NV20TCL_RC_OUT_RGB(0), 4);
 220         OUT_RING  (chan, 0x00000c00);
 221         OUT_RING  (chan, 0);
 222         OUT_RING  (chan, 0);
 223         OUT_RING  (chan, 0);
 224         BEGIN_RING(chan, kelvin, NV20TCL_RC_ENABLE, 1);
 225         OUT_RING  (chan, 0x00011101);
 226         BEGIN_RING(chan, kelvin, NV20TCL_RC_FINAL0, 2);
 227         OUT_RING  (chan, 0x130e0300);
 228         OUT_RING  (chan, 0x0c091c80);
 229         BEGIN_RING(chan, kelvin, NV20TCL_RC_OUT_ALPHA(0), 4);
 230         OUT_RING  (chan, 0x00000c00);
 231         OUT_RING  (chan, 0);
 232         OUT_RING  (chan, 0);
 233         OUT_RING  (chan, 0);
 234         BEGIN_RING(chan, kelvin, NV20TCL_RC_IN_RGB(0), 4);
 235         OUT_RING  (chan, 0x20c400c0);
 236         OUT_RING  (chan, 0);
 237         OUT_RING  (chan, 0);
 238         OUT_RING  (chan, 0);
 239         BEGIN_RING(chan, kelvin, NV20TCL_RC_COLOR0, 2);
 240         OUT_RING  (chan, 0);
 241         OUT_RING  (chan, 0);
 242         BEGIN_RING(chan, kelvin, NV20TCL_RC_CONSTANT_COLOR0(0), 4);
 243         OUT_RING  (chan, 0x035125a0);
 244         OUT_RING  (chan, 0);
 245         OUT_RING  (chan, 0x40002000);
 246         OUT_RING  (chan, 0);
 247
 248         BEGIN_RING(chan, kelvin, NV20TCL_MULTISAMPLE_CONTROL, 1);
 249         OUT_RING  (chan, 0xffff0000);
 250         BEGIN_RING(chan, kelvin, NV20TCL_BLEND_FUNC_ENABLE, 1);
 251         OUT_RING  (chan, 0);
 252         BEGIN_RING(chan, kelvin, NV20TCL_DITHER_ENABLE, 1);
 253         OUT_RING  (chan, 0);
 254         BEGIN_RING(chan, kelvin, NV20TCL_STENCIL_ENABLE, 1);
 255         OUT_RING  (chan, 0);
 256         BEGIN_RING(chan, kelvin, NV20TCL_BLEND_FUNC_SRC, 4);
 257         OUT_RING  (chan, NV20TCL_BLEND_FUNC_SRC_ONE);
 258         OUT_RING  (chan, NV20TCL_BLEND_FUNC_DST_ZERO);
 259         OUT_RING  (chan, 0);
 260         OUT_RING  (chan, NV20TCL_BLEND_EQUATION_FUNC_ADD);
 261         BEGIN_RING(chan, kelvin, NV20TCL_STENCIL_MASK, 7);
 262         OUT_RING  (chan, 0xff);
 263         OUT_RING  (chan, NV20TCL_STENCIL_FUNC_FUNC_ALWAYS);
 264         OUT_RING  (chan, 0);
 265         OUT_RING  (chan, 0xff);
 266         OUT_RING  (chan, NV20TCL_STENCIL_OP_FAIL_KEEP);
 267         OUT_RING  (chan, NV20TCL_STENCIL_OP_ZFAIL_KEEP);
 268         OUT_RING  (chan, NV20TCL_STENCIL_OP_ZPASS_KEEP);
 269
 270         BEGIN_RING(chan, kelvin, NV20TCL_COLOR_LOGIC_OP_ENABLE, 2);
 271         OUT_RING  (chan, 0);
 272         OUT_RING  (chan, NV20TCL_COLOR_LOGIC_OP_OP_COPY);
 273         BEGIN_RING(chan, kelvin, 0x17cc, 1);
 274         OUT_RING  (chan, 0);
 275         if (context_chipset(ctx) >= 0x25) {
 276                 BEGIN_RING(chan, kelvin, 0x1d84, 1);
 277                 OUT_RING  (chan, 1);
 278         }
 279         BEGIN_RING(chan, kelvin, NV20TCL_LIGHTING_ENABLE, 1);
 280         OUT_RING  (chan, 0);
 281         BEGIN_RING(chan, kelvin, NV20TCL_LIGHT_MODEL, 1);
 282         OUT_RING  (chan, NV20TCL_LIGHT_MODEL_VIEWER_NONLOCAL);
 283         BEGIN_RING(chan, kelvin, NV20TCL_SEPARATE_SPECULAR_ENABLE, 1);
 284         OUT_RING  (chan, 0);
 285         BEGIN_RING(chan, kelvin, NV20TCL_LIGHT_MODEL_TWO_SIDE_ENABLE, 1);
 286         OUT_RING  (chan, 0);
 287         BEGIN_RING(chan, kelvin, NV20TCL_ENABLED_LIGHTS, 1);
 288         OUT_RING  (chan, 0);
 289         BEGIN_RING(chan, kelvin, NV20TCL_NORMALIZE_ENABLE, 1);
 290         OUT_RING  (chan, 0);
 291         BEGIN_RING(chan, kelvin, NV20TCL_POLYGON_STIPPLE_PATTERN(0),
 292                    NV20TCL_POLYGON_STIPPLE_PATTERN__SIZE);
 293         for (i = 0; i < NV20TCL_POLYGON_STIPPLE_PATTERN__SIZE; i++) {
 294                 OUT_RING(chan, 0xffffffff);
 295         }
 296
 297         BEGIN_RING(chan, kelvin, NV20TCL_POLYGON_OFFSET_POINT_ENABLE, 3);
 298         OUT_RING  (chan, 0);
 299         OUT_RING  (chan, 0);
 300         OUT_RING  (chan, 0);
 301         BEGIN_RING(chan, kelvin, NV20TCL_DEPTH_FUNC, 1);
 302         OUT_RING  (chan, NV20TCL_DEPTH_FUNC_LESS);
 303         BEGIN_RING(chan, kelvin, NV20TCL_DEPTH_WRITE_ENABLE, 1);
 304         OUT_RING  (chan, 0);
 305         BEGIN_RING(chan, kelvin, NV20TCL_DEPTH_TEST_ENABLE, 1);
 306         OUT_RING  (chan, 0);
 307         BEGIN_RING(chan, kelvin, NV20TCL_POLYGON_OFFSET_FACTOR, 2);
 308         OUT_RINGf (chan, 0.0);
 309         OUT_RINGf (chan, 0.0);
 310         BEGIN_RING(chan, kelvin, NV20TCL_DEPTH_UNK17D8, 1);
 311         OUT_RING  (chan, 1);
 312         if (context_chipset(ctx) < 0x25) {
 313                 BEGIN_RING(chan, kelvin, 0x1d84, 1);
 314                 OUT_RING  (chan, 3);
 315         }
 316         BEGIN_RING(chan, kelvin, NV20TCL_POINT_SIZE, 1);
 317         if (context_chipset(ctx) >= 0x25)
 318                 OUT_RINGf (chan, 1.0);
 319         else
 320                 OUT_RING  (chan, 8);
 321
 322         if (context_chipset(ctx) >= 0x25) {
 323                 BEGIN_RING(chan, kelvin, NV20TCL_POINT_PARAMETERS_ENABLE, 1);
 324                 OUT_RING  (chan, 0);
 325                 BEGIN_RING(chan, kelvin, 0x0a1c, 1);
 326                 OUT_RING  (chan, 0x800);
 327         } else {
 328                 BEGIN_RING(chan, kelvin, NV20TCL_POINT_PARAMETERS_ENABLE, 2);
 329                 OUT_RING  (chan, 0);
 330                 OUT_RING  (chan, 0);
 331         }
 332
 333         BEGIN_RING(chan, kelvin, NV20TCL_LINE_WIDTH, 1);
 334         OUT_RING  (chan, 8);
 335         BEGIN_RING(chan, kelvin, NV20TCL_LINE_SMOOTH_ENABLE, 1);
 336         OUT_RING  (chan, 0);
 337         BEGIN_RING(chan, kelvin, NV20TCL_POLYGON_MODE_FRONT, 2);
 338         OUT_RING  (chan, NV20TCL_POLYGON_MODE_FRONT_FILL);
 339         OUT_RING  (chan, NV20TCL_POLYGON_MODE_BACK_FILL);
 340         BEGIN_RING(chan, kelvin, NV20TCL_CULL_FACE, 2);
 341         OUT_RING  (chan, NV20TCL_CULL_FACE_BACK);
 342         OUT_RING  (chan, NV20TCL_FRONT_FACE_CCW);
 343         BEGIN_RING(chan, kelvin, NV20TCL_POLYGON_SMOOTH_ENABLE, 1);
 344         OUT_RING  (chan, 0);
 345         BEGIN_RING(chan, kelvin, NV20TCL_CULL_FACE_ENABLE, 1);
 346         OUT_RING  (chan, 0);
 347         BEGIN_RING(chan, kelvin, NV20TCL_SHADE_MODEL, 1);
 348         OUT_RING  (chan, NV20TCL_SHADE_MODEL_SMOOTH);
 349         BEGIN_RING(chan, kelvin, NV20TCL_POLYGON_STIPPLE_ENABLE, 1);
 350         OUT_RING  (chan, 0);
 351
 352         BEGIN_RING(chan, kelvin, NV20TCL_TX_GEN_MODE_S(0),
 353                    4 * NV20TCL_TX_GEN_MODE_S__SIZE);
 354         for (i=0; i < 4 * NV20TCL_TX_GEN_MODE_S__SIZE; i++)
 355                 OUT_RING(chan, 0);
 356
 357         BEGIN_RING(chan, kelvin, NV20TCL_FOG_EQUATION_CONSTANT, 3);
 358         OUT_RINGf (chan, 1.5);
 359         OUT_RINGf (chan, -0.090168);
 360         OUT_RINGf (chan, 0.0);
 361         BEGIN_RING(chan, kelvin, NV20TCL_FOG_MODE, 2);
 362         OUT_RING  (chan, NV20TCL_FOG_MODE_EXP_SIGNED);
 363         OUT_RING  (chan, NV20TCL_FOG_COORD_FOG);
 364         BEGIN_RING(chan, kelvin, NV20TCL_FOG_ENABLE, 2);
 365         OUT_RING  (chan, 0);
 366         OUT_RING  (chan, 0);
 367
 368         BEGIN_RING(chan, kelvin, NV20TCL_ENGINE, 1);
 369         OUT_RING  (chan, NV20TCL_ENGINE_FIXED);
 370
 371         for (i = 0; i < NV20TCL_TX_MATRIX_ENABLE__SIZE; i++) {
 372                 BEGIN_RING(chan, kelvin, NV20TCL_TX_MATRIX_ENABLE(i), 1);
 373                 OUT_RING  (chan, 0);
 374         }
 375
 376         BEGIN_RING(chan, kelvin, NV20TCL_VTX_ATTR_4F_X(1), 4 * 15);
 377         OUT_RINGf(chan, 1.0);
 378         OUT_RINGf(chan, 0.0);
 379         OUT_RINGf(chan, 0.0);
 380         OUT_RINGf(chan, 1.0);
 381         OUT_RINGf(chan, 0.0);
 382         OUT_RINGf(chan, 0.0);
 383         OUT_RINGf(chan, 1.0);
 384         OUT_RINGf(chan, 1.0);
 385         OUT_RINGf(chan, 1.0);
 386         OUT_RINGf(chan, 1.0);
 387         OUT_RINGf(chan, 1.0);
 388         OUT_RINGf(chan, 1.0);
 389         for (i = 0; i < 12; i++) {
 390                 OUT_RINGf(chan, 0.0);
 391                 OUT_RINGf(chan, 0.0);
 392                 OUT_RINGf(chan, 0.0);
 393                 OUT_RINGf(chan, 1.0);
 394         }
 395
 396         BEGIN_RING(chan, kelvin, NV20TCL_EDGEFLAG_ENABLE, 1);
 397         OUT_RING  (chan, 1);
 398         BEGIN_RING(chan, kelvin, NV20TCL_COLOR_MASK, 1);
 399         OUT_RING (chan, 0x00010101);
 400         BEGIN_RING(chan, kelvin, NV20TCL_CLEAR_VALUE, 1);
 401         OUT_RING (chan, 0);
 402
 403         BEGIN_RING(chan, kelvin, NV20TCL_DEPTH_RANGE_NEAR, 2);
 404         OUT_RINGf (chan, 0.0);
 405         OUT_RINGf (chan, 16777216.0);
 406
 407         BEGIN_RING(chan, kelvin, NV20TCL_VIEWPORT_TRANSLATE_X, 4);
 408         OUT_RINGf (chan, 0.0);
 409         OUT_RINGf (chan, 0.0);
 410         OUT_RINGf (chan, 0.0);
 411         OUT_RINGf (chan, 16777215.0);
 412
 413         BEGIN_RING(chan, kelvin, NV20TCL_VIEWPORT_SCALE_X, 4);
 414         OUT_RINGf (chan, 0.0);
 415         OUT_RINGf (chan, 0.0);
 416         OUT_RINGf (chan, 16777215.0 * 0.5);
 417         OUT_RINGf (chan, 65535.0);
 418
 419         FIRE_RING(chan);
 420 }
 421
 422 static void
 423 nv20_context_destroy(struct gl_context *ctx)
 424 {
 425         struct nouveau_context *nctx = to_nouveau_context(ctx);
 426
 427         nv04_surface_takedown(ctx);
 428         nv20_render_destroy(ctx);
 429
 430         nouveau_grobj_free(&nctx->hw.eng3d);
 431
 432         nouveau_context_deinit(ctx);
 433         FREE(ctx);
 434 }
 435
 436 static struct gl_context *
 437 nv20_context_create(struct nouveau_screen *screen, const struct gl_config *visual,
 438                     struct gl_context *share_ctx)
 439 {
 440         struct nouveau_context *nctx;
 441         struct gl_context *ctx;
 442         unsigned kelvin_class;
 443         int ret;
 444
 445         nctx = CALLOC_STRUCT(nouveau_context);
 446         if (!nctx)
 447                 return NULL;
 448
 449         ctx = &nctx->base;
 450
 451         if (!nouveau_context_init(ctx, screen, visual, share_ctx))
 452                 goto fail;
 453
 454         driInitExtensions(ctx, nv20_extensions, GL_FALSE);
 455
 456         /* GL constants. */
 457         ctx->Const.MaxTextureCoordUnits = NV20_TEXTURE_UNITS;
 458         ctx->Const.MaxTextureImageUnits = NV20_TEXTURE_UNITS;
 459         ctx->Const.MaxTextureUnits = NV20_TEXTURE_UNITS;
 460         ctx->Const.MaxTextureMaxAnisotropy = 8;
 461         ctx->Const.MaxTextureLodBias = 15;
 462         ctx->Driver.Clear = nv20_clear;
 463
 464         /* 2D engine. */
 465         ret = nv04_surface_init(ctx);
 466         if (!ret)
 467                 goto fail;
 468
 469         /* 3D engine. */
 470         if (context_chipset(ctx) >= 0x25)
 471                 kelvin_class = NV25TCL;
 472         else
 473                 kelvin_class = NV20TCL;
 474
 475         ret = nouveau_grobj_alloc(context_chan(ctx), 0xbeef0001, kelvin_class,
 476                                   &nctx->hw.eng3d);
 477         if (ret)
 478                 goto fail;
 479
 480         nv20_hwctx_init(ctx);
 481         nv20_render_init(ctx);
 482
 483         return ctx;
 484
 485 fail:
 486         nv20_context_destroy(ctx);
 487         return NULL;
 488 }
 489
 490 const struct nouveau_driver nv20_driver = {
 491         .context_create = nv20_context_create,
 492         .context_destroy = nv20_context_destroy,
 493         .surface_copy = nv04_surface_copy,
 494         .surface_fill = nv04_surface_fill,
 495         .emit = (nouveau_state_func[]) {
 496                 nv10_emit_alpha_func,
 497                 nv10_emit_blend_color,
 498                 nv10_emit_blend_equation,
 499                 nv10_emit_blend_func,
 500                 nv20_emit_clip_plane,
 501                 nv20_emit_clip_plane,
 502                 nv20_emit_clip_plane,
 503                 nv20_emit_clip_plane,
 504                 nv20_emit_clip_plane,
 505                 nv20_emit_clip_plane,
 506                 nv10_emit_color_mask,
 507                 nv20_emit_color_material,
 508                 nv10_emit_cull_face,
 509                 nv10_emit_front_face,
 510                 nv10_emit_depth,
 511                 nv10_emit_dither,
 512                 nv20_emit_frag,
 513                 nv20_emit_framebuffer,
 514                 nv20_emit_fog,
 515                 nv10_emit_light_enable,
 516                 nv20_emit_light_model,
 517                 nv20_emit_light_source,
 518                 nv20_emit_light_source,
 519                 nv20_emit_light_source,
 520                 nv20_emit_light_source,
 521                 nv20_emit_light_source,
 522                 nv20_emit_light_source,
 523                 nv20_emit_light_source,
 524                 nv20_emit_light_source,
 525                 nv10_emit_line_stipple,
 526                 nv10_emit_line_mode,
 527                 nv20_emit_logic_opcode,
 528                 nv20_emit_material_ambient,
 529                 nv20_emit_material_ambient,
 530                 nv20_emit_material_diffuse,
 531                 nv20_emit_material_diffuse,
 532                 nv20_emit_material_specular,
 533                 nv20_emit_material_specular,
 534                 nv20_emit_material_shininess,
 535                 nv20_emit_material_shininess,
 536                 nv20_emit_modelview,
 537                 nv20_emit_point_mode,
 538                 nv10_emit_point_parameter,
 539                 nv10_emit_polygon_mode,
 540                 nv10_emit_polygon_offset,
 541                 nv10_emit_polygon_stipple,
 542                 nv20_emit_projection,
 543                 nv10_emit_render_mode,
 544                 nv10_emit_scissor,
 545                 nv10_emit_shade_model,
 546                 nv10_emit_stencil_func,
 547                 nv10_emit_stencil_mask,
 548                 nv10_emit_stencil_op,
 549                 nv20_emit_tex_env,
 550                 nv20_emit_tex_env,
 551                 nv20_emit_tex_env,
 552                 nv20_emit_tex_env,
 553                 nv20_emit_tex_gen,
 554                 nv20_emit_tex_gen,
 555                 nv20_emit_tex_gen,
 556                 nv20_emit_tex_gen,
 557                 nv20_emit_tex_mat,
 558                 nv20_emit_tex_mat,
 559                 nv20_emit_tex_mat,
 560                 nv20_emit_tex_mat,
 561                 nv20_emit_tex_obj,
 562                 nv20_emit_tex_obj,
 563                 nv20_emit_tex_obj,
 564                 nv20_emit_tex_obj,
 565                 nv20_emit_viewport,
 566                 nv20_emit_tex_shader
 567         },
 568         .num_emit = NUM_NV20_STATE,
 569 };