799510daa69f1e087f5d2f0219006e9a6d29feaf
[mesa.git] / src / mesa / drivers / dri / nouveau / nv20_state_tex.c
1 /*
2 * Copyright (C) 2009 Francisco Jerez.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 *
25 */
26
27 #include "nouveau_driver.h"
28 #include "nouveau_context.h"
29 #include "nouveau_gldefs.h"
30 #include "nouveau_texture.h"
31 #include "nv20_3d.xml.h"
32 #include "nouveau_util.h"
33 #include "nv20_driver.h"
34
35 void
36 nv20_emit_tex_gen(struct gl_context *ctx, int emit)
37 {
38 const int i = emit - NOUVEAU_STATE_TEX_GEN0;
39 struct nouveau_context *nctx = to_nouveau_context(ctx);
40 struct nouveau_pushbuf *push = context_push(ctx);
41 struct gl_texture_unit *unit = &ctx->Texture.Unit[i];
42 int j;
43
44 for (j = 0; j < 4; j++) {
45 if (nctx->fallback == HWTNL && (unit->TexGenEnabled & 1 << j)) {
46 struct gl_texgen *coord = get_texgen_coord(unit, j);
47 float *k = get_texgen_coeff(coord);
48
49 if (k) {
50 BEGIN_NV04(push, NV20_3D(TEX_GEN_COEFF(i, j)), 4);
51 PUSH_DATAp(push, k, 4);
52 }
53
54 BEGIN_NV04(push, NV20_3D(TEX_GEN_MODE(i, j)), 1);
55 PUSH_DATA (push, nvgl_texgen_mode(coord->Mode));
56
57 } else {
58 BEGIN_NV04(push, NV20_3D(TEX_GEN_MODE(i, j)), 1);
59 PUSH_DATA (push, 0);
60 }
61 }
62 }
63
64 void
65 nv20_emit_tex_mat(struct gl_context *ctx, int emit)
66 {
67 const int i = emit - NOUVEAU_STATE_TEX_MAT0;
68 struct nouveau_context *nctx = to_nouveau_context(ctx);
69 struct nouveau_pushbuf *push = context_push(ctx);
70
71 if (nctx->fallback == HWTNL &&
72 (ctx->Texture._TexMatEnabled & 1 << i)) {
73 BEGIN_NV04(push, NV20_3D(TEX_MATRIX_ENABLE(i)), 1);
74 PUSH_DATA (push, 1);
75
76 BEGIN_NV04(push, NV20_3D(TEX_MATRIX(i,0)), 16);
77 PUSH_DATAm(push, ctx->TextureMatrixStack[i].Top->m);
78
79 } else {
80 BEGIN_NV04(push, NV20_3D(TEX_MATRIX_ENABLE(i)), 1);
81 PUSH_DATA (push, 0);
82 }
83 }
84
85 static uint32_t
86 get_tex_format_pot(struct gl_texture_image *ti)
87 {
88 switch (ti->TexFormat) {
89 case MESA_FORMAT_ARGB8888:
90 return NV20_3D_TEX_FORMAT_FORMAT_A8R8G8B8;
91
92 case MESA_FORMAT_ARGB1555:
93 return NV20_3D_TEX_FORMAT_FORMAT_A1R5G5B5;
94
95 case MESA_FORMAT_ARGB4444:
96 return NV20_3D_TEX_FORMAT_FORMAT_A4R4G4B4;
97
98 case MESA_FORMAT_XRGB8888:
99 return NV20_3D_TEX_FORMAT_FORMAT_X8R8G8B8;
100
101 case MESA_FORMAT_RGB565:
102 return NV20_3D_TEX_FORMAT_FORMAT_R5G6B5;
103
104 case MESA_FORMAT_A8:
105 case MESA_FORMAT_I8:
106 return NV20_3D_TEX_FORMAT_FORMAT_I8;
107
108 case MESA_FORMAT_L8:
109 return NV20_3D_TEX_FORMAT_FORMAT_L8;
110
111 default:
112 assert(0);
113 }
114 }
115
116 static uint32_t
117 get_tex_format_rect(struct gl_texture_image *ti)
118 {
119 switch (ti->TexFormat) {
120 case MESA_FORMAT_ARGB8888:
121 return NV20_3D_TEX_FORMAT_FORMAT_A8R8G8B8_RECT;
122
123 case MESA_FORMAT_ARGB1555:
124 return NV20_3D_TEX_FORMAT_FORMAT_A1R5G5B5_RECT;
125
126 case MESA_FORMAT_ARGB4444:
127 return NV20_3D_TEX_FORMAT_FORMAT_A4R4G4B4_RECT;
128
129 case MESA_FORMAT_XRGB8888:
130 return NV20_3D_TEX_FORMAT_FORMAT_R8G8B8_RECT;
131
132 case MESA_FORMAT_RGB565:
133 return NV20_3D_TEX_FORMAT_FORMAT_R5G6B5_RECT;
134
135 case MESA_FORMAT_L8:
136 return NV20_3D_TEX_FORMAT_FORMAT_L8_RECT;
137
138 case MESA_FORMAT_A8:
139 case MESA_FORMAT_I8:
140 return NV20_3D_TEX_FORMAT_FORMAT_I8_RECT;
141
142 default:
143 assert(0);
144 }
145 }
146
147 void
148 nv20_emit_tex_obj(struct gl_context *ctx, int emit)
149 {
150 const int i = emit - NOUVEAU_STATE_TEX_OBJ0;
151 struct nouveau_pushbuf *push = context_push(ctx);
152 const int bo_flags = NOUVEAU_BO_RD | NOUVEAU_BO_GART | NOUVEAU_BO_VRAM;
153 struct gl_texture_object *t;
154 struct nouveau_surface *s;
155 struct gl_texture_image *ti;
156 uint32_t tx_format, tx_filter, tx_wrap, tx_enable;
157
158 PUSH_RESET(push, BUFCTX_TEX(i));
159
160 if (!ctx->Texture.Unit[i]._ReallyEnabled) {
161 BEGIN_NV04(push, NV20_3D(TEX_ENABLE(i)), 1);
162 PUSH_DATA (push, 0);
163
164 context_dirty(ctx, TEX_SHADER);
165 return;
166 }
167
168 t = ctx->Texture.Unit[i]._Current;
169 s = &to_nouveau_texture(t)->surfaces[t->BaseLevel];
170 ti = t->Image[0][t->BaseLevel];
171
172 if (!nouveau_texture_validate(ctx, t))
173 return;
174
175 /* Recompute the texturing registers. */
176 tx_format = ti->DepthLog2 << 28
177 | ti->HeightLog2 << 24
178 | ti->WidthLog2 << 20
179 | NV20_3D_TEX_FORMAT_DIMS_2D
180 | NV20_3D_TEX_FORMAT_NO_BORDER
181 | 1 << 16;
182
183 tx_wrap = nvgl_wrap_mode(t->Sampler.WrapR) << 16
184 | nvgl_wrap_mode(t->Sampler.WrapT) << 8
185 | nvgl_wrap_mode(t->Sampler.WrapS) << 0;
186
187 tx_filter = nvgl_filter_mode(t->Sampler.MagFilter) << 24
188 | nvgl_filter_mode(t->Sampler.MinFilter) << 16
189 | 2 << 12;
190
191 tx_enable = NV20_3D_TEX_ENABLE_ENABLE
192 | log2i(t->Sampler.MaxAnisotropy) << 4;
193
194 if (t->Target == GL_TEXTURE_RECTANGLE) {
195 BEGIN_NV04(push, NV20_3D(TEX_NPOT_PITCH(i)), 1);
196 PUSH_DATA (push, s->pitch << 16);
197 BEGIN_NV04(push, NV20_3D(TEX_NPOT_SIZE(i)), 1);
198 PUSH_DATA (push, s->width << 16 | s->height);
199
200 tx_format |= get_tex_format_rect(ti);
201 } else {
202 tx_format |= get_tex_format_pot(ti);
203 }
204
205 if (t->Sampler.MinFilter != GL_NEAREST &&
206 t->Sampler.MinFilter != GL_LINEAR) {
207 int lod_min = t->Sampler.MinLod;
208 int lod_max = MIN2(t->Sampler.MaxLod, t->_MaxLambda);
209 int lod_bias = t->Sampler.LodBias
210 + ctx->Texture.Unit[i].LodBias;
211
212 lod_max = CLAMP(lod_max, 0, 15);
213 lod_min = CLAMP(lod_min, 0, 15);
214 lod_bias = CLAMP(lod_bias, 0, 15);
215
216 tx_format |= NV20_3D_TEX_FORMAT_MIPMAP;
217 tx_filter |= lod_bias << 8;
218 tx_enable |= lod_min << 26
219 | lod_max << 14;
220 }
221
222 /* Write it to the hardware. */
223 BEGIN_NV04(push, NV20_3D(TEX_FORMAT(i)), 1);
224 PUSH_MTHD (push, NV20_3D(TEX_FORMAT(i)), BUFCTX_TEX(i),
225 s->bo, tx_format, bo_flags | NOUVEAU_BO_OR,
226 NV20_3D_TEX_FORMAT_DMA0,
227 NV20_3D_TEX_FORMAT_DMA1);
228
229 BEGIN_NV04(push, NV20_3D(TEX_OFFSET(i)), 1);
230 PUSH_MTHDl(push, NV20_3D(TEX_OFFSET(i)), BUFCTX_TEX(i),
231 s->bo, s->offset, bo_flags);
232
233 BEGIN_NV04(push, NV20_3D(TEX_WRAP(i)), 1);
234 PUSH_DATA (push, tx_wrap);
235
236 BEGIN_NV04(push, NV20_3D(TEX_FILTER(i)), 1);
237 PUSH_DATA (push, tx_filter);
238
239 BEGIN_NV04(push, NV20_3D(TEX_ENABLE(i)), 1);
240 PUSH_DATA (push, tx_enable);
241
242 context_dirty(ctx, TEX_SHADER);
243 }
244
245 void
246 nv20_emit_tex_shader(struct gl_context *ctx, int emit)
247 {
248 struct nouveau_pushbuf *push = context_push(ctx);
249 uint32_t tx_shader_op = 0;
250 int i;
251
252 for (i = 0; i < NV20_TEXTURE_UNITS; i++) {
253 if (!ctx->Texture.Unit[i]._ReallyEnabled)
254 continue;
255
256 tx_shader_op |= NV20_3D_TEX_SHADER_OP_TX0_TEXTURE_2D << 5 * i;
257 }
258
259 BEGIN_NV04(push, NV20_3D(TEX_SHADER_OP), 1);
260 PUSH_DATA (push, tx_shader_op);
261 }