1 /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h,v 1.24 2002/12/16 16:19:10 dawes Exp $ */
3 * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
4 * Precision Insight, Inc., Cedar Park, Texas, and
5 * VA Linux Systems Inc., Fremont, California.
9 * Permission is hereby granted, free of charge, to any person obtaining
10 * a copy of this software and associated documentation files (the
11 * "Software"), to deal in the Software without restriction, including
12 * without limitation on the rights to use, copy, modify, merge,
13 * publish, distribute, sublicense, and/or sell copies of the Software,
14 * and to permit persons to whom the Software is furnished to do so,
15 * subject to the following conditions:
17 * The above copyright notice and this permission notice (including the
18 * next paragraph) shall be included in all copies or substantial
19 * portions of the Software.
21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
22 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
23 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
24 * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
25 * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
26 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
27 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
28 * OTHER DEALINGS IN THE SOFTWARE.
33 * Rickard E. Faith <faith@valinux.com>
34 * Kevin E. Martin <martin@valinux.com>
43 #define R128_DEBUG 0 /* Turn off debugging output */
44 #define R128_IDLE_RETRY 32 /* Fall out of idle loops after this count */
45 #define R128_TIMEOUT 2000000 /* Fall out of wait loops after this count */
46 #define R128_MMIOSIZE 0x4000
48 #define R128_VBIOS_SIZE 0x00010000
51 #define R128TRACE(x) \
53 ErrorF("(**) %s(%d): ", R128_NAME, pScrn->scrnIndex); \
62 #define R128_ARRAY_SIZE(x) (sizeof(x)/sizeof(x[0]))
63 #define R128_ALIGN(x,bytes) (((x) + ((bytes) - 1)) & ~((bytes) - 1))
64 #define R128PTR(pScrn) ((R128InfoPtr)(pScrn)->driverPrivate)
67 * \brief Chip families.
75 typedef struct { /* All values in XCLKS */
76 int ML
; /* Memory Read Latency */
77 int MB
; /* Memory Burst Length */
78 int Trcd
; /* RAS to CAS delay */
79 int Trp
; /* RAS percentage */
80 int Twr
; /* Write Recovery */
81 int CL
; /* CAS Latency */
82 int Tr2w
; /* Read to Write Delay */
83 int Rloop
; /* Loop Latency */
84 int Rloop_fudge
; /* Add to ML to get Rloop */
86 } R128RAMRec
, *R128RAMPtr
;
89 /* Common registers */
91 u_int32_t ovr_wid_left_right
;
92 u_int32_t ovr_wid_top_bottom
;
93 u_int32_t ov0_scale_cntl
;
94 u_int32_t mpp_tb_config
;
95 u_int32_t mpp_gp_config
;
96 u_int32_t subpic_cntl
;
97 u_int32_t viph_control
;
99 u_int32_t gen_int_cntl
;
100 u_int32_t cap0_trig_cntl
;
101 u_int32_t cap1_trig_cntl
;
103 u_int32_t config_cntl
;
105 /* Other registers to save for VT switches */
106 u_int32_t dp_datatype
;
107 u_int32_t gen_reset_cntl
;
108 u_int32_t clock_cntl_index
;
109 u_int32_t amcgpio_en_reg
;
110 u_int32_t amcgpio_mask
;
113 u_int32_t crtc_gen_cntl
;
114 u_int32_t crtc_ext_cntl
;
116 u_int32_t crtc_h_total_disp
;
117 u_int32_t crtc_h_sync_strt_wid
;
118 u_int32_t crtc_v_total_disp
;
119 u_int32_t crtc_v_sync_strt_wid
;
120 u_int32_t crtc_offset
;
121 u_int32_t crtc_offset_cntl
;
122 u_int32_t crtc_pitch
;
124 /* CRTC2 registers */
125 u_int32_t crtc2_gen_cntl
;
127 /* Flat panel registers */
128 u_int32_t fp_crtc_h_total_disp
;
129 u_int32_t fp_crtc_v_total_disp
;
130 u_int32_t fp_gen_cntl
;
131 u_int32_t fp_h_sync_strt_wid
;
132 u_int32_t fp_horz_stretch
;
133 u_int32_t fp_panel_cntl
;
134 u_int32_t fp_v_sync_strt_wid
;
135 u_int32_t fp_vert_stretch
;
136 u_int32_t lvds_gen_cntl
;
138 u_int32_t tmds_transmitter_cntl
;
140 /* Computed values for PLL */
141 u_int32_t dot_clock_freq
;
142 u_int32_t pll_output_freq
;
147 u_int32_t ppll_ref_div
;
148 u_int32_t ppll_div_3
;
149 u_int32_t htotal_cntl
;
152 u_int32_t dda_config
;
153 u_int32_t dda_on_off
;
156 GLboolean palette_valid
;
157 u_int32_t palette
[256];
158 } R128SaveRec
, *R128SavePtr
;
166 unsigned long LinearAddr
; /* Frame buffer physical address */
167 unsigned long BIOSAddr
; /* BIOS physical address */
169 unsigned char *MMIO
; /* Map of MMIO region */
170 unsigned char *FB
; /* Map of frame buffer */
174 unsigned long FbMapSize
; /* Size of frame buffer, in bytes */
175 int Flags
; /* Saved copy of mode flags */
177 /* Computed values for FPs */
188 unsigned long cursor_start
;
189 unsigned long cursor_end
;
192 * XAAForceTransBlit is used to change the behavior of the XAA
193 * SetupForScreenToScreenCopy function, to make it DGA-friendly.
195 GLboolean XAAForceTransBlit
;
197 int fifo_slots
; /* Free slots in the FIFO (64 max) */
198 int pix24bpp
; /* Depth of pixmap for 24bpp framebuffer */
199 GLboolean dac6bits
; /* Use 6 bit DAC? */
201 /* Computed values for Rage 128 */
204 u_int32_t dp_gui_master_cntl
;
206 /* Saved values for ScreenToScreenCopy */
210 /* ScanlineScreenToScreenColorExpand support */
211 unsigned char *scratch_buffer
[1];
212 unsigned char *scratch_save
;
227 int scanline_bpp
; /* Only used for ImageWrite */
229 drm_context_t drmCtx
;
231 drmSize registerSize
;
232 drm_handle_t registerHandle
;
234 GLboolean IsPCI
; /* Current card is a PCI card */
236 drm_handle_t pciMemHandle
;
237 unsigned char *PCI
; /* Map */
239 GLboolean allowPageFlip
; /* Enable 3d page flipping */
240 GLboolean have3DWindows
; /* Are there any 3d clients? */
244 drm_handle_t agpMemHandle
; /* Handle from drmAgpAlloc */
245 unsigned long agpOffset
;
246 unsigned char *AGP
; /* Map */
249 GLboolean CCEInUse
; /* CCE is currently active */
250 int CCEMode
; /* CCE mode that server/clients use */
251 int CCEFifoSize
; /* Size of the CCE command FIFO */
252 GLboolean CCESecure
; /* CCE security enabled */
253 int CCEusecTimeout
; /* CCE timeout in usecs */
255 /* CCE ring buffer data */
256 unsigned long ringStart
; /* Offset into AGP space */
257 drm_handle_t ringHandle
; /* Handle from drmAddMap */
258 drmSize ringMapSize
; /* Size of map */
259 int ringSize
; /* Size of ring (in MB) */
260 unsigned char *ring
; /* Map */
263 unsigned long ringReadOffset
; /* Offset into AGP space */
264 drm_handle_t ringReadPtrHandle
; /* Handle from drmAddMap */
265 drmSize ringReadMapSize
; /* Size of map */
266 unsigned char *ringReadPtr
; /* Map */
268 /* CCE vertex/indirect buffer data */
269 unsigned long bufStart
; /* Offset into AGP space */
270 drm_handle_t bufHandle
; /* Handle from drmAddMap */
271 drmSize bufMapSize
; /* Size of map */
272 int bufSize
; /* Size of buffers (in MB) */
273 unsigned char *buf
; /* Map */
274 int bufNumBufs
; /* Number of buffers */
275 drmBufMapPtr buffers
; /* Buffer map */
277 /* CCE AGP Texture data */
278 unsigned long agpTexStart
; /* Offset into AGP space */
279 drm_handle_t agpTexHandle
; /* Handle from drmAddMap */
280 drmSize agpTexMapSize
; /* Size of map */
281 int agpTexSize
; /* Size of AGP tex space (in MB) */
282 unsigned char *agpTex
; /* Map */
285 /* CCE 2D accleration */
286 drmBufPtr indirectBuffer
;
289 /* DRI screen private data */
308 /* Saved scissor values */
314 u_int32_t re_top_left
;
315 u_int32_t re_width_height
;
317 u_int32_t aux_sc_cntl
;
320 u_int32_t gen_int_cntl
;
324 } R128InfoRec
, *R128InfoPtr
;
326 #define R128WaitForFifo(pScrn, entries) \
328 if (info->fifo_slots < entries) R128WaitForFifoFunction(pScrn, entries); \
329 info->fifo_slots -= entries; \
332 extern void r128WaitForFifoFunction(const DRIDriverContext
*ctx
, int entries
);
333 extern void r128WaitForIdle(const DRIDriverContext
*ctx
);
335 extern void r128WaitForVerticalSync(const DRIDriverContext
*ctx
);
337 extern GLboolean
r128AccelInit(const DRIDriverContext
*ctx
);
338 extern void r128EngineInit(const DRIDriverContext
*ctx
);
339 extern GLboolean
r128CursorInit(const DRIDriverContext
*ctx
);
340 extern GLboolean
r128DGAInit(const DRIDriverContext
*ctx
);
342 extern void r128InitVideo(const DRIDriverContext
*ctx
);
344 extern GLboolean
r128DRIScreenInit(const DRIDriverContext
*ctx
);
345 extern void r128DRICloseScreen(const DRIDriverContext
*ctx
);
346 extern GLboolean
r128DRIFinishScreenInit(const DRIDriverContext
*ctx
);
348 #define R128CCE_START(ctx, info) \
350 int _ret = drmCommandNone(ctx->drmFD, DRM_R128_CCE_START); \
353 "%s: CCE start %d\n", __FUNCTION__, _ret); \
357 #define R128CCE_STOP(ctx, info) \
359 int _ret = R128CCEStop(ctx); \
362 "%s: CCE stop %d\n", __FUNCTION__, _ret); \
366 #define R128CCE_RESET(ctx, info) \
368 if (info->directRenderingEnabled \
369 && R128CCE_USE_RING_BUFFER(info->CCEMode)) { \
370 int _ret = drmCommandNone(info->drmFD, DRM_R128_CCE_RESET); \
373 "%s: CCE reset %d\n", __FUNCTION__, _ret); \
379 #define CCE_PACKET0( reg, n ) \
380 (R128_CCE_PACKET0 | ((n) << 16) | ((reg) >> 2))
381 #define CCE_PACKET1( reg0, reg1 ) \
382 (R128_CCE_PACKET1 | (((reg1) >> 2) << 11) | ((reg0) >> 2))
383 #define CCE_PACKET2() \
385 #define CCE_PACKET3( pkt, n ) \
386 (R128_CCE_PACKET3 | (pkt) | ((n) << 16))
389 #define R128_VERBOSE 0
391 #define RING_LOCALS u_int32_t *__head; int __count;
393 #define R128CCE_REFRESH(pScrn, info) \
395 if ( R128_VERBOSE ) { \
396 fprintf(stderr, "REFRESH( %d ) in %s\n", \
397 !info->CCEInUse , __FUNCTION__ ); \
399 if ( !info->CCEInUse ) { \
400 R128CCEWaitForIdle(pScrn); \
402 OUT_RING_REG( R128_RE_TOP_LEFT, info->re_top_left ); \
403 OUT_RING_REG( R128_RE_WIDTH_HEIGHT, info->re_width_height ); \
404 OUT_RING_REG( R128_AUX_SC_CNTL, info->aux_sc_cntl ); \
406 info->CCEInUse = TRUE; \
410 #define BEGIN_RING( n ) do { \
411 if ( R128_VERBOSE ) { \
413 "BEGIN_RING( %d ) in %s\n", n, __FUNCTION__ ); \
415 if ( !info->indirectBuffer ) { \
416 info->indirectBuffer = R128CCEGetBuffer( pScrn ); \
417 info->indirectStart = 0; \
418 } else if ( (info->indirectBuffer->used + 4*(n)) > \
419 info->indirectBuffer->total ) { \
420 R128CCEFlushIndirect( pScrn, 1 ); \
422 __head = (pointer)((char *)info->indirectBuffer->address + \
423 info->indirectBuffer->used); \
427 #define ADVANCE_RING() do { \
428 if ( R128_VERBOSE ) { \
430 "ADVANCE_RING() used: %d+%d=%d/%d\n", \
431 info->indirectBuffer->used - info->indirectStart, \
432 __count * sizeof(u_int32_t), \
433 info->indirectBuffer->used - info->indirectStart + \
434 __count * sizeof(u_int32_t), \
435 info->indirectBuffer->total - info->indirectStart ); \
437 info->indirectBuffer->used += __count * (int)sizeof(u_int32_t); \
440 #define OUT_RING( x ) do { \
441 if ( R128_VERBOSE ) { \
443 " OUT_RING( 0x%08x )\n", (unsigned int)(x) ); \
445 MMIO_OUT32(&__head[__count++], 0, (x)); \
448 #define OUT_RING_REG( reg, val ) \
450 OUT_RING( CCE_PACKET0( reg, 0 ) ); \
454 #define FLUSH_RING() \
456 if ( R128_VERBOSE ) \
458 "FLUSH_RING in %s\n", __FUNCTION__ ); \
459 if ( info->indirectBuffer ) { \
460 R128CCEFlushIndirect( pScrn, 0 ); \