src/mesa/drivers/dri/r128/server/r128.h

   1 /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h,v 1.24 2002/12/16 16:19:10 dawes Exp $ */
   2 /*
   3  * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
   4  *                      Precision Insight, Inc., Cedar Park, Texas, and
   5  *                      VA Linux Systems Inc., Fremont, California.
   6  *
   7  * All Rights Reserved.
   8  *
   9  * Permission is hereby granted, free of charge, to any person obtaining
  10  * a copy of this software and associated documentation files (the
  11  * "Software"), to deal in the Software without restriction, including
  12  * without limitation on the rights to use, copy, modify, merge,
  13  * publish, distribute, sublicense, and/or sell copies of the Software,
  14  * and to permit persons to whom the Software is furnished to do so,
  15  * subject to the following conditions:
  16  *
  17  * The above copyright notice and this permission notice (including the
  18  * next paragraph) shall be included in all copies or substantial
  19  * portions of the Software.
  20  *
  21  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  22  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  23  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  24  * NON-INFRINGEMENT.  IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
  25  * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  26  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  27  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  28  * OTHER DEALINGS IN THE SOFTWARE.
  29  */
  30
  31 /*
  32  * Authors:
  33  *   Rickard E. Faith <faith@valinux.com>
  34  *   Kevin E. Martin <martin@valinux.com>
  35  *
  36  */
  37
  38 #ifndef _R128_H_
  39 #define _R128_H_
  40
  41 #include "dri_util.h"
  42
  43 #define R128_DEBUG          0   /* Turn off debugging output               */
  44 #define R128_IDLE_RETRY    32   /* Fall out of idle loops after this count */
  45 #define R128_TIMEOUT  2000000   /* Fall out of wait loops after this count */
  46 #define R128_MMIOSIZE  0x4000
  47
  48 #define R128_VBIOS_SIZE 0x00010000
  49
  50 #if R128_DEBUG
  51 #define R128TRACE(x)                                          \
  52     do {                                                      \
  53         ErrorF("(**) %s(%d): ", R128_NAME, pScrn->scrnIndex); \
  54         ErrorF x;                                             \
  55     } while (0);
  56 #else
  57 #define R128TRACE(x)
  58 #endif
  59
  60
  61 /* Other macros */
  62 #define R128_ARRAY_SIZE(x)  (sizeof(x)/sizeof(x[0]))
  63 #define R128_ALIGN(x,bytes) (((x) + ((bytes) - 1)) & ~((bytes) - 1))
  64 #define R128PTR(pScrn) ((R128InfoPtr)(pScrn)->driverPrivate)
  65
  66 /**
  67  * \brief Chip families.
  68  */
  69 typedef enum {
  70     CHIP_FAMILY_UNKNOWN,
  71     CHIP_FAMILY_R128_PCI,
  72     CHIP_FAMILY_R128_AGP,
  73 } R128ChipFamily;
  74
  75 typedef struct {        /* All values in XCLKS    */
  76     int  ML;            /* Memory Read Latency    */
  77     int  MB;            /* Memory Burst Length    */
  78     int  Trcd;          /* RAS to CAS delay       */
  79     int  Trp;           /* RAS percentage         */
  80     int  Twr;           /* Write Recovery         */
  81     int  CL;            /* CAS Latency            */
  82     int  Tr2w;          /* Read to Write Delay    */
  83     int  Rloop;         /* Loop Latency           */
  84     int  Rloop_fudge;   /* Add to ML to get Rloop */
  85     char *name;
  86 } R128RAMRec, *R128RAMPtr;
  87
  88 typedef struct {
  89                                 /* Common registers */
  90     uint32_t     ovr_clr;
  91     uint32_t     ovr_wid_left_right;
  92     uint32_t     ovr_wid_top_bottom;
  93     uint32_t     ov0_scale_cntl;
  94     uint32_t     mpp_tb_config;
  95     uint32_t     mpp_gp_config;
  96     uint32_t     subpic_cntl;
  97     uint32_t     viph_control;
  98     uint32_t     i2c_cntl_1;
  99     uint32_t     gen_int_cntl;
 100     uint32_t     cap0_trig_cntl;
 101     uint32_t     cap1_trig_cntl;
 102     uint32_t     bus_cntl;
 103     uint32_t     config_cntl;
 104
 105                                 /* Other registers to save for VT switches */
 106     uint32_t     dp_datatype;
 107     uint32_t     gen_reset_cntl;
 108     uint32_t     clock_cntl_index;
 109     uint32_t     amcgpio_en_reg;
 110     uint32_t     amcgpio_mask;
 111
 112                                 /* CRTC registers */
 113     uint32_t     crtc_gen_cntl;
 114     uint32_t     crtc_ext_cntl;
 115     uint32_t     dac_cntl;
 116     uint32_t     crtc_h_total_disp;
 117     uint32_t     crtc_h_sync_strt_wid;
 118     uint32_t     crtc_v_total_disp;
 119     uint32_t     crtc_v_sync_strt_wid;
 120     uint32_t     crtc_offset;
 121     uint32_t     crtc_offset_cntl;
 122     uint32_t     crtc_pitch;
 123
 124                                 /* CRTC2 registers */
 125     uint32_t     crtc2_gen_cntl;
 126
 127                                 /* Flat panel registers */
 128     uint32_t     fp_crtc_h_total_disp;
 129     uint32_t     fp_crtc_v_total_disp;
 130     uint32_t     fp_gen_cntl;
 131     uint32_t     fp_h_sync_strt_wid;
 132     uint32_t     fp_horz_stretch;
 133     uint32_t     fp_panel_cntl;
 134     uint32_t     fp_v_sync_strt_wid;
 135     uint32_t     fp_vert_stretch;
 136     uint32_t     lvds_gen_cntl;
 137     uint32_t     tmds_crc;
 138     uint32_t     tmds_transmitter_cntl;
 139
 140                                 /* Computed values for PLL */
 141     uint32_t     dot_clock_freq;
 142     uint32_t     pll_output_freq;
 143     int        feedback_div;
 144     int        post_div;
 145
 146                                 /* PLL registers */
 147     uint32_t     ppll_ref_div;
 148     uint32_t     ppll_div_3;
 149     uint32_t     htotal_cntl;
 150
 151                                 /* DDA register */
 152     uint32_t     dda_config;
 153     uint32_t     dda_on_off;
 154
 155                                 /* Pallet */
 156     GLboolean  palette_valid;
 157     uint32_t     palette[256];
 158 } R128SaveRec, *R128SavePtr;
 159
 160 typedef struct {
 161     int               Chipset;
 162     GLboolean              Primary;
 163
 164     GLboolean              FBDev;
 165
 166     unsigned long     LinearAddr;   /* Frame buffer physical address         */
 167     unsigned long     BIOSAddr;     /* BIOS physical address                 */
 168
 169     unsigned char     *MMIO;        /* Map of MMIO region                    */
 170     unsigned char     *FB;          /* Map of frame buffer                   */
 171
 172     uint32_t            MemCntl;
 173     uint32_t            BusCntl;
 174     unsigned long     FbMapSize;    /* Size of frame buffer, in bytes        */
 175     int               Flags;        /* Saved copy of mode flags              */
 176
 177                                 /* Computed values for FPs */
 178     int               PanelXRes;
 179     int               PanelYRes;
 180     int               HOverPlus;
 181     int               HSyncWidth;
 182     int               HBlank;
 183     int               VOverPlus;
 184     int               VSyncWidth;
 185     int               VBlank;
 186     int               PanelPwrDly;
 187
 188     unsigned long     cursor_start;
 189     unsigned long     cursor_end;
 190
 191     /*
 192      * XAAForceTransBlit is used to change the behavior of the XAA
 193      * SetupForScreenToScreenCopy function, to make it DGA-friendly.
 194      */
 195     GLboolean              XAAForceTransBlit;
 196
 197     int               fifo_slots;   /* Free slots in the FIFO (64 max)       */
 198     int               pix24bpp;     /* Depth of pixmap for 24bpp framebuffer */
 199     GLboolean              dac6bits;     /* Use 6 bit DAC?                        */
 200
 201                                 /* Computed values for Rage 128 */
 202     int               pitch;
 203     int               datatype;
 204     uint32_t            dp_gui_master_cntl;
 205
 206                                 /* Saved values for ScreenToScreenCopy */
 207     int               xdir;
 208     int               ydir;
 209
 210                                 /* ScanlineScreenToScreenColorExpand support */
 211     unsigned char     *scratch_buffer[1];
 212     unsigned char     *scratch_save;
 213     int               scanline_x;
 214     int               scanline_y;
 215     int               scanline_w;
 216     int               scanline_h;
 217
 218     int               scanline_hpass;
 219     int               scanline_x1clip;
 220     int               scanline_x2clip;
 221     int               scanline_rop;
 222     int               scanline_fg;
 223     int               scanline_bg;
 224
 225     int               scanline_words;
 226     int               scanline_direct;
 227     int               scanline_bpp; /* Only used for ImageWrite */
 228
 229     drm_context_t        drmCtx;
 230
 231     drmSize           registerSize;
 232     drm_handle_t         registerHandle;
 233
 234     GLboolean         IsPCI;            /* Current card is a PCI card */
 235     drmSize           pciSize;
 236     drm_handle_t         pciMemHandle;
 237     unsigned char     *PCI;             /* Map */
 238
 239     GLboolean         allowPageFlip;    /* Enable 3d page flipping */
 240     GLboolean         have3DWindows;    /* Are there any 3d clients? */
 241     int               drmMinor;
 242
 243     drmSize           agpSize;
 244     drm_handle_t         agpMemHandle;     /* Handle from drmAgpAlloc */
 245     unsigned long     agpOffset;
 246     unsigned char     *AGP;             /* Map */
 247     int               agpMode;
 248
 249     GLboolean         CCEInUse;         /* CCE is currently active */
 250     int               CCEMode;          /* CCE mode that server/clients use */
 251     int               CCEFifoSize;      /* Size of the CCE command FIFO */
 252     GLboolean         CCESecure;        /* CCE security enabled */
 253     int               CCEusecTimeout;   /* CCE timeout in usecs */
 254
 255                                 /* CCE ring buffer data */
 256     unsigned long     ringStart;        /* Offset into AGP space */
 257     drm_handle_t         ringHandle;       /* Handle from drmAddMap */
 258     drmSize           ringMapSize;      /* Size of map */
 259     int               ringSize;         /* Size of ring (in MB) */
 260     unsigned char     *ring;            /* Map */
 261     int               ringSizeLog2QW;
 262
 263     unsigned long     ringReadOffset;   /* Offset into AGP space */
 264     drm_handle_t         ringReadPtrHandle; /* Handle from drmAddMap */
 265     drmSize           ringReadMapSize;  /* Size of map */
 266     unsigned char     *ringReadPtr;     /* Map */
 267
 268                                 /* CCE vertex/indirect buffer data */
 269     unsigned long     bufStart;        /* Offset into AGP space */
 270     drm_handle_t         bufHandle;       /* Handle from drmAddMap */
 271     drmSize           bufMapSize;      /* Size of map */
 272     int               bufSize;         /* Size of buffers (in MB) */
 273     unsigned char     *buf;            /* Map */
 274     int               bufNumBufs;      /* Number of buffers */
 275     drmBufMapPtr      buffers;         /* Buffer map */
 276
 277                                 /* CCE AGP Texture data */
 278     unsigned long     agpTexStart;      /* Offset into AGP space */
 279     drm_handle_t         agpTexHandle;     /* Handle from drmAddMap */
 280     drmSize           agpTexMapSize;    /* Size of map */
 281     int               agpTexSize;       /* Size of AGP tex space (in MB) */
 282     unsigned char     *agpTex;          /* Map */
 283     int               log2AGPTexGran;
 284
 285                                 /* CCE 2D accleration */
 286     drmBufPtr         indirectBuffer;
 287     int               indirectStart;
 288
 289                                 /* DRI screen private data */
 290     int               fbX;
 291     int               fbY;
 292     int               backX;
 293     int               backY;
 294     int               depthX;
 295     int               depthY;
 296
 297     int               frontOffset;
 298     int               frontPitch;
 299     int               backOffset;
 300     int               backPitch;
 301     int               depthOffset;
 302     int               depthPitch;
 303     int               spanOffset;
 304     int               textureOffset;
 305     int               textureSize;
 306     int               log2TexGran;
 307
 308                                 /* Saved scissor values */
 309     uint32_t            sc_left;
 310     uint32_t            sc_right;
 311     uint32_t            sc_top;
 312     uint32_t            sc_bottom;
 313
 314     uint32_t            re_top_left;
 315     uint32_t            re_width_height;
 316
 317     uint32_t            aux_sc_cntl;
 318
 319     int               irq;
 320     uint32_t            gen_int_cntl;
 321
 322     GLboolean              DMAForXv;
 323
 324 } R128InfoRec, *R128InfoPtr;
 325
 326 #define R128WaitForFifo(pScrn, entries)                                      \
 327 do {                                                                         \
 328     if (info->fifo_slots < entries) R128WaitForFifoFunction(pScrn, entries); \
 329     info->fifo_slots -= entries;                                             \
 330 } while (0)
 331
 332 extern void        r128WaitForFifoFunction(const DRIDriverContext *ctx, int entries);
 333 extern void        r128WaitForIdle(const DRIDriverContext *ctx);
 334
 335 extern void        r128WaitForVerticalSync(const DRIDriverContext *ctx);
 336
 337 extern GLboolean        r128AccelInit(const DRIDriverContext *ctx);
 338 extern void        r128EngineInit(const DRIDriverContext *ctx);
 339 extern GLboolean        r128CursorInit(const DRIDriverContext *ctx);
 340 extern GLboolean        r128DGAInit(const DRIDriverContext *ctx);
 341
 342 extern void        r128InitVideo(const DRIDriverContext *ctx);
 343
 344 extern GLboolean        r128DRIScreenInit(const DRIDriverContext *ctx);
 345 extern void        r128DRICloseScreen(const DRIDriverContext *ctx);
 346 extern GLboolean        r128DRIFinishScreenInit(const DRIDriverContext *ctx);
 347
 348 #define R128CCE_START(ctx, info)                                        \
 349 do {                                                                    \
 350     int _ret = drmCommandNone(ctx->drmFD, DRM_R128_CCE_START);          \
 351     if (_ret) {                                                         \
 352            fprintf(stderr,                              \
 353                    "%s: CCE start %d\n", __FUNCTION__, _ret);           \
 354     }                                                                   \
 355 } while (0)
 356
 357 #define R128CCE_STOP(ctx, info)                                 \
 358 do {                                                                    \
 359     int _ret = R128CCEStop(ctx);                                        \
 360     if (_ret) {                                                         \
 361            fprintf(stderr,                              \
 362                    "%s: CCE stop %d\n", __FUNCTION__, _ret);            \
 363     }                                                                   \
 364 } while (0)
 365
 366 #define R128CCE_RESET(ctx, info)                                        \
 367 do {                                                                    \
 368     if (info->directRenderingEnabled                                    \
 369         && R128CCE_USE_RING_BUFFER(info->CCEMode)) {                    \
 370         int _ret = drmCommandNone(info->drmFD, DRM_R128_CCE_RESET);     \
 371         if (_ret) {                                                     \
 372                fprintf(stderr,                  \
 373                        "%s: CCE reset %d\n", __FUNCTION__, _ret);       \
 374         }                                                               \
 375     }                                                                   \
 376 } while (0)
 377
 378
 379 #define CCE_PACKET0( reg, n )                                           \
 380         (R128_CCE_PACKET0 | ((n) << 16) | ((reg) >> 2))
 381 #define CCE_PACKET1( reg0, reg1 )                                       \
 382         (R128_CCE_PACKET1 | (((reg1) >> 2) << 11) | ((reg0) >> 2))
 383 #define CCE_PACKET2()                                                   \
 384         (R128_CCE_PACKET2)
 385 #define CCE_PACKET3( pkt, n )                                           \
 386         (R128_CCE_PACKET3 | (pkt) | ((n) << 16))
 387
 388
 389 #define R128_VERBOSE    0
 390
 391 #define RING_LOCALS     uint32_t *__head; int __count;
 392
 393 #define R128CCE_REFRESH(pScrn, info)                                    \
 394 do {                                                                    \
 395    if ( R128_VERBOSE ) {                                                \
 396          fprintf(stderr, "REFRESH( %d ) in %s\n",       \
 397                   !info->CCEInUse , __FUNCTION__ );                     \
 398    }                                                                    \
 399    if ( !info->CCEInUse ) {                                             \
 400       R128CCEWaitForIdle(pScrn);                                        \
 401       BEGIN_RING( 6 );                                                  \
 402       OUT_RING_REG( R128_RE_TOP_LEFT,     info->re_top_left );          \
 403       OUT_RING_REG( R128_RE_WIDTH_HEIGHT, info->re_width_height );      \
 404       OUT_RING_REG( R128_AUX_SC_CNTL,     info->aux_sc_cntl );          \
 405       ADVANCE_RING();                                                   \
 406       info->CCEInUse = TRUE;                                            \
 407    }                                                                    \
 408 } while (0)
 409
 410 #define BEGIN_RING( n ) do {                                            \
 411    if ( R128_VERBOSE ) {                                                \
 412          fprintf(stderr,                                \
 413                   "BEGIN_RING( %d ) in %s\n", n, __FUNCTION__ );        \
 414    }                                                                    \
 415    if ( !info->indirectBuffer ) {                                       \
 416       info->indirectBuffer = R128CCEGetBuffer( pScrn );                 \
 417       info->indirectStart = 0;                                          \
 418    } else if ( (info->indirectBuffer->used + 4*(n)) >                   \
 419                 info->indirectBuffer->total ) {                         \
 420       R128CCEFlushIndirect( pScrn, 1 );                                 \
 421    }                                                                    \
 422    __head = (pointer)((char *)info->indirectBuffer->address +           \
 423                        info->indirectBuffer->used);                     \
 424    __count = 0;                                                         \
 425 } while (0)
 426
 427 #define ADVANCE_RING() do {                                             \
 428    if ( R128_VERBOSE ) {                                                \
 429          fprintf(stderr,                                \
 430                   "ADVANCE_RING() used: %d+%d=%d/%d\n",                 \
 431                   info->indirectBuffer->used - info->indirectStart,     \
 432                   __count * sizeof(uint32_t),                           \
 433                   info->indirectBuffer->used - info->indirectStart +    \
 434                   __count * sizeof(uint32_t),                           \
 435                   info->indirectBuffer->total - info->indirectStart );  \
 436    }                                                                    \
 437    info->indirectBuffer->used += __count * (int)sizeof(uint32_t);               \
 438 } while (0)
 439
 440 #define OUT_RING( x ) do {                                              \
 441    if ( R128_VERBOSE ) {                                                \
 442          fprintf(stderr,                                \
 443                   "   OUT_RING( 0x%08x )\n", (unsigned int)(x) );       \
 444    }                                                                    \
 445    MMIO_OUT32(&__head[__count++], 0, (x));                              \
 446 } while (0)
 447
 448 #define OUT_RING_REG( reg, val )                                        \
 449 do {                                                                    \
 450    OUT_RING( CCE_PACKET0( reg, 0 ) );                                   \
 451    OUT_RING( val );                                                     \
 452 } while (0)
 453
 454 #define FLUSH_RING()                                                    \
 455 do {                                                                    \
 456    if ( R128_VERBOSE )                                                  \
 457          fprintf(stderr,                                \
 458                   "FLUSH_RING in %s\n", __FUNCTION__ );                 \
 459    if ( info->indirectBuffer ) {                                        \
 460       R128CCEFlushIndirect( pScrn, 0 );                                 \
 461    }                                                                    \
 462 } while (0)
 463
 464
 465 #endif