Merge branch 'glsl2-head' into glsl2
[mesa.git] / src / mesa / drivers / dri / r128 / server / r128_reg.h
1 /*
2 * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
3 * Precision Insight, Inc., Cedar Park, Texas, and
4 * VA Linux Systems Inc., Fremont, California.
5 *
6 * All Rights Reserved.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining
9 * a copy of this software and associated documentation files (the
10 * "Software"), to deal in the Software without restriction, including
11 * without limitation on the rights to use, copy, modify, merge,
12 * publish, distribute, sublicense, and/or sell copies of the Software,
13 * and to permit persons to whom the Software is furnished to do so,
14 * subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the
17 * next paragraph) shall be included in all copies or substantial
18 * portions of the Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
23 * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
24 * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
25 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
26 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
27 * OTHER DEALINGS IN THE SOFTWARE.
28 */
29
30 /*
31 * Authors:
32 * Rickard E. Faith <faith@valinux.com>
33 * Kevin E. Martin <martin@valinux.com>
34 * Gareth Hughes <gareth@valinux.com>
35 *
36 * References:
37 *
38 * RAGE 128 VR/ RAGE 128 GL Register Reference Manual (Technical
39 * Reference Manual P/N RRG-G04100-C Rev. 0.04), ATI Technologies: April
40 * 1999.
41 *
42 * RAGE 128 Software Development Manual (Technical Reference Manual P/N
43 * SDK-G04000 Rev. 0.01), ATI Technologies: June 1999.
44 *
45 */
46
47 #ifndef _R128_REG_H_
48 #define _R128_REG_H_
49
50 #define R128_ADAPTER_ID 0x0f2c /* PCI */
51 #define R128_AGP_APER_OFFSET 0x0178
52 #define R128_AGP_BASE 0x0170
53 #define R128_AGP_CNTL 0x0174
54 # define R128_AGP_APER_SIZE_256MB (0x00 << 0)
55 # define R128_AGP_APER_SIZE_128MB (0x20 << 0)
56 # define R128_AGP_APER_SIZE_64MB (0x30 << 0)
57 # define R128_AGP_APER_SIZE_32MB (0x38 << 0)
58 # define R128_AGP_APER_SIZE_16MB (0x3c << 0)
59 # define R128_AGP_APER_SIZE_8MB (0x3e << 0)
60 # define R128_AGP_APER_SIZE_4MB (0x3f << 0)
61 # define R128_AGP_APER_SIZE_MASK (0x3f << 0)
62 #define R128_AGP_CNTL_B 0x0b44
63 #define R128_AGP_COMMAND 0x0f58 /* PCI */
64 #define R128_AGP_PLL_CNTL 0x0010 /* PLL */
65 #define R128_AGP_STATUS 0x0f54 /* PCI */
66 # define R128_AGP_1X_MODE 0x01
67 # define R128_AGP_2X_MODE 0x02
68 # define R128_AGP_4X_MODE 0x04
69 # define R128_AGP_MODE_MASK 0x07
70 #define R128_AMCGPIO_A_REG 0x01a0
71 #define R128_AMCGPIO_EN_REG 0x01a8
72 #define R128_AMCGPIO_MASK 0x0194
73 #define R128_AMCGPIO_Y_REG 0x01a4
74 #define R128_ATTRDR 0x03c1 /* VGA */
75 #define R128_ATTRDW 0x03c0 /* VGA */
76 #define R128_ATTRX 0x03c0 /* VGA */
77 #define R128_AUX_SC_CNTL 0x1660
78 # define R128_AUX1_SC_EN (1 << 0)
79 # define R128_AUX1_SC_MODE_OR (0 << 1)
80 # define R128_AUX1_SC_MODE_NAND (1 << 1)
81 # define R128_AUX2_SC_EN (1 << 2)
82 # define R128_AUX2_SC_MODE_OR (0 << 3)
83 # define R128_AUX2_SC_MODE_NAND (1 << 3)
84 # define R128_AUX3_SC_EN (1 << 4)
85 # define R128_AUX3_SC_MODE_OR (0 << 5)
86 # define R128_AUX3_SC_MODE_NAND (1 << 5)
87 #define R128_AUX1_SC_BOTTOM 0x1670
88 #define R128_AUX1_SC_LEFT 0x1664
89 #define R128_AUX1_SC_RIGHT 0x1668
90 #define R128_AUX1_SC_TOP 0x166c
91 #define R128_AUX2_SC_BOTTOM 0x1680
92 #define R128_AUX2_SC_LEFT 0x1674
93 #define R128_AUX2_SC_RIGHT 0x1678
94 #define R128_AUX2_SC_TOP 0x167c
95 #define R128_AUX3_SC_BOTTOM 0x1690
96 #define R128_AUX3_SC_LEFT 0x1684
97 #define R128_AUX3_SC_RIGHT 0x1688
98 #define R128_AUX3_SC_TOP 0x168c
99 #define R128_AUX_WINDOW_HORZ_CNTL 0x02d8
100 #define R128_AUX_WINDOW_VERT_CNTL 0x02dc
101
102 #define R128_BASE_CODE 0x0f0b
103 #define R128_BIOS_0_SCRATCH 0x0010
104 #define R128_BIOS_1_SCRATCH 0x0014
105 #define R128_BIOS_2_SCRATCH 0x0018
106 #define R128_BIOS_3_SCRATCH 0x001c
107 #define R128_BIOS_4_SCRATCH 0x0020
108 #define R128_BIOS_5_SCRATCH 0x0024
109 # define R128_BIOS_DISPLAY_FP (1 << 0)
110 # define R128_BIOS_DISPLAY_CRT (2 << 0)
111 # define R128_BIOS_DISPLAY_FP_CRT (3 << 0)
112 #define R128_BIOS_6_SCRATCH 0x0028
113 #define R128_BIOS_7_SCRATCH 0x002c
114 #define R128_BIOS_ROM 0x0f30 /* PCI */
115 #define R128_BIST 0x0f0f /* PCI */
116 #define R128_BM_CHUNK_0_VAL 0x0a18
117 # define R128_BM_PTR_FORCE_TO_PCI (1 << 21)
118 # define R128_BM_PM4_RD_FORCE_TO_PCI (1 << 22)
119 # define R128_BM_GLOBAL_FORCE_TO_PCI (1 << 23)
120 #define R128_BRUSH_DATA0 0x1480
121 #define R128_BRUSH_DATA1 0x1484
122 #define R128_BRUSH_DATA10 0x14a8
123 #define R128_BRUSH_DATA11 0x14ac
124 #define R128_BRUSH_DATA12 0x14b0
125 #define R128_BRUSH_DATA13 0x14b4
126 #define R128_BRUSH_DATA14 0x14b8
127 #define R128_BRUSH_DATA15 0x14bc
128 #define R128_BRUSH_DATA16 0x14c0
129 #define R128_BRUSH_DATA17 0x14c4
130 #define R128_BRUSH_DATA18 0x14c8
131 #define R128_BRUSH_DATA19 0x14cc
132 #define R128_BRUSH_DATA2 0x1488
133 #define R128_BRUSH_DATA20 0x14d0
134 #define R128_BRUSH_DATA21 0x14d4
135 #define R128_BRUSH_DATA22 0x14d8
136 #define R128_BRUSH_DATA23 0x14dc
137 #define R128_BRUSH_DATA24 0x14e0
138 #define R128_BRUSH_DATA25 0x14e4
139 #define R128_BRUSH_DATA26 0x14e8
140 #define R128_BRUSH_DATA27 0x14ec
141 #define R128_BRUSH_DATA28 0x14f0
142 #define R128_BRUSH_DATA29 0x14f4
143 #define R128_BRUSH_DATA3 0x148c
144 #define R128_BRUSH_DATA30 0x14f8
145 #define R128_BRUSH_DATA31 0x14fc
146 #define R128_BRUSH_DATA32 0x1500
147 #define R128_BRUSH_DATA33 0x1504
148 #define R128_BRUSH_DATA34 0x1508
149 #define R128_BRUSH_DATA35 0x150c
150 #define R128_BRUSH_DATA36 0x1510
151 #define R128_BRUSH_DATA37 0x1514
152 #define R128_BRUSH_DATA38 0x1518
153 #define R128_BRUSH_DATA39 0x151c
154 #define R128_BRUSH_DATA4 0x1490
155 #define R128_BRUSH_DATA40 0x1520
156 #define R128_BRUSH_DATA41 0x1524
157 #define R128_BRUSH_DATA42 0x1528
158 #define R128_BRUSH_DATA43 0x152c
159 #define R128_BRUSH_DATA44 0x1530
160 #define R128_BRUSH_DATA45 0x1534
161 #define R128_BRUSH_DATA46 0x1538
162 #define R128_BRUSH_DATA47 0x153c
163 #define R128_BRUSH_DATA48 0x1540
164 #define R128_BRUSH_DATA49 0x1544
165 #define R128_BRUSH_DATA5 0x1494
166 #define R128_BRUSH_DATA50 0x1548
167 #define R128_BRUSH_DATA51 0x154c
168 #define R128_BRUSH_DATA52 0x1550
169 #define R128_BRUSH_DATA53 0x1554
170 #define R128_BRUSH_DATA54 0x1558
171 #define R128_BRUSH_DATA55 0x155c
172 #define R128_BRUSH_DATA56 0x1560
173 #define R128_BRUSH_DATA57 0x1564
174 #define R128_BRUSH_DATA58 0x1568
175 #define R128_BRUSH_DATA59 0x156c
176 #define R128_BRUSH_DATA6 0x1498
177 #define R128_BRUSH_DATA60 0x1570
178 #define R128_BRUSH_DATA61 0x1574
179 #define R128_BRUSH_DATA62 0x1578
180 #define R128_BRUSH_DATA63 0x157c
181 #define R128_BRUSH_DATA7 0x149c
182 #define R128_BRUSH_DATA8 0x14a0
183 #define R128_BRUSH_DATA9 0x14a4
184 #define R128_BRUSH_SCALE 0x1470
185 #define R128_BRUSH_Y_X 0x1474
186 #define R128_BUS_CNTL 0x0030
187 # define R128_BUS_MASTER_DIS (1 << 6)
188 # define R128_BUS_RD_DISCARD_EN (1 << 24)
189 # define R128_BUS_RD_ABORT_EN (1 << 25)
190 # define R128_BUS_MSTR_DISCONNECT_EN (1 << 28)
191 # define R128_BUS_WRT_BURST (1 << 29)
192 # define R128_BUS_READ_BURST (1 << 30)
193 #define R128_BUS_CNTL1 0x0034
194 # define R128_BUS_WAIT_ON_LOCK_EN (1 << 4)
195
196 #define R128_CACHE_CNTL 0x1724
197 #define R128_CACHE_LINE 0x0f0c /* PCI */
198 #define R128_CAP0_TRIG_CNTL 0x0950 /* ? */
199 #define R128_CAP1_TRIG_CNTL 0x09c0 /* ? */
200 #define R128_CAPABILITIES_ID 0x0f50 /* PCI */
201 #define R128_CAPABILITIES_PTR 0x0f34 /* PCI */
202 #define R128_CLK_PIN_CNTL 0x0001 /* PLL */
203 #define R128_CLOCK_CNTL_DATA 0x000c
204 #define R128_CLOCK_CNTL_INDEX 0x0008
205 # define R128_PLL_WR_EN (1 << 7)
206 # define R128_PLL_DIV_SEL (3 << 8)
207 #define R128_CLR_CMP_CLR_3D 0x1a24
208 #define R128_CLR_CMP_CLR_DST 0x15c8
209 #define R128_CLR_CMP_CLR_SRC 0x15c4
210 #define R128_CLR_CMP_CNTL 0x15c0
211 # define R128_SRC_CMP_EQ_COLOR (4 << 0)
212 # define R128_SRC_CMP_NEQ_COLOR (5 << 0)
213 # define R128_CLR_CMP_SRC_SOURCE (1 << 24)
214 #define R128_CLR_CMP_MASK 0x15cc
215 # define R128_CLR_CMP_MSK 0xffffffff
216 #define R128_CLR_CMP_MASK_3D 0x1A28
217 #define R128_COMMAND 0x0f04 /* PCI */
218 #define R128_COMPOSITE_SHADOW_ID 0x1a0c
219 #define R128_CONFIG_APER_0_BASE 0x0100
220 #define R128_CONFIG_APER_1_BASE 0x0104
221 #define R128_CONFIG_APER_SIZE 0x0108
222 #define R128_CONFIG_BONDS 0x00e8
223 #define R128_CONFIG_CNTL 0x00e0
224 # define APER_0_BIG_ENDIAN_16BPP_SWAP (1 << 0)
225 # define APER_0_BIG_ENDIAN_32BPP_SWAP (2 << 0)
226 #define R128_CONFIG_MEMSIZE 0x00f8
227 #define R128_CONFIG_MEMSIZE_EMBEDDED 0x0114
228 #define R128_CONFIG_REG_1_BASE 0x010c
229 #define R128_CONFIG_REG_APER_SIZE 0x0110
230 #define R128_CONFIG_XSTRAP 0x00e4
231 #define R128_CONSTANT_COLOR_C 0x1d34
232 # define R128_CONSTANT_COLOR_MASK 0x00ffffff
233 # define R128_CONSTANT_COLOR_ONE 0x00ffffff
234 # define R128_CONSTANT_COLOR_ZERO 0x00000000
235 #define R128_CRC_CMDFIFO_ADDR 0x0740
236 #define R128_CRC_CMDFIFO_DOUT 0x0744
237 #define R128_CRTC_CRNT_FRAME 0x0214
238 #define R128_CRTC_DEBUG 0x021c
239 #define R128_CRTC_EXT_CNTL 0x0054
240 # define R128_CRTC_VGA_XOVERSCAN (1 << 0)
241 # define R128_VGA_ATI_LINEAR (1 << 3)
242 # define R128_XCRT_CNT_EN (1 << 6)
243 # define R128_CRTC_HSYNC_DIS (1 << 8)
244 # define R128_CRTC_VSYNC_DIS (1 << 9)
245 # define R128_CRTC_DISPLAY_DIS (1 << 10)
246 # define R128_CRTC_CRT_ON (1 << 15)
247 # define R128_FP_OUT_EN (1 << 22)
248 # define R128_FP_ACTIVE (1 << 23)
249 #define R128_CRTC_EXT_CNTL_DPMS_BYTE 0x0055
250 # define R128_CRTC_HSYNC_DIS_BYTE (1 << 0)
251 # define R128_CRTC_VSYNC_DIS_BYTE (1 << 1)
252 # define R128_CRTC_DISPLAY_DIS_BYTE (1 << 2)
253 #define R128_CRTC_GEN_CNTL 0x0050
254 # define R128_CRTC_DBL_SCAN_EN (1 << 0)
255 # define R128_CRTC_INTERLACE_EN (1 << 1)
256 # define R128_CRTC_CSYNC_EN (1 << 4)
257 # define R128_CRTC_CUR_EN (1 << 16)
258 # define R128_CRTC_CUR_MODE_MASK (7 << 17)
259 # define R128_CRTC_ICON_EN (1 << 20)
260 # define R128_CRTC_EXT_DISP_EN (1 << 24)
261 # define R128_CRTC_EN (1 << 25)
262 # define R128_CRTC_DISP_REQ_EN_B (1 << 26)
263 #define R128_CRTC_GUI_TRIG_VLINE 0x0218
264 #define R128_CRTC_H_SYNC_STRT_WID 0x0204
265 # define R128_CRTC_H_SYNC_STRT_PIX (0x07 << 0)
266 # define R128_CRTC_H_SYNC_STRT_CHAR (0x1ff << 3)
267 # define R128_CRTC_H_SYNC_STRT_CHAR_SHIFT 3
268 # define R128_CRTC_H_SYNC_WID (0x3f << 16)
269 # define R128_CRTC_H_SYNC_WID_SHIFT 16
270 # define R128_CRTC_H_SYNC_POL (1 << 23)
271 #define R128_CRTC_H_TOTAL_DISP 0x0200
272 # define R128_CRTC_H_TOTAL (0x01ff << 0)
273 # define R128_CRTC_H_TOTAL_SHIFT 0
274 # define R128_CRTC_H_DISP (0x00ff << 16)
275 # define R128_CRTC_H_DISP_SHIFT 16
276 #define R128_CRTC_OFFSET 0x0224
277 #define R128_CRTC_OFFSET_CNTL 0x0228
278 #define R128_CRTC_PITCH 0x022c
279 #define R128_CRTC_STATUS 0x005c
280 # define R128_CRTC_VBLANK_SAVE (1 << 1)
281 #define R128_CRTC_V_SYNC_STRT_WID 0x020c
282 # define R128_CRTC_V_SYNC_STRT (0x7ff << 0)
283 # define R128_CRTC_V_SYNC_STRT_SHIFT 0
284 # define R128_CRTC_V_SYNC_WID (0x1f << 16)
285 # define R128_CRTC_V_SYNC_WID_SHIFT 16
286 # define R128_CRTC_V_SYNC_POL (1 << 23)
287 #define R128_CRTC_V_TOTAL_DISP 0x0208
288 # define R128_CRTC_V_TOTAL (0x07ff << 0)
289 # define R128_CRTC_V_TOTAL_SHIFT 0
290 # define R128_CRTC_V_DISP (0x07ff << 16)
291 # define R128_CRTC_V_DISP_SHIFT 16
292 #define R128_CRTC_VLINE_CRNT_VLINE 0x0210
293 # define R128_CRTC_CRNT_VLINE_MASK (0x7ff << 16)
294 #define R128_CRTC2_CRNT_FRAME 0x0314
295 #define R128_CRTC2_DEBUG 0x031c
296 #define R128_CRTC2_GEN_CNTL 0x03f8
297 #define R128_CRTC2_GUI_TRIG_VLINE 0x0318
298 #define R128_CRTC2_H_SYNC_STRT_WID 0x0304
299 #define R128_CRTC2_H_TOTAL_DISP 0x0300
300 #define R128_CRTC2_OFFSET 0x0324
301 #define R128_CRTC2_OFFSET_CNTL 0x0328
302 #define R128_CRTC2_PITCH 0x032c
303 #define R128_CRTC2_STATUS 0x03fc
304 #define R128_CRTC2_V_SYNC_STRT_WID 0x030c
305 #define R128_CRTC2_V_TOTAL_DISP 0x0308
306 #define R128_CRTC2_VLINE_CRNT_VLINE 0x0310
307 #define R128_CRTC8_DATA 0x03d5 /* VGA, 0x3b5 */
308 #define R128_CRTC8_IDX 0x03d4 /* VGA, 0x3b4 */
309 #define R128_CUR_CLR0 0x026c
310 #define R128_CUR_CLR1 0x0270
311 #define R128_CUR_HORZ_VERT_OFF 0x0268
312 #define R128_CUR_HORZ_VERT_POSN 0x0264
313 #define R128_CUR_OFFSET 0x0260
314 # define R128_CUR_LOCK (1 << 31)
315
316 #define R128_DAC_CNTL 0x0058
317 # define R128_DAC_RANGE_CNTL (3 << 0)
318 # define R128_DAC_BLANKING (1 << 2)
319 # define R128_DAC_CRT_SEL_CRTC2 (1 << 4)
320 # define R128_DAC_PALETTE_ACC_CTL (1 << 5)
321 # define R128_DAC_8BIT_EN (1 << 8)
322 # define R128_DAC_VGA_ADR_EN (1 << 13)
323 # define R128_DAC_MASK_ALL (0xff << 24)
324 #define R128_DAC_CRC_SIG 0x02cc
325 #define R128_DAC_DATA 0x03c9 /* VGA */
326 #define R128_DAC_MASK 0x03c6 /* VGA */
327 #define R128_DAC_R_INDEX 0x03c7 /* VGA */
328 #define R128_DAC_W_INDEX 0x03c8 /* VGA */
329 #define R128_DDA_CONFIG 0x02e0
330 #define R128_DDA_ON_OFF 0x02e4
331 #define R128_DEFAULT_OFFSET 0x16e0
332 #define R128_DEFAULT_PITCH 0x16e4
333 #define R128_DEFAULT_SC_BOTTOM_RIGHT 0x16e8
334 # define R128_DEFAULT_SC_RIGHT_MAX (0x1fff << 0)
335 # define R128_DEFAULT_SC_BOTTOM_MAX (0x1fff << 16)
336 #define R128_DESTINATION_3D_CLR_CMP_VAL 0x1820
337 #define R128_DESTINATION_3D_CLR_CMP_MSK 0x1824
338 #define R128_DEVICE_ID 0x0f02 /* PCI */
339 #define R128_DP_BRUSH_BKGD_CLR 0x1478
340 #define R128_DP_BRUSH_FRGD_CLR 0x147c
341 #define R128_DP_CNTL 0x16c0
342 # define R128_DST_X_LEFT_TO_RIGHT (1 << 0)
343 # define R128_DST_Y_TOP_TO_BOTTOM (1 << 1)
344 #define R128_DP_CNTL_XDIR_YDIR_YMAJOR 0x16d0
345 # define R128_DST_Y_MAJOR (1 << 2)
346 # define R128_DST_Y_DIR_TOP_TO_BOTTOM (1 << 15)
347 # define R128_DST_X_DIR_LEFT_TO_RIGHT (1 << 31)
348 #define R128_DP_DATATYPE 0x16c4
349 # define R128_HOST_BIG_ENDIAN_EN (1 << 29)
350 #define R128_DP_GUI_MASTER_CNTL 0x146c
351 # define R128_GMC_SRC_PITCH_OFFSET_CNTL (1 << 0)
352 # define R128_GMC_DST_PITCH_OFFSET_CNTL (1 << 1)
353 # define R128_GMC_SRC_CLIPPING (1 << 2)
354 # define R128_GMC_DST_CLIPPING (1 << 3)
355 # define R128_GMC_BRUSH_DATATYPE_MASK (0x0f << 4)
356 # define R128_GMC_BRUSH_8X8_MONO_FG_BG (0 << 4)
357 # define R128_GMC_BRUSH_8X8_MONO_FG_LA (1 << 4)
358 # define R128_GMC_BRUSH_1X8_MONO_FG_BG (4 << 4)
359 # define R128_GMC_BRUSH_1X8_MONO_FG_LA (5 << 4)
360 # define R128_GMC_BRUSH_32x1_MONO_FG_BG (6 << 4)
361 # define R128_GMC_BRUSH_32x1_MONO_FG_LA (7 << 4)
362 # define R128_GMC_BRUSH_32x32_MONO_FG_BG (8 << 4)
363 # define R128_GMC_BRUSH_32x32_MONO_FG_LA (9 << 4)
364 # define R128_GMC_BRUSH_8x8_COLOR (10 << 4)
365 # define R128_GMC_BRUSH_1X8_COLOR (12 << 4)
366 # define R128_GMC_BRUSH_SOLID_COLOR (13 << 4)
367 # define R128_GMC_BRUSH_NONE (15 << 4)
368 # define R128_GMC_DST_8BPP_CI (2 << 8)
369 # define R128_GMC_DST_15BPP (3 << 8)
370 # define R128_GMC_DST_16BPP (4 << 8)
371 # define R128_GMC_DST_24BPP (5 << 8)
372 # define R128_GMC_DST_32BPP (6 << 8)
373 # define R128_GMC_DST_8BPP_RGB (7 << 8)
374 # define R128_GMC_DST_Y8 (8 << 8)
375 # define R128_GMC_DST_RGB8 (9 << 8)
376 # define R128_GMC_DST_VYUY (11 << 8)
377 # define R128_GMC_DST_YVYU (12 << 8)
378 # define R128_GMC_DST_AYUV444 (14 << 8)
379 # define R128_GMC_DST_ARGB4444 (15 << 8)
380 # define R128_GMC_DST_DATATYPE_MASK (0x0f << 8)
381 # define R128_GMC_DST_DATATYPE_SHIFT 8
382 # define R128_GMC_SRC_DATATYPE_MASK (3 << 12)
383 # define R128_GMC_SRC_DATATYPE_MONO_FG_BG (0 << 12)
384 # define R128_GMC_SRC_DATATYPE_MONO_FG_LA (1 << 12)
385 # define R128_GMC_SRC_DATATYPE_COLOR (3 << 12)
386 # define R128_GMC_BYTE_PIX_ORDER (1 << 14)
387 # define R128_GMC_BYTE_MSB_TO_LSB (0 << 14)
388 # define R128_GMC_BYTE_LSB_TO_MSB (1 << 14)
389 # define R128_GMC_CONVERSION_TEMP (1 << 15)
390 # define R128_GMC_CONVERSION_TEMP_6500 (0 << 15)
391 # define R128_GMC_CONVERSION_TEMP_9300 (1 << 15)
392 # define R128_GMC_ROP3_MASK (0xff << 16)
393 # define R128_DP_SRC_SOURCE_MASK (7 << 24)
394 # define R128_DP_SRC_SOURCE_MEMORY (2 << 24)
395 # define R128_DP_SRC_SOURCE_HOST_DATA (3 << 24)
396 # define R128_GMC_3D_FCN_EN (1 << 27)
397 # define R128_GMC_CLR_CMP_CNTL_DIS (1 << 28)
398 # define R128_GMC_AUX_CLIP_DIS (1 << 29)
399 # define R128_GMC_WR_MSK_DIS (1 << 30)
400 # define R128_GMC_LD_BRUSH_Y_X (1 << 31)
401 # define R128_ROP3_ZERO 0x00000000
402 # define R128_ROP3_DSa 0x00880000
403 # define R128_ROP3_SDna 0x00440000
404 # define R128_ROP3_S 0x00cc0000
405 # define R128_ROP3_DSna 0x00220000
406 # define R128_ROP3_D 0x00aa0000
407 # define R128_ROP3_DSx 0x00660000
408 # define R128_ROP3_DSo 0x00ee0000
409 # define R128_ROP3_DSon 0x00110000
410 # define R128_ROP3_DSxn 0x00990000
411 # define R128_ROP3_Dn 0x00550000
412 # define R128_ROP3_SDno 0x00dd0000
413 # define R128_ROP3_Sn 0x00330000
414 # define R128_ROP3_DSno 0x00bb0000
415 # define R128_ROP3_DSan 0x00770000
416 # define R128_ROP3_ONE 0x00ff0000
417 # define R128_ROP3_DPa 0x00a00000
418 # define R128_ROP3_PDna 0x00500000
419 # define R128_ROP3_P 0x00f00000
420 # define R128_ROP3_DPna 0x000a0000
421 # define R128_ROP3_D 0x00aa0000
422 # define R128_ROP3_DPx 0x005a0000
423 # define R128_ROP3_DPo 0x00fa0000
424 # define R128_ROP3_DPon 0x00050000
425 # define R128_ROP3_PDxn 0x00a50000
426 # define R128_ROP3_PDno 0x00f50000
427 # define R128_ROP3_Pn 0x000f0000
428 # define R128_ROP3_DPno 0x00af0000
429 # define R128_ROP3_DPan 0x005f0000
430
431
432 #define R128_DP_GUI_MASTER_CNTL_C 0x1c84
433 #define R128_DP_MIX 0x16c8
434 #define R128_DP_SRC_BKGD_CLR 0x15dc
435 #define R128_DP_SRC_FRGD_CLR 0x15d8
436 #define R128_DP_WRITE_MASK 0x16cc
437 #define R128_DST_BRES_DEC 0x1630
438 #define R128_DST_BRES_ERR 0x1628
439 #define R128_DST_BRES_INC 0x162c
440 #define R128_DST_BRES_LNTH 0x1634
441 #define R128_DST_BRES_LNTH_SUB 0x1638
442 #define R128_DST_HEIGHT 0x1410
443 #define R128_DST_HEIGHT_WIDTH 0x143c
444 #define R128_DST_HEIGHT_WIDTH_8 0x158c
445 #define R128_DST_HEIGHT_WIDTH_BW 0x15b4
446 #define R128_DST_HEIGHT_Y 0x15a0
447 #define R128_DST_OFFSET 0x1404
448 #define R128_DST_PITCH 0x1408
449 #define R128_DST_PITCH_OFFSET 0x142c
450 #define R128_DST_PITCH_OFFSET_C 0x1c80
451 # define R128_PITCH_SHIFT 21
452 # define R128_DST_TILE (1 << 31)
453 #define R128_DST_WIDTH 0x140c
454 #define R128_DST_WIDTH_HEIGHT 0x1598
455 #define R128_DST_WIDTH_X 0x1588
456 #define R128_DST_WIDTH_X_INCY 0x159c
457 #define R128_DST_X 0x141c
458 #define R128_DST_X_SUB 0x15a4
459 #define R128_DST_X_Y 0x1594
460 #define R128_DST_Y 0x1420
461 #define R128_DST_Y_SUB 0x15a8
462 #define R128_DST_Y_X 0x1438
463
464 #define R128_EXT_MEM_CNTL 0x0144
465
466 #define R128_FCP_CNTL 0x0012 /* PLL */
467 #define R128_FLUSH_1 0x1704
468 #define R128_FLUSH_2 0x1708
469 #define R128_FLUSH_3 0x170c
470 #define R128_FLUSH_4 0x1710
471 #define R128_FLUSH_5 0x1714
472 #define R128_FLUSH_6 0x1718
473 #define R128_FLUSH_7 0x171c
474 #define R128_FOG_3D_TABLE_START 0x1810
475 #define R128_FOG_3D_TABLE_END 0x1814
476 #define R128_FOG_3D_TABLE_DENSITY 0x181c
477 #define R128_FOG_TABLE_INDEX 0x1a14
478 #define R128_FOG_TABLE_DATA 0x1a18
479 #define R128_FP_CRTC_H_TOTAL_DISP 0x0250
480 #define R128_FP_CRTC_V_TOTAL_DISP 0x0254
481 #define R128_FP_GEN_CNTL 0x0284
482 # define R128_FP_FPON (1 << 0)
483 # define R128_FP_BLANK_DIS (1 << 1)
484 # define R128_FP_TDMS_EN (1 << 2)
485 # define R128_FP_DETECT_SENSE (1 << 8)
486 # define R128_FP_SEL_CRTC2 (1 << 13)
487 # define R128_FP_CRTC_DONT_SHADOW_VPAR (1 << 16)
488 # define R128_FP_CRTC_DONT_SHADOW_HEND (1 << 17)
489 # define R128_FP_CRTC_USE_SHADOW_VEND (1 << 18)
490 # define R128_FP_CRTC_USE_SHADOW_ROWCUR (1 << 19)
491 # define R128_FP_CRTC_HORZ_DIV2_EN (1 << 20)
492 # define R128_FP_CRTC_HOR_CRT_DIV2_DIS (1 << 21)
493 # define R128_FP_CRT_SYNC_SEL (1 << 23)
494 # define R128_FP_USE_SHADOW_EN (1 << 24)
495 #define R128_FP_H_SYNC_STRT_WID 0x02c4
496 #define R128_FP_HORZ_STRETCH 0x028c
497 # define R128_HORZ_STRETCH_RATIO_MASK 0xffff
498 # define R128_HORZ_STRETCH_RATIO_SHIFT 0
499 # define R128_HORZ_STRETCH_RATIO_MAX 4096
500 # define R128_HORZ_PANEL_SIZE (0xff << 16)
501 # define R128_HORZ_PANEL_SHIFT 16
502 # define R128_AUTO_HORZ_RATIO (0 << 24)
503 # define R128_HORZ_STRETCH_PIXREP (0 << 25)
504 # define R128_HORZ_STRETCH_BLEND (1 << 25)
505 # define R128_HORZ_STRETCH_ENABLE (1 << 26)
506 # define R128_HORZ_FP_LOOP_STRETCH (0x7 << 27)
507 # define R128_HORZ_STRETCH_RESERVED (1 << 30)
508 # define R128_HORZ_AUTO_RATIO_FIX_EN (1 << 31)
509
510 #define R128_FP_PANEL_CNTL 0x0288
511 # define R128_FP_DIGON (1 << 0)
512 # define R128_FP_BLON (1 << 1)
513 #define R128_FP_V_SYNC_STRT_WID 0x02c8
514 #define R128_FP_VERT_STRETCH 0x0290
515 # define R128_VERT_PANEL_SIZE (0x7ff << 0)
516 # define R128_VERT_PANEL_SHIFT 0
517 # define R128_VERT_STRETCH_RATIO_MASK 0x3ff
518 # define R128_VERT_STRETCH_RATIO_SHIFT 11
519 # define R128_VERT_STRETCH_RATIO_MAX 1024
520 # define R128_VERT_STRETCH_ENABLE (1 << 24)
521 # define R128_VERT_STRETCH_LINEREP (0 << 25)
522 # define R128_VERT_STRETCH_BLEND (1 << 25)
523 # define R128_VERT_AUTO_RATIO_EN (1 << 26)
524 # define R128_VERT_STRETCH_RESERVED 0xf8e00000
525
526 #define R128_GEN_INT_CNTL 0x0040
527 #define R128_GEN_INT_STATUS 0x0044
528 # define R128_VSYNC_INT_AK (1 << 2)
529 # define R128_VSYNC_INT (1 << 2)
530 #define R128_GEN_RESET_CNTL 0x00f0
531 # define R128_SOFT_RESET_GUI (1 << 0)
532 # define R128_SOFT_RESET_VCLK (1 << 8)
533 # define R128_SOFT_RESET_PCLK (1 << 9)
534 # define R128_SOFT_RESET_DISPENG_XCLK (1 << 11)
535 # define R128_SOFT_RESET_MEMCTLR_XCLK (1 << 12)
536 #define R128_GENENB 0x03c3 /* VGA */
537 #define R128_GENFC_RD 0x03ca /* VGA */
538 #define R128_GENFC_WT 0x03da /* VGA, 0x03ba */
539 #define R128_GENMO_RD 0x03cc /* VGA */
540 #define R128_GENMO_WT 0x03c2 /* VGA */
541 #define R128_GENS0 0x03c2 /* VGA */
542 #define R128_GENS1 0x03da /* VGA, 0x03ba */
543 #define R128_GPIO_MONID 0x0068
544 # define R128_GPIO_MONID_A_0 (1 << 0)
545 # define R128_GPIO_MONID_A_1 (1 << 1)
546 # define R128_GPIO_MONID_A_2 (1 << 2)
547 # define R128_GPIO_MONID_A_3 (1 << 3)
548 # define R128_GPIO_MONID_Y_0 (1 << 8)
549 # define R128_GPIO_MONID_Y_1 (1 << 9)
550 # define R128_GPIO_MONID_Y_2 (1 << 10)
551 # define R128_GPIO_MONID_Y_3 (1 << 11)
552 # define R128_GPIO_MONID_EN_0 (1 << 16)
553 # define R128_GPIO_MONID_EN_1 (1 << 17)
554 # define R128_GPIO_MONID_EN_2 (1 << 18)
555 # define R128_GPIO_MONID_EN_3 (1 << 19)
556 # define R128_GPIO_MONID_MASK_0 (1 << 24)
557 # define R128_GPIO_MONID_MASK_1 (1 << 25)
558 # define R128_GPIO_MONID_MASK_2 (1 << 26)
559 # define R128_GPIO_MONID_MASK_3 (1 << 27)
560 #define R128_GPIO_MONIDB 0x006c
561 #define R128_GRPH8_DATA 0x03cf /* VGA */
562 #define R128_GRPH8_IDX 0x03ce /* VGA */
563 #define R128_GUI_DEBUG0 0x16a0
564 #define R128_GUI_DEBUG1 0x16a4
565 #define R128_GUI_DEBUG2 0x16a8
566 #define R128_GUI_DEBUG3 0x16ac
567 #define R128_GUI_DEBUG4 0x16b0
568 #define R128_GUI_DEBUG5 0x16b4
569 #define R128_GUI_DEBUG6 0x16b8
570 #define R128_GUI_PROBE 0x16bc
571 #define R128_GUI_SCRATCH_REG0 0x15e0
572 #define R128_GUI_SCRATCH_REG1 0x15e4
573 #define R128_GUI_SCRATCH_REG2 0x15e8
574 #define R128_GUI_SCRATCH_REG3 0x15ec
575 #define R128_GUI_SCRATCH_REG4 0x15f0
576 #define R128_GUI_SCRATCH_REG5 0x15f4
577 #define R128_GUI_STAT 0x1740
578 # define R128_GUI_FIFOCNT_MASK 0x0fff
579 # define R128_GUI_ACTIVE (1 << 31)
580
581 #define R128_HEADER 0x0f0e /* PCI */
582 #define R128_HOST_DATA0 0x17c0
583 #define R128_HOST_DATA1 0x17c4
584 #define R128_HOST_DATA2 0x17c8
585 #define R128_HOST_DATA3 0x17cc
586 #define R128_HOST_DATA4 0x17d0
587 #define R128_HOST_DATA5 0x17d4
588 #define R128_HOST_DATA6 0x17d8
589 #define R128_HOST_DATA7 0x17dc
590 #define R128_HOST_DATA_LAST 0x17e0
591 #define R128_HOST_PATH_CNTL 0x0130
592 #define R128_HTOTAL_CNTL 0x0009 /* PLL */
593 #define R128_HW_DEBUG 0x0128
594 #define R128_HW_DEBUG2 0x011c
595
596 #define R128_I2C_CNTL_1 0x0094 /* ? */
597 #define R128_INTERRUPT_LINE 0x0f3c /* PCI */
598 #define R128_INTERRUPT_PIN 0x0f3d /* PCI */
599 #define R128_IO_BASE 0x0f14 /* PCI */
600
601 #define R128_LATENCY 0x0f0d /* PCI */
602 #define R128_LEAD_BRES_DEC 0x1608
603 #define R128_LEAD_BRES_ERR 0x1600
604 #define R128_LEAD_BRES_INC 0x1604
605 #define R128_LEAD_BRES_LNTH 0x161c
606 #define R128_LEAD_BRES_LNTH_SUB 0x1624
607 #define R128_LVDS_GEN_CNTL 0x02d0
608 # define R128_LVDS_ON (1 << 0)
609 # define R128_LVDS_DISPLAY_DIS (1 << 1)
610 # define R128_LVDS_EN (1 << 7)
611 # define R128_LVDS_DIGON (1 << 18)
612 # define R128_LVDS_BLON (1 << 19)
613 # define R128_LVDS_SEL_CRTC2 (1 << 23)
614 # define R128_HSYNC_DELAY_SHIFT 28
615 # define R128_HSYNC_DELAY_MASK (0xf << 28)
616
617 #define R128_MAX_LATENCY 0x0f3f /* PCI */
618 #define R128_MCLK_CNTL 0x000f /* PLL */
619 # define R128_FORCE_GCP (1 << 16)
620 # define R128_FORCE_PIPE3D_CP (1 << 17)
621 # define R128_FORCE_RCP (1 << 18)
622 #define R128_MDGPIO_A_REG 0x01ac
623 #define R128_MDGPIO_EN_REG 0x01b0
624 #define R128_MDGPIO_MASK 0x0198
625 #define R128_MDGPIO_Y_REG 0x01b4
626 #define R128_MEM_ADDR_CONFIG 0x0148
627 #define R128_MEM_BASE 0x0f10 /* PCI */
628 #define R128_MEM_CNTL 0x0140
629 #define R128_MEM_INIT_LAT_TIMER 0x0154
630 #define R128_MEM_INTF_CNTL 0x014c
631 #define R128_MEM_SDRAM_MODE_REG 0x0158
632 #define R128_MEM_STR_CNTL 0x0150
633 #define R128_MEM_VGA_RP_SEL 0x003c
634 #define R128_MEM_VGA_WP_SEL 0x0038
635 #define R128_MIN_GRANT 0x0f3e /* PCI */
636 #define R128_MM_DATA 0x0004
637 #define R128_MM_INDEX 0x0000
638 #define R128_MPLL_CNTL 0x000e /* PLL */
639 #define R128_MPP_TB_CONFIG 0x01c0 /* ? */
640 #define R128_MPP_GP_CONFIG 0x01c8 /* ? */
641
642 #define R128_N_VIF_COUNT 0x0248
643
644 #define R128_OVR_CLR 0x0230
645 #define R128_OVR_WID_LEFT_RIGHT 0x0234
646 #define R128_OVR_WID_TOP_BOTTOM 0x0238
647
648 /* first overlay unit (there is only one) */
649
650 #define R128_OV0_Y_X_START 0x0400
651 #define R128_OV0_Y_X_END 0x0404
652 #define R128_OV0_EXCLUSIVE_HORZ 0x0408
653 # define R128_EXCL_HORZ_START_MASK 0x000000ff
654 # define R128_EXCL_HORZ_END_MASK 0x0000ff00
655 # define R128_EXCL_HORZ_BACK_PORCH_MASK 0x00ff0000
656 # define R128_EXCL_HORZ_EXCLUSIVE_EN 0x80000000
657 #define R128_OV0_EXCLUSIVE_VERT 0x040C
658 # define R128_EXCL_VERT_START_MASK 0x000003ff
659 # define R128_EXCL_VERT_END_MASK 0x03ff0000
660 #define R128_OV0_REG_LOAD_CNTL 0x0410
661 # define R128_REG_LD_CTL_LOCK 0x00000001L
662 # define R128_REG_LD_CTL_VBLANK_DURING_LOCK 0x00000002L
663 # define R128_REG_LD_CTL_STALL_GUI_UNTIL_FLIP 0x00000004L
664 # define R128_REG_LD_CTL_LOCK_READBACK 0x00000008L
665 #define R128_OV0_SCALE_CNTL 0x0420
666 # define R128_SCALER_PIX_EXPAND 0x00000001L
667 # define R128_SCALER_Y2R_TEMP 0x00000002L
668 # define R128_SCALER_HORZ_PICK_NEAREST 0x00000003L
669 # define R128_SCALER_VERT_PICK_NEAREST 0x00000004L
670 # define R128_SCALER_SIGNED_UV 0x00000010L
671 # define R128_SCALER_GAMMA_SEL_MASK 0x00000060L
672 # define R128_SCALER_GAMMA_SEL_BRIGHT 0x00000000L
673 # define R128_SCALER_GAMMA_SEL_G22 0x00000020L
674 # define R128_SCALER_GAMMA_SEL_G18 0x00000040L
675 # define R128_SCALER_GAMMA_SEL_G14 0x00000060L
676 # define R128_SCALER_COMCORE_SHIFT_UP_ONE 0x00000080L
677 # define R128_SCALER_SURFAC_FORMAT 0x00000f00L
678 # define R128_SCALER_SOURCE_15BPP 0x00000300L
679 # define R128_SCALER_SOURCE_16BPP 0x00000400L
680 # define R128_SCALER_SOURCE_32BPP 0x00000600L
681 # define R128_SCALER_SOURCE_YUV9 0x00000900L
682 # define R128_SCALER_SOURCE_YUV12 0x00000A00L
683 # define R128_SCALER_SOURCE_VYUY422 0x00000B00L
684 # define R128_SCALER_SOURCE_YVYU422 0x00000C00L
685 # define R128_SCALER_SMART_SWITCH 0x00008000L
686 # define R128_SCALER_BURST_PER_PLANE 0x00ff0000L
687 # define R128_SCALER_DOUBLE_BUFFER 0x01000000L
688 # define R128_SCALER_DIS_LIMIT 0x08000000L
689 # define R128_SCALER_PRG_LOAD_START 0x10000000L
690 # define R128_SCALER_INT_EMU 0x20000000L
691 # define R128_SCALER_ENABLE 0x40000000L
692 # define R128_SCALER_SOFT_RESET 0x80000000L
693 #define R128_OV0_V_INC 0x0424
694 #define R128_OV0_P1_V_ACCUM_INIT 0x0428
695 # define R128_OV0_P1_MAX_LN_IN_PER_LN_OUT 0x00000003L
696 # define R128_OV0_P1_V_ACCUM_INIT_MASK 0x01ff8000L
697 #define R128_OV0_P23_V_ACCUM_INIT 0x042C
698 #define R128_OV0_P1_BLANK_LINES_AT_TOP 0x0430
699 # define R128_P1_BLNK_LN_AT_TOP_M1_MASK 0x00000fffL
700 # define R128_P1_ACTIVE_LINES_M1 0x0fff0000L
701 #define R128_OV0_P23_BLANK_LINES_AT_TOP 0x0434
702 # define R128_P23_BLNK_LN_AT_TOP_M1_MASK 0x000007ffL
703 # define R128_P23_ACTIVE_LINES_M1 0x07ff0000L
704 #define R128_OV0_VID_BUF0_BASE_ADRS 0x0440
705 # define R128_VIF_BUF0_PITCH_SEL 0x00000001L
706 # define R128_VIF_BUF0_TILE_ADRS 0x00000002L
707 # define R128_VIF_BUF0_BASE_ADRS_MASK 0x03fffff0L
708 # define R128_VIF_BUF0_1ST_LINE_LSBS_MASK 0x48000000L
709 #define R128_OV0_VID_BUF1_BASE_ADRS 0x0444
710 # define R128_VIF_BUF1_PITCH_SEL 0x00000001L
711 # define R128_VIF_BUF1_TILE_ADRS 0x00000002L
712 # define R128_VIF_BUF1_BASE_ADRS_MASK 0x03fffff0L
713 # define R128_VIF_BUF1_1ST_LINE_LSBS_MASK 0x48000000L
714 #define R128_OV0_VID_BUF2_BASE_ADRS 0x0448
715 # define R128_VIF_BUF2_PITCH_SEL 0x00000001L
716 # define R128_VIF_BUF2_TILE_ADRS 0x00000002L
717 # define R128_VIF_BUF2_BASE_ADRS_MASK 0x03fffff0L
718 # define R128_VIF_BUF2_1ST_LINE_LSBS_MASK 0x48000000L
719 #define R128_OV0_VID_BUF3_BASE_ADRS 0x044C
720 #define R128_OV0_VID_BUF4_BASE_ADRS 0x0450
721 #define R128_OV0_VID_BUF5_BASE_ADRS 0x0454
722 #define R128_OV0_VID_BUF_PITCH0_VALUE 0x0460
723 #define R128_OV0_VID_BUF_PITCH1_VALUE 0x0464
724 #define R128_OV0_AUTO_FLIP_CNTL 0x0470
725 #define R128_OV0_DEINTERLACE_PATTERN 0x0474
726 #define R128_OV0_H_INC 0x0480
727 #define R128_OV0_STEP_BY 0x0484
728 #define R128_OV0_P1_H_ACCUM_INIT 0x0488
729 #define R128_OV0_P23_H_ACCUM_INIT 0x048C
730 #define R128_OV0_P1_X_START_END 0x0494
731 #define R128_OV0_P2_X_START_END 0x0498
732 #define R128_OV0_P3_X_START_END 0x049C
733 #define R128_OV0_FILTER_CNTL 0x04A0
734 #define R128_OV0_FOUR_TAP_COEF_0 0x04B0
735 #define R128_OV0_FOUR_TAP_COEF_1 0x04B4
736 #define R128_OV0_FOUR_TAP_COEF_2 0x04B8
737 #define R128_OV0_FOUR_TAP_COEF_3 0x04BC
738 #define R128_OV0_FOUR_TAP_COEF_4 0x04C0
739 #define R128_OV0_COLOUR_CNTL 0x04E0
740 #define R128_OV0_VIDEO_KEY_CLR 0x04E4
741 #define R128_OV0_VIDEO_KEY_MSK 0x04E8
742 #define R128_OV0_GRAPHICS_KEY_CLR 0x04EC
743 #define R128_OV0_GRAPHICS_KEY_MSK 0x04F0
744 #define R128_OV0_KEY_CNTL 0x04F4
745 # define R128_VIDEO_KEY_FN_MASK 0x00000007L
746 # define R128_VIDEO_KEY_FN_FALSE 0x00000000L
747 # define R128_VIDEO_KEY_FN_TRUE 0x00000001L
748 # define R128_VIDEO_KEY_FN_EQ 0x00000004L
749 # define R128_VIDEO_KEY_FN_NE 0x00000005L
750 # define R128_GRAPHIC_KEY_FN_MASK 0x00000070L
751 # define R128_GRAPHIC_KEY_FN_FALSE 0x00000000L
752 # define R128_GRAPHIC_KEY_FN_TRUE 0x00000010L
753 # define R128_GRAPHIC_KEY_FN_EQ 0x00000040L
754 # define R128_GRAPHIC_KEY_FN_NE 0x00000050L
755 # define R128_CMP_MIX_MASK 0x00000100L
756 # define R128_CMP_MIX_OR 0x00000000L
757 # define R128_CMP_MIX_AND 0x00000100L
758 #define R128_OV0_TEST 0x04F8
759
760
761 #define R128_PALETTE_DATA 0x00b4
762 #define R128_PALETTE_INDEX 0x00b0
763 #define R128_PC_DEBUG_MODE 0x1760
764 #define R128_PC_GUI_CTLSTAT 0x1748
765 #define R128_PC_GUI_MODE 0x1744
766 # define R128_PC_IGNORE_UNIFY (1 << 5)
767 #define R128_PC_MISC_CNTL 0x0188
768 #define R128_PC_NGUI_CTLSTAT 0x0184
769 # define R128_PC_FLUSH_GUI (3 << 0)
770 # define R128_PC_RI_GUI (1 << 2)
771 # define R128_PC_FLUSH_ALL 0x00ff
772 # define R128_PC_BUSY (1 << 31)
773 #define R128_PC_NGUI_MODE 0x0180
774 #define R128_PCI_GART_PAGE 0x017c
775 #define R128_PLANE_3D_MASK_C 0x1d44
776 #define R128_PLL_TEST_CNTL 0x0013 /* PLL */
777 #define R128_PMI_CAP_ID 0x0f5c /* PCI */
778 #define R128_PMI_DATA 0x0f63 /* PCI */
779 #define R128_PMI_NXT_CAP_PTR 0x0f5d /* PCI */
780 #define R128_PMI_PMC_REG 0x0f5e /* PCI */
781 #define R128_PMI_PMCSR_REG 0x0f60 /* PCI */
782 #define R128_PMI_REGISTER 0x0f5c /* PCI */
783 #define R128_PPLL_CNTL 0x0002 /* PLL */
784 # define R128_PPLL_RESET (1 << 0)
785 # define R128_PPLL_SLEEP (1 << 1)
786 # define R128_PPLL_ATOMIC_UPDATE_EN (1 << 16)
787 # define R128_PPLL_VGA_ATOMIC_UPDATE_EN (1 << 17)
788 #define R128_PPLL_DIV_0 0x0004 /* PLL */
789 #define R128_PPLL_DIV_1 0x0005 /* PLL */
790 #define R128_PPLL_DIV_2 0x0006 /* PLL */
791 #define R128_PPLL_DIV_3 0x0007 /* PLL */
792 # define R128_PPLL_FB3_DIV_MASK 0x07ff
793 # define R128_PPLL_POST3_DIV_MASK 0x00070000
794 #define R128_PPLL_REF_DIV 0x0003 /* PLL */
795 # define R128_PPLL_REF_DIV_MASK 0x03ff
796 # define R128_PPLL_ATOMIC_UPDATE_R (1 << 15) /* same as _W */
797 # define R128_PPLL_ATOMIC_UPDATE_W (1 << 15) /* same as _R */
798 #define R128_PWR_MNGMT_CNTL_STATUS 0x0f60 /* PCI */
799 #define R128_REG_BASE 0x0f18 /* PCI */
800 #define R128_REGPROG_INF 0x0f09 /* PCI */
801 #define R128_REVISION_ID 0x0f08 /* PCI */
802
803 #define R128_SC_BOTTOM 0x164c
804 #define R128_SC_BOTTOM_RIGHT 0x16f0
805 #define R128_SC_BOTTOM_RIGHT_C 0x1c8c
806 #define R128_SC_LEFT 0x1640
807 #define R128_SC_RIGHT 0x1644
808 #define R128_SC_TOP 0x1648
809 #define R128_SC_TOP_LEFT 0x16ec
810 #define R128_SC_TOP_LEFT_C 0x1c88
811 #define R128_SEQ8_DATA 0x03c5 /* VGA */
812 #define R128_SEQ8_IDX 0x03c4 /* VGA */
813 #define R128_SNAPSHOT_F_COUNT 0x0244
814 #define R128_SNAPSHOT_VH_COUNTS 0x0240
815 #define R128_SNAPSHOT_VIF_COUNT 0x024c
816 #define R128_SRC_OFFSET 0x15ac
817 #define R128_SRC_PITCH 0x15b0
818 #define R128_SRC_PITCH_OFFSET 0x1428
819 #define R128_SRC_SC_BOTTOM 0x165c
820 #define R128_SRC_SC_BOTTOM_RIGHT 0x16f4
821 #define R128_SRC_SC_RIGHT 0x1654
822 #define R128_SRC_X 0x1414
823 #define R128_SRC_X_Y 0x1590
824 #define R128_SRC_Y 0x1418
825 #define R128_SRC_Y_X 0x1434
826 #define R128_STATUS 0x0f06 /* PCI */
827 #define R128_SUBPIC_CNTL 0x0540 /* ? */
828 #define R128_SUB_CLASS 0x0f0a /* PCI */
829 #define R128_SURFACE_DELAY 0x0b00
830 #define R128_SURFACE0_INFO 0x0b0c
831 #define R128_SURFACE0_LOWER_BOUND 0x0b04
832 #define R128_SURFACE0_UPPER_BOUND 0x0b08
833 #define R128_SURFACE1_INFO 0x0b1c
834 #define R128_SURFACE1_LOWER_BOUND 0x0b14
835 #define R128_SURFACE1_UPPER_BOUND 0x0b18
836 #define R128_SURFACE2_INFO 0x0b2c
837 #define R128_SURFACE2_LOWER_BOUND 0x0b24
838 #define R128_SURFACE2_UPPER_BOUND 0x0b28
839 #define R128_SURFACE3_INFO 0x0b3c
840 #define R128_SURFACE3_LOWER_BOUND 0x0b34
841 #define R128_SURFACE3_UPPER_BOUND 0x0b38
842 #define R128_SW_SEMAPHORE 0x013c
843
844 #define R128_TEST_DEBUG_CNTL 0x0120
845 #define R128_TEST_DEBUG_MUX 0x0124
846 #define R128_TEST_DEBUG_OUT 0x012c
847 #define R128_TMDS_CRC 0x02a0
848 #define R128_TMDS_TRANSMITTER_CNTL 0x02a4
849 # define R128_TMDS_PLLEN (1 << 0)
850 # define R128_TMDS_PLLRST (1 << 1)
851 #define R128_TRAIL_BRES_DEC 0x1614
852 #define R128_TRAIL_BRES_ERR 0x160c
853 #define R128_TRAIL_BRES_INC 0x1610
854 #define R128_TRAIL_X 0x1618
855 #define R128_TRAIL_X_SUB 0x1620
856
857 #define R128_VCLK_ECP_CNTL 0x0008 /* PLL */
858 #define R128_VENDOR_ID 0x0f00 /* PCI */
859 #define R128_VGA_DDA_CONFIG 0x02e8
860 #define R128_VGA_DDA_ON_OFF 0x02ec
861 #define R128_VID_BUFFER_CONTROL 0x0900
862 #define R128_VIDEOMUX_CNTL 0x0190
863 #define R128_VIPH_CONTROL 0x01D0 /* ? */
864
865 #define R128_WAIT_UNTIL 0x1720
866
867 #define R128_X_MPLL_REF_FB_DIV 0x000a /* PLL */
868 #define R128_XCLK_CNTL 0x000d /* PLL */
869 #define R128_XDLL_CNTL 0x000c /* PLL */
870 #define R128_XPLL_CNTL 0x000b /* PLL */
871
872 /* Registers for CCE and Microcode Engine */
873 #define R128_PM4_MICROCODE_ADDR 0x07d4
874 #define R128_PM4_MICROCODE_RADDR 0x07d8
875 #define R128_PM4_MICROCODE_DATAH 0x07dc
876 #define R128_PM4_MICROCODE_DATAL 0x07e0
877
878 #define R128_PM4_BUFFER_OFFSET 0x0700
879 #define R128_PM4_BUFFER_CNTL 0x0704
880 # define R128_PM4_NONPM4 (0 << 28)
881 # define R128_PM4_192PIO (1 << 28)
882 # define R128_PM4_192BM (2 << 28)
883 # define R128_PM4_128PIO_64INDBM (3 << 28)
884 # define R128_PM4_128BM_64INDBM (4 << 28)
885 # define R128_PM4_64PIO_128INDBM (5 << 28)
886 # define R128_PM4_64BM_128INDBM (6 << 28)
887 # define R128_PM4_64PIO_64VCBM_64INDBM (7 << 28)
888 # define R128_PM4_64BM_64VCBM_64INDBM (8 << 28)
889 # define R128_PM4_64PIO_64VCPIO_64INDPIO (15 << 28)
890 #define R128_PM4_BUFFER_WM_CNTL 0x0708
891 # define R128_WMA_SHIFT 0
892 # define R128_WMB_SHIFT 8
893 # define R128_WMC_SHIFT 16
894 # define R128_WB_WM_SHIFT 24
895 #define R128_PM4_BUFFER_DL_RPTR_ADDR 0x070c
896 #define R128_PM4_BUFFER_DL_RPTR 0x0710
897 #define R128_PM4_BUFFER_DL_WPTR 0x0714
898 # define R128_PM4_BUFFER_DL_DONE (1 << 31)
899 #define R128_PM4_BUFFER_DL_WPTR_DELAY 0x0718
900 # define R128_PRE_WRITE_TIMER_SHIFT 0
901 # define R128_PRE_WRITE_LIMIT_SHIFT 23
902 #define R128_PM4_VC_FPU_SETUP 0x071c
903 # define R128_FRONT_DIR_CW (0 << 0)
904 # define R128_FRONT_DIR_CCW (1 << 0)
905 # define R128_FRONT_DIR_MASK (1 << 0)
906 # define R128_BACKFACE_CULL (0 << 1)
907 # define R128_BACKFACE_POINTS (1 << 1)
908 # define R128_BACKFACE_LINES (2 << 1)
909 # define R128_BACKFACE_SOLID (3 << 1)
910 # define R128_BACKFACE_MASK (3 << 1)
911 # define R128_FRONTFACE_CULL (0 << 3)
912 # define R128_FRONTFACE_POINTS (1 << 3)
913 # define R128_FRONTFACE_LINES (2 << 3)
914 # define R128_FRONTFACE_SOLID (3 << 3)
915 # define R128_FRONTFACE_MASK (3 << 3)
916 # define R128_FPU_COLOR_SOLID (0 << 5)
917 # define R128_FPU_COLOR_FLAT (1 << 5)
918 # define R128_FPU_COLOR_GOURAUD (2 << 5)
919 # define R128_FPU_COLOR_GOURAUD2 (3 << 5)
920 # define R128_FPU_COLOR_MASK (3 << 5)
921 # define R128_FPU_SUB_PIX_2BITS (0 << 7)
922 # define R128_FPU_SUB_PIX_4BITS (1 << 7)
923 # define R128_FPU_MODE_2D (0 << 8)
924 # define R128_FPU_MODE_3D (1 << 8)
925 # define R128_TRAP_BITS_DISABLE (1 << 9)
926 # define R128_EDGE_ANTIALIAS (1 << 10)
927 # define R128_SUPERSAMPLE (1 << 11)
928 # define R128_XFACTOR_2 (0 << 12)
929 # define R128_XFACTOR_4 (1 << 12)
930 # define R128_YFACTOR_2 (0 << 13)
931 # define R128_YFACTOR_4 (1 << 13)
932 # define R128_FLAT_SHADE_VERTEX_D3D (0 << 14)
933 # define R128_FLAT_SHADE_VERTEX_OGL (1 << 14)
934 # define R128_FPU_ROUND_TRUNCATE (0 << 15)
935 # define R128_FPU_ROUND_NEAREST (1 << 15)
936 # define R128_WM_SEL_8DW (0 << 16)
937 # define R128_WM_SEL_16DW (1 << 16)
938 # define R128_WM_SEL_32DW (2 << 16)
939 #define R128_PM4_VC_DEBUG_CONFIG 0x07a4
940 #define R128_PM4_VC_STAT 0x07a8
941 #define R128_PM4_VC_TIMESTAMP0 0x07b0
942 #define R128_PM4_VC_TIMESTAMP1 0x07b4
943 #define R128_PM4_STAT 0x07b8
944 # define R128_PM4_FIFOCNT_MASK 0x0fff
945 # define R128_PM4_BUSY (1 << 16)
946 # define R128_PM4_GUI_ACTIVE (1 << 31)
947 #define R128_PM4_BUFFER_ADDR 0x07f0
948 #define R128_PM4_MICRO_CNTL 0x07fc
949 # define R128_PM4_MICRO_FREERUN (1 << 30)
950 #define R128_PM4_FIFO_DATA_EVEN 0x1000
951 #define R128_PM4_FIFO_DATA_ODD 0x1004
952
953 #define R128_SCALE_3D_CNTL 0x1a00
954 # define R128_SCALE_DITHER_ERR_DIFF (0 << 1)
955 # define R128_SCALE_DITHER_TABLE (1 << 1)
956 # define R128_TEX_CACHE_SIZE_FULL (0 << 2)
957 # define R128_TEX_CACHE_SIZE_HALF (1 << 2)
958 # define R128_DITHER_INIT_CURR (0 << 3)
959 # define R128_DITHER_INIT_RESET (1 << 3)
960 # define R128_ROUND_24BIT (1 << 4)
961 # define R128_TEX_CACHE_DISABLE (1 << 5)
962 # define R128_SCALE_3D_NOOP (0 << 6)
963 # define R128_SCALE_3D_SCALE (1 << 6)
964 # define R128_SCALE_3D_TEXMAP_SHADE (2 << 6)
965 # define R128_SCALE_PIX_BLEND (0 << 8)
966 # define R128_SCALE_PIX_REPLICATE (1 << 8)
967 # define R128_TEX_CACHE_SPLIT (1 << 9)
968 # define R128_APPLE_YUV_MODE (1 << 10)
969 # define R128_TEX_CACHE_PALLETE_MODE (1 << 11)
970 # define R128_ALPHA_COMB_ADD_CLAMP (0 << 12)
971 # define R128_ALPHA_COMB_ADD_NCLAMP (1 << 12)
972 # define R128_ALPHA_COMB_SUB_SRC_DST_CLAMP (2 << 12)
973 # define R128_ALPHA_COMB_SUB_SRC_DST_NCLAMP (3 << 12)
974 # define R128_ALPHA_COMB_FCN_MASK (3 << 12)
975 # define R128_FOG_VERTEX (0 << 14)
976 # define R128_FOG_TABLE (1 << 14)
977 # define R128_SIGNED_DST_CLAMP (1 << 15)
978
979 # define R128_ALPHA_BLEND_ZERO (0 )
980 # define R128_ALPHA_BLEND_ONE (1 )
981 # define R128_ALPHA_BLEND_SRCCOLOR (2 )
982 # define R128_ALPHA_BLEND_INVSRCCOLOR (3 )
983 # define R128_ALPHA_BLEND_SRCALPHA (4 )
984 # define R128_ALPHA_BLEND_INVSRCALPHA (5 )
985 # define R128_ALPHA_BLEND_DSTALPHA (6 )
986 # define R128_ALPHA_BLEND_INVDSTALPHA (7 )
987 # define R128_ALPHA_BLEND_DSTCOLOR (8 )
988 # define R128_ALPHA_BLEND_INVDSTCOLOR (9 )
989 # define R128_ALPHA_BLEND_SAT (10) /* aka SRCALPHASAT */
990 # define R128_ALPHA_BLEND_BLEND (11) /* aka BOTHSRCALPHA */
991 # define R128_ALPHA_BLEND_INVBLEND (12) /* aka BOTHINVSRCALPHA */
992 # define R128_ALPHA_BLEND_MASK (15)
993
994 # define R128_ALPHA_BLEND_SRC_SHIFT (16)
995 # define R128_ALPHA_BLEND_DST_SHIFT (20)
996
997 # define R128_ALPHA_TEST_NEVER (0 << 24)
998 # define R128_ALPHA_TEST_LESS (1 << 24)
999 # define R128_ALPHA_TEST_LESSEQUAL (2 << 24)
1000 # define R128_ALPHA_TEST_EQUAL (3 << 24)
1001 # define R128_ALPHA_TEST_GREATEREQUAL (4 << 24)
1002 # define R128_ALPHA_TEST_GREATER (5 << 24)
1003 # define R128_ALPHA_TEST_NEQUAL (6 << 24)
1004 # define R128_ALPHA_TEST_ALWAYS (7 << 24)
1005 # define R128_ALPHA_TEST_MASK (7 << 24)
1006 # define R128_COMPOSITE_SHADOW_CMP_EQUAL (0 << 28)
1007 # define R128_COMPOSITE_SHADOW_CMP_NEQUAL (1 << 28)
1008 # define R128_COMPOSITE_SHADOW (1 << 29)
1009 # define R128_TEX_MAP_ALPHA_IN_TEXTURE (1 << 30)
1010 # define R128_TEX_CACHE_LINE_SIZE_8QW (0 << 31)
1011 # define R128_TEX_CACHE_LINE_SIZE_4QW (1 << 31)
1012 #define R128_SCALE_3D_DATATYPE 0x1a20
1013
1014 #define R128_SETUP_CNTL 0x1bc4
1015 # define R128_DONT_START_TRIANGLE (1 << 0)
1016 # define R128_Z_BIAS (0 << 1)
1017 # define R128_DONT_START_ANY_ON (1 << 2)
1018 # define R128_COLOR_SOLID_COLOR (0 << 3)
1019 # define R128_COLOR_FLAT_VERT_1 (1 << 3)
1020 # define R128_COLOR_FLAT_VERT_2 (2 << 3)
1021 # define R128_COLOR_FLAT_VERT_3 (3 << 3)
1022 # define R128_COLOR_GOURAUD (4 << 3)
1023 # define R128_PRIM_TYPE_TRI (0 << 7)
1024 # define R128_PRIM_TYPE_LINE (1 << 7)
1025 # define R128_PRIM_TYPE_POINT (2 << 7)
1026 # define R128_PRIM_TYPE_POLY_EDGE (3 << 7)
1027 # define R128_TEXTURE_ST_MULT_W (0 << 9)
1028 # define R128_TEXTURE_ST_DIRECT (1 << 9)
1029 # define R128_STARTING_VERTEX_1 (1 << 14)
1030 # define R128_STARTING_VERTEX_2 (2 << 14)
1031 # define R128_STARTING_VERTEX_3 (3 << 14)
1032 # define R128_ENDING_VERTEX_1 (1 << 16)
1033 # define R128_ENDING_VERTEX_2 (2 << 16)
1034 # define R128_ENDING_VERTEX_3 (3 << 16)
1035 # define R128_SU_POLY_LINE_LAST (0 << 18)
1036 # define R128_SU_POLY_LINE_NOT_LAST (1 << 18)
1037 # define R128_SUB_PIX_2BITS (0 << 19)
1038 # define R128_SUB_PIX_4BITS (1 << 19)
1039 # define R128_SET_UP_CONTINUE (1 << 31)
1040
1041 #define R128_WINDOW_XY_OFFSET 0x1bcc
1042 # define R128_WINDOW_Y_SHIFT 4
1043 # define R128_WINDOW_X_SHIFT 20
1044
1045 #define R128_Z_OFFSET_C 0x1c90
1046 #define R128_Z_PITCH_C 0x1c94
1047 # define R128_Z_TILE (1 << 16)
1048 #define R128_Z_STEN_CNTL_C 0x1c98
1049 # define R128_Z_PIX_WIDTH_16 (0 << 1)
1050 # define R128_Z_PIX_WIDTH_24 (1 << 1)
1051 # define R128_Z_PIX_WIDTH_32 (2 << 1)
1052 # define R128_Z_PIX_WIDTH_MASK (3 << 1)
1053 # define R128_Z_TEST_NEVER (0 << 4)
1054 # define R128_Z_TEST_LESS (1 << 4)
1055 # define R128_Z_TEST_LESSEQUAL (2 << 4)
1056 # define R128_Z_TEST_EQUAL (3 << 4)
1057 # define R128_Z_TEST_GREATEREQUAL (4 << 4)
1058 # define R128_Z_TEST_GREATER (5 << 4)
1059 # define R128_Z_TEST_NEQUAL (6 << 4)
1060 # define R128_Z_TEST_ALWAYS (7 << 4)
1061 # define R128_Z_TEST_MASK (7 << 4)
1062 # define R128_STENCIL_TEST_NEVER (0 << 12)
1063 # define R128_STENCIL_TEST_LESS (1 << 12)
1064 # define R128_STENCIL_TEST_LESSEQUAL (2 << 12)
1065 # define R128_STENCIL_TEST_EQUAL (3 << 12)
1066 # define R128_STENCIL_TEST_GREATEREQUAL (4 << 12)
1067 # define R128_STENCIL_TEST_GREATER (5 << 12)
1068 # define R128_STENCIL_TEST_NEQUAL (6 << 12)
1069 # define R128_STENCIL_TEST_ALWAYS (7 << 12)
1070 # define R128_STENCIL_TEST_MASK (7 << 12)
1071 # define R128_STENCIL_S_FAIL_KEEP (0 << 16)
1072 # define R128_STENCIL_S_FAIL_ZERO (1 << 16)
1073 # define R128_STENCIL_S_FAIL_REPLACE (2 << 16)
1074 # define R128_STENCIL_S_FAIL_INC (3 << 16)
1075 # define R128_STENCIL_S_FAIL_DEC (4 << 16)
1076 # define R128_STENCIL_S_FAIL_INV (5 << 16)
1077 # define R128_STENCIL_S_FAIL_INC_WRAP (6 << 16) /* GUESS */
1078 # define R128_STENCIL_S_FAIL_DEC_WRAP (7 << 16) /* GUESS */
1079 # define R128_STENCIL_S_FAIL_MASK (7 << 16)
1080 # define R128_STENCIL_ZPASS_KEEP (0 << 20)
1081 # define R128_STENCIL_ZPASS_ZERO (1 << 20)
1082 # define R128_STENCIL_ZPASS_REPLACE (2 << 20)
1083 # define R128_STENCIL_ZPASS_INC (3 << 20)
1084 # define R128_STENCIL_ZPASS_DEC (4 << 20)
1085 # define R128_STENCIL_ZPASS_INV (5 << 20)
1086 # define R128_STENCIL_ZPASS_INC_WRAP (6 << 20) /* GUESS */
1087 # define R128_STENCIL_ZPASS_DEC_WRAP (7 << 20) /* GUESS */
1088 # define R128_STENCIL_ZPASS_MASK (7 << 20)
1089 # define R128_STENCIL_ZFAIL_KEEP (0 << 24)
1090 # define R128_STENCIL_ZFAIL_ZERO (1 << 24)
1091 # define R128_STENCIL_ZFAIL_REPLACE (2 << 24)
1092 # define R128_STENCIL_ZFAIL_INC (3 << 24)
1093 # define R128_STENCIL_ZFAIL_DEC (4 << 24)
1094 # define R128_STENCIL_ZFAIL_INV (5 << 24)
1095 # define R128_STENCIL_ZFAIL_INC_WRAP (6 << 24) /* GUESS */
1096 # define R128_STENCIL_ZFAIL_DEC_WRAP (7 << 24) /* GUESS */
1097 # define R128_STENCIL_ZFAIL_MASK (7 << 24)
1098 #define R128_TEX_CNTL_C 0x1c9c
1099 # define R128_Z_ENABLE (1 << 0)
1100 # define R128_Z_WRITE_ENABLE (1 << 1)
1101 # define R128_STENCIL_ENABLE (1 << 3)
1102 # define R128_SHADE_ENABLE (0 << 4)
1103 # define R128_TEXMAP_ENABLE (1 << 4)
1104 # define R128_SEC_TEXMAP_ENABLE (1 << 5)
1105 # define R128_FOG_ENABLE (1 << 7)
1106 # define R128_DITHER_ENABLE (1 << 8)
1107 # define R128_ALPHA_ENABLE (1 << 9)
1108 # define R128_ALPHA_TEST_ENABLE (1 << 10)
1109 # define R128_SPEC_LIGHT_ENABLE (1 << 11)
1110 # define R128_TEX_CHROMA_KEY_ENABLE (1 << 12)
1111 # define R128_ALPHA_IN_TEX_COMPLETE_A (0 << 13)
1112 # define R128_ALPHA_IN_TEX_LSB_A (1 << 13)
1113 # define R128_LIGHT_DIS (0 << 14)
1114 # define R128_LIGHT_COPY (1 << 14)
1115 # define R128_LIGHT_MODULATE (2 << 14)
1116 # define R128_LIGHT_ADD (3 << 14)
1117 # define R128_LIGHT_BLEND_CONSTANT (4 << 14)
1118 # define R128_LIGHT_BLEND_TEXTURE (5 << 14)
1119 # define R128_LIGHT_BLEND_VERTEX (6 << 14)
1120 # define R128_LIGHT_BLEND_CONST_COLOR (7 << 14)
1121 # define R128_ALPHA_LIGHT_DIS (0 << 18)
1122 # define R128_ALPHA_LIGHT_COPY (1 << 18)
1123 # define R128_ALPHA_LIGHT_MODULATE (2 << 18)
1124 # define R128_ALPHA_LIGHT_ADD (3 << 18)
1125 # define R128_ANTI_ALIAS (1 << 21)
1126 # define R128_TEX_CACHE_FLUSH (1 << 23)
1127 # define R128_LOD_BIAS_SHIFT 24
1128 # define R128_LOD_BIAS_MASK (0xff << 24)
1129 #define R128_MISC_3D_STATE_CNTL_REG 0x1ca0
1130 # define R128_REF_ALPHA_MASK 0xff
1131 # define R128_MISC_SCALE_3D_NOOP (0 << 8)
1132 # define R128_MISC_SCALE_3D_SCALE (1 << 8)
1133 # define R128_MISC_SCALE_3D_TEXMAP_SHADE (2 << 8)
1134 # define R128_MISC_SCALE_PIX_BLEND (0 << 10)
1135 # define R128_MISC_SCALE_PIX_REPLICATE (1 << 10)
1136 /* Bits [14:12] are the same as R128_SCALE_3D_CNTL */
1137 /* Bit [15] is unknown */
1138 /* Bits [26:16] are the same as R128_SCALE_3D_CNTL */
1139 /* Bits [31:27] are unknown */
1140
1141 #define R128_TEXTURE_CLR_CMP_CLR_C 0x1ca4
1142 #define R128_TEXTURE_CLR_CMP_MSK_C 0x1ca8
1143 #define R128_FOG_COLOR_C 0x1cac
1144 # define R128_FOG_BLUE_SHIFT 0
1145 # define R128_FOG_GREEN_SHIFT 8
1146 # define R128_FOG_RED_SHIFT 16
1147 #define R128_PRIM_TEX_CNTL_C 0x1cb0
1148 # define R128_MIN_BLEND_NEAREST (0 << 1)
1149 # define R128_MIN_BLEND_LINEAR (1 << 1)
1150 # define R128_MIN_BLEND_MIPNEAREST (2 << 1)
1151 # define R128_MIN_BLEND_MIPLINEAR (3 << 1)
1152 # define R128_MIN_BLEND_LINEARMIPNEAREST (4 << 1)
1153 # define R128_MIN_BLEND_LINEARMIPLINEAR (5 << 1)
1154 # define R128_MIN_BLEND_MASK (7 << 1)
1155 # define R128_MAG_BLEND_NEAREST (0 << 4)
1156 # define R128_MAG_BLEND_LINEAR (1 << 4)
1157 # define R128_MAG_BLEND_MASK (7 << 4)
1158 # define R128_MIP_MAP_DISABLE (1 << 7)
1159 # define R128_TEX_CLAMP_S_WRAP (0 << 8)
1160 # define R128_TEX_CLAMP_S_MIRROR (1 << 8)
1161 # define R128_TEX_CLAMP_S_CLAMP (2 << 8)
1162 # define R128_TEX_CLAMP_S_BORDER_COLOR (3 << 8)
1163 # define R128_TEX_CLAMP_S_MASK (3 << 8)
1164 # define R128_TEX_WRAP_S (1 << 10)
1165 # define R128_TEX_CLAMP_T_WRAP (0 << 11)
1166 # define R128_TEX_CLAMP_T_MIRROR (1 << 11)
1167 # define R128_TEX_CLAMP_T_CLAMP (2 << 11)
1168 # define R128_TEX_CLAMP_T_BORDER_COLOR (3 << 11)
1169 # define R128_TEX_CLAMP_T_MASK (3 << 11)
1170 # define R128_TEX_WRAP_T (1 << 13)
1171 # define R128_TEX_PERSPECTIVE_DISABLE (1 << 14)
1172 # define R128_DATATYPE_VQ (0 << 16)
1173 # define R128_DATATYPE_CI4 (1 << 16)
1174 # define R128_DATATYPE_CI8 (2 << 16)
1175 # define R128_DATATYPE_ARGB1555 (3 << 16)
1176 # define R128_DATATYPE_RGB565 (4 << 16)
1177 # define R128_DATATYPE_RGB888 (5 << 16)
1178 # define R128_DATATYPE_ARGB8888 (6 << 16)
1179 # define R128_DATATYPE_RGB332 (7 << 16)
1180 # define R128_DATATYPE_Y8 (8 << 16)
1181 # define R128_DATATYPE_RGB8 (9 << 16)
1182 # define R128_DATATYPE_CI16 (10 << 16)
1183 # define R128_DATATYPE_YVYU422 (11 << 16)
1184 # define R128_DATATYPE_VYUY422 (12 << 16)
1185 # define R128_DATATYPE_AYUV444 (14 << 16)
1186 # define R128_DATATYPE_ARGB4444 (15 << 16)
1187 # define R128_PALLETE_EITHER (0 << 20)
1188 # define R128_PALLETE_1 (1 << 20)
1189 # define R128_PALLETE_2 (2 << 20)
1190 # define R128_PSEUDOCOLOR_DT_RGB565 (0 << 24)
1191 # define R128_PSEUDOCOLOR_DT_ARGB1555 (1 << 24)
1192 # define R128_PSEUDOCOLOR_DT_ARGB4444 (2 << 24)
1193 #define R128_PRIM_TEXTURE_COMBINE_CNTL_C 0x1cb4
1194 # define R128_COMB_DIS (0 << 0)
1195 # define R128_COMB_COPY (1 << 0)
1196 # define R128_COMB_COPY_INP (2 << 0)
1197 # define R128_COMB_MODULATE (3 << 0)
1198 # define R128_COMB_MODULATE2X (4 << 0)
1199 # define R128_COMB_MODULATE4X (5 << 0)
1200 # define R128_COMB_ADD (6 << 0)
1201 # define R128_COMB_ADD_SIGNED (7 << 0)
1202 # define R128_COMB_BLEND_VERTEX (8 << 0)
1203 # define R128_COMB_BLEND_TEXTURE (9 << 0)
1204 # define R128_COMB_BLEND_CONST (10 << 0)
1205 # define R128_COMB_BLEND_PREMULT (11 << 0)
1206 # define R128_COMB_BLEND_PREV (12 << 0)
1207 # define R128_COMB_BLEND_PREMULT_INV (13 << 0)
1208 # define R128_COMB_ADD_SIGNED2X (14 << 0)
1209 # define R128_COMB_BLEND_CONST_COLOR (15 << 0)
1210 # define R128_COMB_MASK (15 << 0)
1211 # define R128_COLOR_FACTOR_CONST_COLOR (0 << 4)
1212 # define R128_COLOR_FACTOR_NCONST_COLOR (1 << 4)
1213 # define R128_COLOR_FACTOR_TEX (4 << 4)
1214 # define R128_COLOR_FACTOR_NTEX (5 << 4)
1215 # define R128_COLOR_FACTOR_ALPHA (6 << 4)
1216 # define R128_COLOR_FACTOR_NALPHA (7 << 4)
1217 # define R128_COLOR_FACTOR_PREV_COLOR (8 << 4)
1218 # define R128_COLOR_FACTOR_MASK (15 << 4)
1219 # define R128_COMB_FCN_MSB (1 << 8)
1220 # define R128_INPUT_FACTOR_CONST_COLOR (2 << 10)
1221 # define R128_INPUT_FACTOR_CONST_ALPHA (3 << 10)
1222 # define R128_INPUT_FACTOR_INT_COLOR (4 << 10)
1223 # define R128_INPUT_FACTOR_INT_ALPHA (5 << 10)
1224 # define R128_INPUT_FACTOR_MASK (15 << 10)
1225 # define R128_COMB_ALPHA_DIS (0 << 14)
1226 # define R128_COMB_ALPHA_COPY (1 << 14)
1227 # define R128_COMB_ALPHA_COPY_INP (2 << 14)
1228 # define R128_COMB_ALPHA_MODULATE (3 << 14)
1229 # define R128_COMB_ALPHA_MODULATE2X (4 << 14)
1230 # define R128_COMB_ALPHA_MODULATE4X (5 << 14)
1231 # define R128_COMB_ALPHA_ADD (6 << 14)
1232 # define R128_COMB_ALPHA_ADD_SIGNED (7 << 14)
1233 # define R128_COMB_ALPHA_ADD_SIGNED2X (14 << 14)
1234 # define R128_COMB_ALPHA_MASK (15 << 14)
1235 # define R128_ALPHA_FACTOR_TEX_ALPHA (6 << 18)
1236 # define R128_ALPHA_FACTOR_NTEX_ALPHA (7 << 18)
1237 # define R128_ALPHA_FACTOR_MASK (15 << 18)
1238 # define R128_INP_FACTOR_A_CONST_ALPHA (1 << 25)
1239 # define R128_INP_FACTOR_A_INT_ALPHA (2 << 25)
1240 # define R128_INP_FACTOR_A_MASK (7 << 25)
1241 #define R128_TEX_SIZE_PITCH_C 0x1cb8
1242 # define R128_TEX_PITCH_SHIFT 0
1243 # define R128_TEX_SIZE_SHIFT 4
1244 # define R128_TEX_HEIGHT_SHIFT 8
1245 # define R128_TEX_MIN_SIZE_SHIFT 12
1246 # define R128_SEC_TEX_PITCH_SHIFT 16
1247 # define R128_SEC_TEX_SIZE_SHIFT 20
1248 # define R128_SEC_TEX_HEIGHT_SHIFT 24
1249 # define R128_SEC_TEX_MIN_SIZE_SHIFT 28
1250 # define R128_TEX_PITCH_MASK (0x0f << 0)
1251 # define R128_TEX_SIZE_MASK (0x0f << 4)
1252 # define R128_TEX_HEIGHT_MASK (0x0f << 8)
1253 # define R128_TEX_MIN_SIZE_MASK (0x0f << 12)
1254 # define R128_SEC_TEX_PITCH_MASK (0x0f << 16)
1255 # define R128_SEC_TEX_SIZE_MASK (0x0f << 20)
1256 # define R128_SEC_TEX_HEIGHT_MASK (0x0f << 24)
1257 # define R128_SEC_TEX_MIN_SIZE_MASK (0x0f << 28)
1258 # define R128_TEX_SIZE_PITCH_SHIFT 0
1259 # define R128_SEC_TEX_SIZE_PITCH_SHIFT 16
1260 # define R128_TEX_SIZE_PITCH_MASK (0xffff << 0)
1261 # define R128_SEC_TEX_SIZE_PITCH_MASK (0xffff << 16)
1262 #define R128_PRIM_TEX_0_OFFSET_C 0x1cbc
1263 #define R128_PRIM_TEX_1_OFFSET_C 0x1cc0
1264 #define R128_PRIM_TEX_2_OFFSET_C 0x1cc4
1265 #define R128_PRIM_TEX_3_OFFSET_C 0x1cc8
1266 #define R128_PRIM_TEX_4_OFFSET_C 0x1ccc
1267 #define R128_PRIM_TEX_5_OFFSET_C 0x1cd0
1268 #define R128_PRIM_TEX_6_OFFSET_C 0x1cd4
1269 #define R128_PRIM_TEX_7_OFFSET_C 0x1cd8
1270 #define R128_PRIM_TEX_8_OFFSET_C 0x1cdc
1271 #define R128_PRIM_TEX_9_OFFSET_C 0x1ce0
1272 #define R128_PRIM_TEX_10_OFFSET_C 0x1ce4
1273 # define R128_TEX_NO_TILE (0 << 30)
1274 # define R128_TEX_TILED_BY_HOST (1 << 30)
1275 # define R128_TEX_TILED_BY_STORAGE (2 << 30)
1276 # define R128_TEX_TILED_BY_STORAGE2 (3 << 30)
1277
1278 #define R128_SEC_TEX_CNTL_C 0x1d00
1279 # define R128_SEC_SELECT_PRIM_ST (0 << 0)
1280 # define R128_SEC_SELECT_SEC_ST (1 << 0)
1281 #define R128_SEC_TEX_COMBINE_CNTL_C 0x1d04
1282 # define R128_INPUT_FACTOR_PREV_COLOR (8 << 10)
1283 # define R128_INPUT_FACTOR_PREV_ALPHA (9 << 10)
1284 # define R128_INP_FACTOR_A_PREV_ALPHA (4 << 25)
1285 #define R128_SEC_TEX_0_OFFSET_C 0x1d08
1286 #define R128_SEC_TEX_1_OFFSET_C 0x1d0c
1287 #define R128_SEC_TEX_2_OFFSET_C 0x1d10
1288 #define R128_SEC_TEX_3_OFFSET_C 0x1d14
1289 #define R128_SEC_TEX_4_OFFSET_C 0x1d18
1290 #define R128_SEC_TEX_5_OFFSET_C 0x1d1c
1291 #define R128_SEC_TEX_6_OFFSET_C 0x1d20
1292 #define R128_SEC_TEX_7_OFFSET_C 0x1d24
1293 #define R128_SEC_TEX_8_OFFSET_C 0x1d28
1294 #define R128_SEC_TEX_9_OFFSET_C 0x1d2c
1295 #define R128_SEC_TEX_10_OFFSET_C 0x1d30
1296 #define R128_CONSTANT_COLOR_C 0x1d34
1297 # define R128_CONSTANT_BLUE_SHIFT 0
1298 # define R128_CONSTANT_GREEN_SHIFT 8
1299 # define R128_CONSTANT_RED_SHIFT 16
1300 # define R128_CONSTANT_ALPHA_SHIFT 24
1301 #define R128_PRIM_TEXTURE_BORDER_COLOR_C 0x1d38
1302 # define R128_PRIM_TEX_BORDER_BLUE_SHIFT 0
1303 # define R128_PRIM_TEX_BORDER_GREEN_SHIFT 8
1304 # define R128_PRIM_TEX_BORDER_RED_SHIFT 16
1305 # define R128_PRIM_TEX_BORDER_ALPHA_SHIFT 24
1306 #define R128_SEC_TEXTURE_BORDER_COLOR_C 0x1d3c
1307 # define R128_SEC_TEX_BORDER_BLUE_SHIFT 0
1308 # define R128_SEC_TEX_BORDER_GREEN_SHIFT 8
1309 # define R128_SEC_TEX_BORDER_RED_SHIFT 16
1310 # define R128_SEC_TEX_BORDER_ALPHA_SHIFT 24
1311 #define R128_STEN_REF_MASK_C 0x1d40
1312 # define R128_STEN_REFERENCE_SHIFT 0
1313 # define R128_STEN_MASK_SHIFT 16
1314 # define R128_STEN_WRITE_MASK_SHIFT 24
1315 #define R128_PLANE_3D_MASK_C 0x1d44
1316 #define R128_TEX_CACHE_STAT_COUNT 0x1974
1317
1318
1319 /* Constants */
1320 #define R128_AGP_TEX_OFFSET 0x02000000
1321
1322 #define R128_LAST_FRAME_REG R128_GUI_SCRATCH_REG0
1323
1324 /* CCE packet types */
1325 #define R128_CCE_PACKET0 0x00000000
1326 #define R128_CCE_PACKET0_ONE_REG_WR 0x00008000
1327 #define R128_CCE_PACKET1 0x40000000
1328 #define R128_CCE_PACKET2 0x80000000
1329 #define R128_CCE_PACKET3 0xC0000000
1330 #define R128_CCE_PACKET3_NOP 0xC0001000
1331 #define R128_CCE_PACKET3_PAINT 0xC0001100
1332 #define R128_CCE_PACKET3_BITBLT 0xC0001200
1333 #define R128_CCE_PACKET3_SMALLTEXT 0xC0001300
1334 #define R128_CCE_PACKET3_HOSTDATA_BLT 0xC0001400
1335 #define R128_CCE_PACKET3_POLYLINE 0xC0001500
1336 #define R128_CCE_PACKET3_SCALING 0xC0001600
1337 #define R128_CCE_PACKET3_TRANS_SCALING 0xC0001700
1338 #define R128_CCE_PACKET3_POLYSCANLINES 0xC0001800
1339 #define R128_CCE_PACKET3_NEXT_CHAR 0xC0001900
1340 #define R128_CCE_PACKET3_PAINT_MULTI 0xC0001A00
1341 #define R128_CCE_PACKET3_BITBLT_MULTI 0xC0001B00
1342 #define R128_CCE_PACKET3_PLY_NEXTSCAN 0xC0001D00
1343 #define R128_CCE_PACKET3_SET_SCISSORS 0xC0001E00
1344 #define R128_CCE_PACKET3_SET_MODE24BPP 0xC0001F00
1345 #define R128_CCE_PACKET3_CNTL_PAINT 0xC0009100
1346 #define R128_CCE_PACKET3_CNTL_BITBLT 0xC0009200
1347 #define R128_CCE_PACKET3_CNTL_SMALLTEXT 0xC0009300
1348 #define R128_CCE_PACKET3_CNTL_HOSTDATA_BLT 0xC0009400
1349 #define R128_CCE_PACKET3_CNTL_POLYLINE 0xC0009500
1350 #define R128_CCE_PACKET3_CNTL_SCALING 0xC0009600
1351 #define R128_CCE_PACKET3_CNTL_TRANS_SCALING 0xC0009700
1352 #define R128_CCE_PACKET3_CNTL_POLYSCANLINES 0xC0009800
1353 #define R128_CCE_PACKET3_CNTL_NEXT_CHAR 0xC0009900
1354 #define R128_CCE_PACKET3_CNTL_PAINT_MULTI 0xC0009A00
1355 #define R128_CCE_PACKET3_CNTL_BITBLT_MULTI 0xC0009B00
1356 #define R128_CCE_PACKET3_CNTL_TRANS_BITBLT 0xC0009C00
1357 #define R128_CCE_PACKET3_3D_SAVE_CONTEXT 0xC0002000
1358 #define R128_CCE_PACKET3_3D_PLAY_CONTEXT 0xC0002100
1359 #define R128_CCE_PACKET3_3D_RNDR_GEN_INDX_PRIM 0xC0002300
1360 #define R128_CCE_PACKET3_3D_RNDR_GEN_PRIM 0xC0002500
1361 #define R128_CCE_PACKET3_LOAD_PALETTE 0xC0002C00
1362 #define R128_CCE_PACKET3_PURGE 0xC0002D00
1363 #define R128_CCE_PACKET3_NEXT_VERTEX_BUNDLE 0xC0002E00
1364 # define R128_CCE_PACKET_MASK 0xC0000000
1365 # define R128_CCE_PACKET_COUNT_MASK 0x3fff0000
1366 # define R128_CCE_PACKET_MAX_DWORDS (1 << 12)
1367 # define R128_CCE_PACKET0_REG_MASK 0x000007ff
1368 # define R128_CCE_PACKET1_REG0_MASK 0x000007ff
1369 # define R128_CCE_PACKET1_REG1_MASK 0x003ff800
1370
1371 #define R128_CCE_VC_FRMT_RHW 0x00000001
1372 #define R128_CCE_VC_FRMT_DIFFUSE_BGR 0x00000002
1373 #define R128_CCE_VC_FRMT_DIFFUSE_A 0x00000004
1374 #define R128_CCE_VC_FRMT_DIFFUSE_ARGB 0x00000008
1375 #define R128_CCE_VC_FRMT_SPEC_BGR 0x00000010
1376 #define R128_CCE_VC_FRMT_SPEC_F 0x00000020
1377 #define R128_CCE_VC_FRMT_SPEC_FRGB 0x00000040
1378 #define R128_CCE_VC_FRMT_S_T 0x00000080
1379 #define R128_CCE_VC_FRMT_S2_T2 0x00000100
1380 #define R128_CCE_VC_FRMT_RHW2 0x00000200
1381
1382 #define R128_CCE_VC_CNTL_PRIM_TYPE_NONE 0x00000000
1383 #define R128_CCE_VC_CNTL_PRIM_TYPE_POINT 0x00000001
1384 #define R128_CCE_VC_CNTL_PRIM_TYPE_LINE 0x00000002
1385 #define R128_CCE_VC_CNTL_PRIM_TYPE_POLY_LINE 0x00000003
1386 #define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_LIST 0x00000004
1387 #define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_FAN 0x00000005
1388 #define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_STRIP 0x00000006
1389 #define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2 0x00000007
1390 #define R128_CCE_VC_CNTL_PRIM_WALK_IND 0x00000010
1391 #define R128_CCE_VC_CNTL_PRIM_WALK_LIST 0x00000020
1392 #define R128_CCE_VC_CNTL_PRIM_WALK_RING 0x00000030
1393 #define R128_CCE_VC_CNTL_NUM_SHIFT 16
1394
1395 /* hmm copyed blindly (no specs) from radeon.h ... */
1396 #define R128_RE_TOP_LEFT 0x26c0
1397 # define R128_RE_LEFT_SHIFT 0
1398 # define R128_RE_TOP_SHIFT 16
1399 #define R128_RE_WIDTH_HEIGHT 0x1c44
1400 # define R128_RE_WIDTH_SHIFT 0
1401 # define R128_RE_HEIGHT_SHIFT 16
1402
1403 #endif