src/mesa/drivers/dri/r128/server/r128_sarea.h

   1 /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128_sarea.h,v 1.7 2002/02/16 21:26:35 herrb Exp $ */
   2 /*
   3  * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
   4  *                      Precision Insight, Inc., Cedar Park, Texas, and
   5  *                      VA Linux Systems Inc., Fremont, California.
   6  *
   7  * All Rights Reserved.
   8  *
   9  * Permission is hereby granted, free of charge, to any person obtaining
  10  * a copy of this software and associated documentation files (the
  11  * "Software"), to deal in the Software without restriction, including
  12  * without limitation on the rights to use, copy, modify, merge,
  13  * publish, distribute, sublicense, and/or sell copies of the Software,
  14  * and to permit persons to whom the Software is furnished to do so,
  15  * subject to the following conditions:
  16  *
  17  * The above copyright notice and this permission notice (including the
  18  * next paragraph) shall be included in all copies or substantial
  19  * portions of the Software.
  20  *
  21  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  22  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  23  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  24  * NON-INFRINGEMENT.  IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
  25  * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  26  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  27  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  28  * OTHER DEALINGS IN THE SOFTWARE.
  29  */
  30
  31 /*
  32  * Authors:
  33  *   Kevin E. Martin <martin@valinux.com>
  34  *   Gareth Hughes <gareth@valinux.com>
  35  *
  36  */
  37
  38 #ifndef _R128_SAREA_H_
  39 #define _R128_SAREA_H_
  40
  41 /* WARNING: If you change any of these defines, make sure to change the
  42  * defines in the kernel file (r128_drm.h)
  43  */
  44 #ifndef __R128_SAREA_DEFINES__
  45 #define __R128_SAREA_DEFINES__
  46
  47 /* What needs to be changed for the current vertex buffer?
  48  */
  49 #define R128_UPLOAD_CONTEXT             0x001
  50 #define R128_UPLOAD_SETUP               0x002
  51 #define R128_UPLOAD_TEX0                0x004
  52 #define R128_UPLOAD_TEX1                0x008
  53 #define R128_UPLOAD_TEX0IMAGES          0x010
  54 #define R128_UPLOAD_TEX1IMAGES          0x020
  55 #define R128_UPLOAD_CORE                0x040
  56 #define R128_UPLOAD_MASKS               0x080
  57 #define R128_UPLOAD_WINDOW              0x100
  58 #define R128_UPLOAD_CLIPRECTS           0x200   /* handled client-side */
  59 #define R128_REQUIRE_QUIESCENCE         0x400
  60 #define R128_UPLOAD_ALL                 0x7ff
  61
  62 #define R128_FRONT                      0x1
  63 #define R128_BACK                       0x2
  64 #define R128_DEPTH                      0x4
  65
  66 /* Primitive types
  67  */
  68 #define R128_POINTS                     0x1
  69 #define R128_LINES                      0x2
  70 #define R128_LINE_STRIP                 0x3
  71 #define R128_TRIANGLES                  0x4
  72 #define R128_TRIANGLE_FAN               0x5
  73 #define R128_TRIANGLE_STRIP             0x6
  74
  75 /* Vertex/indirect buffer size
  76  */
  77 #define R128_BUFFER_SIZE                16384
  78
  79 /* Byte offsets for indirect buffer data
  80  */
  81 #define R128_INDEX_PRIM_OFFSET          20
  82 #define R128_HOSTDATA_BLIT_OFFSET       32
  83
  84 /* Keep these small for testing
  85  */
  86 #define R128_NR_SAREA_CLIPRECTS         12
  87
  88 /* There are 2 heaps (local/AGP).  Each region within a heap is a
  89  * minimum of 64k, and there are at most 64 of them per heap.
  90  */
  91 #define R128_CARD_HEAP                  0
  92 #define R128_AGP_HEAP                   1
  93 #define R128_NR_TEX_HEAPS               2
  94 #define R128_NR_TEX_REGIONS             64
  95 #define R128_LOG_TEX_GRANULARITY        16
  96
  97 #define R128_NR_CONTEXT_REGS            12
  98
  99 #define R128_MAX_TEXTURE_LEVELS         11
 100 #define R128_MAX_TEXTURE_UNITS          2
 101
 102 #endif /* __R128_SAREA_DEFINES__ */
 103
 104 typedef struct {
 105     /* Context state - can be written in one large chunk */
 106     unsigned int dst_pitch_offset_c;
 107     unsigned int dp_gui_master_cntl_c;
 108     unsigned int sc_top_left_c;
 109     unsigned int sc_bottom_right_c;
 110     unsigned int z_offset_c;
 111     unsigned int z_pitch_c;
 112     unsigned int z_sten_cntl_c;
 113     unsigned int tex_cntl_c;
 114     unsigned int misc_3d_state_cntl_reg;
 115     unsigned int texture_clr_cmp_clr_c;
 116     unsigned int texture_clr_cmp_msk_c;
 117     unsigned int fog_color_c;
 118
 119     /* Texture state */
 120     unsigned int tex_size_pitch_c;
 121     unsigned int constant_color_c;
 122
 123     /* Setup state */
 124     unsigned int pm4_vc_fpu_setup;
 125     unsigned int setup_cntl;
 126
 127     /* Mask state */
 128     unsigned int dp_write_mask;
 129     unsigned int sten_ref_mask_c;
 130     unsigned int plane_3d_mask_c;
 131
 132     /* Window state */
 133     unsigned int window_xy_offset;
 134
 135     /* Core state */
 136     unsigned int scale_3d_cntl;
 137 } r128_context_regs_t;
 138
 139 /* Setup registers for each texture unit
 140  */
 141 typedef struct {
 142     unsigned int tex_cntl;
 143     unsigned int tex_combine_cntl;
 144     unsigned int tex_size_pitch;
 145     unsigned int tex_offset[R128_MAX_TEXTURE_LEVELS];
 146     unsigned int tex_border_color;
 147 } r128_texture_regs_t;
 148
 149 typedef struct {
 150     /* The channel for communication of state information to the kernel
 151      * on firing a vertex buffer.
 152      */
 153     r128_context_regs_t ContextState;
 154     r128_texture_regs_t TexState[R128_MAX_TEXTURE_UNITS];
 155     unsigned int dirty;
 156     unsigned int vertsize;
 157     unsigned int vc_format;
 158
 159 #if defined(XF86DRI) | defined(_SOLO)
 160     /* The current cliprects, or a subset thereof.
 161      */
 162     XF86DRIClipRectRec boxes[R128_NR_SAREA_CLIPRECTS];
 163     unsigned int nbox;
 164 #endif
 165
 166     /* Counters for throttling of rendering clients.
 167      */
 168     unsigned int last_frame;
 169     unsigned int last_dispatch;
 170
 171     /* Maintain an LRU of contiguous regions of texture space.  If you
 172      * think you own a region of texture memory, and it has an age
 173      * different to the one you set, then you are mistaken and it has
 174      * been stolen by another client.  If global texAge hasn't changed,
 175      * there is no need to walk the list.
 176      *
 177      * These regions can be used as a proxy for the fine-grained texture
 178      * information of other clients - by maintaining them in the same
 179      * lru which is used to age their own textures, clients have an
 180      * approximate lru for the whole of global texture space, and can
 181      * make informed decisions as to which areas to kick out.  There is
 182      * no need to choose whether to kick out your own texture or someone
 183      * else's - simply eject them all in LRU order.
 184      */
 185                                 /* Last elt is sentinal */
 186     drmTextureRegion texList[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS+1];
 187                                 /* last time texture was uploaded */
 188     unsigned int texAge[R128_NR_TEX_HEAPS];
 189
 190     int ctxOwner;               /* last context to upload state */
 191     int pfAllowPageFlip;        /* set by the 2d driver, read by the client */
 192     int pfCurrentPage;          /* set by kernel, read by others */
 193 } R128SAREAPriv, *R128SAREAPrivPtr;
 194
 195 #endif