src/mesa/drivers/dri/r200/r200_cmdbuf.c

   1 /* $XFree86: xc/lib/GL/mesa/src/drv/r200/r200_cmdbuf.c,v 1.1 2002/10/30 12:51:51 alanh Exp $ */
   2 /*
   3 Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
   4
   5 The Weather Channel (TM) funded Tungsten Graphics to develop the
   6 initial release of the Radeon 8500 driver under the XFree86 license.
   7 This notice must be preserved.
   8
   9 Permission is hereby granted, free of charge, to any person obtaining
  10 a copy of this software and associated documentation files (the
  11 "Software"), to deal in the Software without restriction, including
  12 without limitation the rights to use, copy, modify, merge, publish,
  13 distribute, sublicense, and/or sell copies of the Software, and to
  14 permit persons to whom the Software is furnished to do so, subject to
  15 the following conditions:
  16
  17 The above copyright notice and this permission notice (including the
  18 next paragraph) shall be included in all copies or substantial
  19 portions of the Software.
  20
  21 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  22 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  23 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  24 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  25 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  26 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  27 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  28 */
  29
  30 /*
  31  * Authors:
  32  *   Keith Whitwell <keith@tungstengraphics.com>
  33  */
  34
  35 #include "glheader.h"
  36 #include "imports.h"
  37 #include "macros.h"
  38 #include "context.h"
  39 #include "swrast/swrast.h"
  40 #include "simple_list.h"
  41
  42 #include "r200_context.h"
  43 #include "r200_state.h"
  44 #include "r200_ioctl.h"
  45 #include "r200_tcl.h"
  46 #include "r200_sanity.h"
  47 #include "radeon_reg.h"
  48
  49 static void print_state_atom( struct r200_state_atom *state )
  50 {
  51    int i;
  52
  53    fprintf(stderr, "emit %s/%d\n", state->name, state->cmd_size);
  54
  55    if (0 & R200_DEBUG & DEBUG_VERBOSE)
  56       for (i = 0 ; i < state->cmd_size ; i++)
  57          fprintf(stderr, "\t%s[%d]: %x\n", state->name, i, state->cmd[i]);
  58
  59 }
  60
  61 /* The state atoms will be emitted in the order they appear in the atom list,
  62  * so this step is important.
  63  */
  64 void r200SetUpAtomList( r200ContextPtr rmesa )
  65 {
  66    int i, mtu;
  67
  68    mtu = rmesa->glCtx->Const.MaxTextureUnits;
  69
  70    make_empty_list(&rmesa->hw.atomlist);
  71    rmesa->hw.atomlist.name = "atom-list";
  72
  73    insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.ctx );
  74    insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.set );
  75    insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.lin );
  76    insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.msk );
  77    insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.vpt );
  78    insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.vtx );
  79    insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.vap );
  80    insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.vte );
  81    insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.msc );
  82    insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.cst );
  83    insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.zbs );
  84    insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.tcl );
  85    insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.msl );
  86    insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.tcg );
  87    insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.grd );
  88    insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.fog );
  89    insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.tam );
  90    insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.tf );
  91    insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.atf );
  92    for (i = 0; i < mtu; ++i)
  93        insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.tex[i] );
  94    for (i = 0; i < mtu; ++i)
  95        insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.cube[i] );
  96    for (i = 0; i < 6; ++i)
  97        insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.pix[i] );
  98    insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.afs[0] );
  99    insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.afs[1] );
 100    for (i = 0; i < 8; ++i)
 101        insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.lit[i] );
 102    for (i = 0; i < 3 + mtu; ++i)
 103        insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.mat[i] );
 104    insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.eye );
 105    insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.glt );
 106    for (i = 0; i < 2; ++i)
 107       insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.mtl[i] );
 108    for (i = 0; i < 6; ++i)
 109        insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.ucp[i] );
 110    /* FIXME: is this a good place to insert that atom ? */
 111    insert_at_tail( &rmesa->hw.atomlist, &rmesa->hw.prf );
 112 }
 113
 114 static void r200SaveHwState( r200ContextPtr rmesa )
 115 {
 116    struct r200_state_atom *atom;
 117    char * dest = rmesa->backup_store.cmd_buf;
 118
 119    if (R200_DEBUG & DEBUG_STATE)
 120       fprintf(stderr, "%s\n", __FUNCTION__);
 121
 122    rmesa->backup_store.cmd_used = 0;
 123
 124    foreach( atom, &rmesa->hw.atomlist ) {
 125       if ( atom->check( rmesa->glCtx, atom->idx ) ) {
 126          int size = atom->cmd_size * 4;
 127          memcpy( dest, atom->cmd, size);
 128          dest += size;
 129          rmesa->backup_store.cmd_used += size;
 130          if (R200_DEBUG & DEBUG_STATE)
 131             print_state_atom( atom );
 132       }
 133    }
 134
 135    assert( rmesa->backup_store.cmd_used <= R200_CMD_BUF_SZ );
 136    if (R200_DEBUG & DEBUG_STATE)
 137       fprintf(stderr, "Returning to r200EmitState\n");
 138 }
 139
 140 void r200EmitState( r200ContextPtr rmesa )
 141 {
 142    char *dest;
 143    int mtu;
 144    struct r200_state_atom *atom;
 145
 146    if (R200_DEBUG & (DEBUG_STATE|DEBUG_PRIMS))
 147       fprintf(stderr, "%s\n", __FUNCTION__);
 148
 149    if (rmesa->save_on_next_emit) {
 150       r200SaveHwState(rmesa);
 151       rmesa->save_on_next_emit = GL_FALSE;
 152    }
 153
 154    if (!rmesa->hw.is_dirty && !rmesa->hw.all_dirty)
 155       return;
 156
 157    mtu = rmesa->glCtx->Const.MaxTextureUnits;
 158
 159    /* To avoid going across the entire set of states multiple times, just check
 160     * for enough space for the case of emitting all state, and inline the
 161     * r200AllocCmdBuf code here without all the checks.
 162     */
 163    r200EnsureCmdBufSpace( rmesa, rmesa->hw.max_state_size );
 164
 165    /* we need to calculate dest after EnsureCmdBufSpace
 166       as we may flush the buffer - airlied */
 167    dest = rmesa->store.cmd_buf + rmesa->store.cmd_used;
 168    if (R200_DEBUG & DEBUG_STATE) {
 169       foreach( atom, &rmesa->hw.atomlist ) {
 170          if ( atom->dirty || rmesa->hw.all_dirty ) {
 171             if ( atom->check( rmesa->glCtx, atom->idx ) )
 172                print_state_atom( atom );
 173             else
 174                fprintf(stderr, "skip state %s\n", atom->name);
 175          }
 176       }
 177    }
 178
 179    foreach( atom, &rmesa->hw.atomlist ) {
 180       if ( rmesa->hw.all_dirty )
 181          atom->dirty = GL_TRUE;
 182       if ( atom->dirty ) {
 183          if ( atom->check( rmesa->glCtx, atom->idx ) ) {
 184             int size = atom->cmd_size * 4;
 185             memcpy( dest, atom->cmd, size);
 186             dest += size;
 187             rmesa->store.cmd_used += size;
 188             atom->dirty = GL_FALSE;
 189          }
 190       }
 191    }
 192
 193    assert( rmesa->store.cmd_used <= R200_CMD_BUF_SZ );
 194
 195    rmesa->hw.is_dirty = GL_FALSE;
 196    rmesa->hw.all_dirty = GL_FALSE;
 197 }
 198
 199 /* Fire a section of the retained (indexed_verts) buffer as a regular
 200  * primtive.
 201  */
 202 void r200EmitVbufPrim( r200ContextPtr rmesa,
 203                        GLuint primitive,
 204                        GLuint vertex_nr )
 205 {
 206    drm_radeon_cmd_header_t *cmd;
 207
 208    assert(!(primitive & R200_VF_PRIM_WALK_IND));
 209
 210    r200EmitState( rmesa );
 211
 212    if (R200_DEBUG & (DEBUG_IOCTL|DEBUG_PRIMS))
 213       fprintf(stderr, "%s cmd_used/4: %d prim %x nr %d\n", __FUNCTION__,
 214               rmesa->store.cmd_used/4, primitive, vertex_nr);
 215
 216    cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa, VBUF_BUFSZ,
 217                                                   __FUNCTION__ );
 218    cmd[0].i = 0;
 219    cmd[0].header.cmd_type = RADEON_CMD_PACKET3_CLIP;
 220    cmd[1].i = R200_CP_CMD_3D_DRAW_VBUF_2;
 221    cmd[2].i = (primitive |
 222                R200_VF_PRIM_WALK_LIST |
 223                R200_VF_COLOR_ORDER_RGBA |
 224                (vertex_nr << R200_VF_VERTEX_NUMBER_SHIFT));
 225 }
 226
 227
 228 void r200FlushElts( r200ContextPtr rmesa )
 229 {
 230    int *cmd = (int *)(rmesa->store.cmd_buf + rmesa->store.elts_start);
 231    int dwords;
 232    int nr = (rmesa->store.cmd_used - (rmesa->store.elts_start + 12)) / 2;
 233
 234    if (R200_DEBUG & (DEBUG_IOCTL|DEBUG_PRIMS))
 235       fprintf(stderr, "%s\n", __FUNCTION__);
 236
 237    assert( rmesa->dma.flush == r200FlushElts );
 238    rmesa->dma.flush = NULL;
 239
 240    /* Cope with odd number of elts:
 241     */
 242    rmesa->store.cmd_used = (rmesa->store.cmd_used + 2) & ~2;
 243    dwords = (rmesa->store.cmd_used - rmesa->store.elts_start) / 4;
 244
 245    cmd[1] |= (dwords - 3) << 16;
 246    cmd[2] |= nr << R200_VF_VERTEX_NUMBER_SHIFT;
 247
 248    if (R200_DEBUG & DEBUG_SYNC) {
 249       fprintf(stderr, "%s: Syncing\n", __FUNCTION__);
 250       r200Finish( rmesa->glCtx );
 251    }
 252 }
 253
 254
 255 GLushort *r200AllocEltsOpenEnded( r200ContextPtr rmesa,
 256                                     GLuint primitive,
 257                                     GLuint min_nr )
 258 {
 259    drm_radeon_cmd_header_t *cmd;
 260    GLushort *retval;
 261
 262    if (R200_DEBUG & DEBUG_IOCTL)
 263       fprintf(stderr, "%s %d prim %x\n", __FUNCTION__, min_nr, primitive);
 264
 265    assert((primitive & R200_VF_PRIM_WALK_IND));
 266
 267    r200EmitState( rmesa );
 268
 269    cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa, ELTS_BUFSZ(min_nr),
 270                                                 __FUNCTION__ );
 271    cmd[0].i = 0;
 272    cmd[0].header.cmd_type = RADEON_CMD_PACKET3_CLIP;
 273    cmd[1].i = R200_CP_CMD_3D_DRAW_INDX_2;
 274    cmd[2].i = (primitive |
 275                R200_VF_PRIM_WALK_IND |
 276                R200_VF_COLOR_ORDER_RGBA);
 277
 278
 279    retval = (GLushort *)(cmd+3);
 280
 281    if (R200_DEBUG & DEBUG_PRIMS)
 282       fprintf(stderr, "%s: header 0x%x prim %x \n",
 283               __FUNCTION__,
 284               cmd[1].i, primitive);
 285
 286    assert(!rmesa->dma.flush);
 287    rmesa->glCtx->Driver.NeedFlush |= FLUSH_STORED_VERTICES;
 288    rmesa->dma.flush = r200FlushElts;
 289
 290    rmesa->store.elts_start = ((char *)cmd) - rmesa->store.cmd_buf;
 291
 292    return retval;
 293 }
 294
 295
 296
 297 void r200EmitVertexAOS( r200ContextPtr rmesa,
 298                           GLuint vertex_size,
 299                           GLuint offset )
 300 {
 301    drm_radeon_cmd_header_t *cmd;
 302
 303    if (R200_DEBUG & (DEBUG_PRIMS|DEBUG_IOCTL))
 304       fprintf(stderr, "%s:  vertex_size 0x%x offset 0x%x \n",
 305               __FUNCTION__, vertex_size, offset);
 306
 307    cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa, VERT_AOS_BUFSZ,
 308                                                   __FUNCTION__ );
 309
 310    cmd[0].header.cmd_type = RADEON_CMD_PACKET3;
 311    cmd[1].i = R200_CP_CMD_3D_LOAD_VBPNTR | (2 << 16);
 312    cmd[2].i = 1;
 313    cmd[3].i = vertex_size | (vertex_size << 8);
 314    cmd[4].i = offset;
 315 }
 316
 317
 318 void r200EmitAOS( r200ContextPtr rmesa,
 319                     struct r200_dma_region **component,
 320                     GLuint nr,
 321                     GLuint offset )
 322 {
 323    drm_radeon_cmd_header_t *cmd;
 324    int sz = AOS_BUFSZ(nr);
 325    int i;
 326    int *tmp;
 327
 328    if (R200_DEBUG & DEBUG_IOCTL)
 329       fprintf(stderr, "%s nr arrays: %d\n", __FUNCTION__, nr);
 330
 331    cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa, sz, __FUNCTION__ );
 332    cmd[0].i = 0;
 333    cmd[0].header.cmd_type = RADEON_CMD_PACKET3;
 334    cmd[1].i = R200_CP_CMD_3D_LOAD_VBPNTR | (((sz / sizeof(int)) - 3) << 16);
 335    cmd[2].i = nr;
 336    tmp = &cmd[0].i;
 337    cmd += 3;
 338
 339    for (i = 0 ; i < nr ; i++) {
 340       if (i & 1) {
 341          cmd[0].i |= ((component[i]->aos_stride << 24) |
 342                       (component[i]->aos_size << 16));
 343          cmd[2].i = (component[i]->aos_start +
 344                      offset * component[i]->aos_stride * 4);
 345          cmd += 3;
 346       }
 347       else {
 348          cmd[0].i = ((component[i]->aos_stride << 8) |
 349                      (component[i]->aos_size << 0));
 350          cmd[1].i = (component[i]->aos_start +
 351                      offset * component[i]->aos_stride * 4);
 352       }
 353    }
 354
 355    if (R200_DEBUG & DEBUG_VERTS) {
 356       fprintf(stderr, "%s:\n", __FUNCTION__);
 357       for (i = 0 ; i < sz ; i++)
 358          fprintf(stderr, "   %d: %x\n", i, tmp[i]);
 359    }
 360 }
 361
 362 void r200EmitBlit( r200ContextPtr rmesa,
 363                    GLuint color_fmt,
 364                    GLuint src_pitch,
 365                    GLuint src_offset,
 366                    GLuint dst_pitch,
 367                    GLuint dst_offset,
 368                    GLint srcx, GLint srcy,
 369                    GLint dstx, GLint dsty,
 370                    GLuint w, GLuint h )
 371 {
 372    drm_radeon_cmd_header_t *cmd;
 373
 374    if (R200_DEBUG & DEBUG_IOCTL)
 375       fprintf(stderr, "%s src %x/%x %d,%d dst: %x/%x %d,%d sz: %dx%d\n",
 376               __FUNCTION__,
 377               src_pitch, src_offset, srcx, srcy,
 378               dst_pitch, dst_offset, dstx, dsty,
 379               w, h);
 380
 381    assert( (src_pitch & 63) == 0 );
 382    assert( (dst_pitch & 63) == 0 );
 383    assert( (src_offset & 1023) == 0 );
 384    assert( (dst_offset & 1023) == 0 );
 385    assert( w < (1<<16) );
 386    assert( h < (1<<16) );
 387
 388    cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa, 8 * sizeof(int),
 389                                                   __FUNCTION__ );
 390
 391
 392    cmd[0].header.cmd_type = RADEON_CMD_PACKET3;
 393    cmd[1].i = R200_CP_CMD_BITBLT_MULTI | (5 << 16);
 394    cmd[2].i = (RADEON_GMC_SRC_PITCH_OFFSET_CNTL |
 395                RADEON_GMC_DST_PITCH_OFFSET_CNTL |
 396                RADEON_GMC_BRUSH_NONE |
 397                (color_fmt << 8) |
 398                RADEON_GMC_SRC_DATATYPE_COLOR |
 399                RADEON_ROP3_S |
 400                RADEON_DP_SRC_SOURCE_MEMORY |
 401                RADEON_GMC_CLR_CMP_CNTL_DIS |
 402                RADEON_GMC_WR_MSK_DIS );
 403
 404    cmd[3].i = ((src_pitch/64)<<22) | (src_offset >> 10);
 405    cmd[4].i = ((dst_pitch/64)<<22) | (dst_offset >> 10);
 406    cmd[5].i = (srcx << 16) | srcy;
 407    cmd[6].i = (dstx << 16) | dsty; /* dst */
 408    cmd[7].i = (w << 16) | h;
 409 }
 410
 411
 412 void r200EmitWait( r200ContextPtr rmesa, GLuint flags )
 413 {
 414    if (rmesa->dri.drmMinor >= 6) {
 415       drm_radeon_cmd_header_t *cmd;
 416
 417       assert( !(flags & ~(RADEON_WAIT_2D|RADEON_WAIT_3D)) );
 418
 419       cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa, 1 * sizeof(int),
 420                                                    __FUNCTION__ );
 421       cmd[0].i = 0;
 422       cmd[0].wait.cmd_type = RADEON_CMD_WAIT;
 423       cmd[0].wait.flags = flags;
 424    }
 425 }