src/mesa/drivers/dri/r200/r200_context.c

   1 /*
   2 Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
   3
   4 The Weather Channel (TM) funded Tungsten Graphics to develop the
   5 initial release of the Radeon 8500 driver under the XFree86 license.
   6 This notice must be preserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /*
  31  * Authors:
  32  *   Keith Whitwell <keithw@vmware.com>
  33  */
  34
  35 #include <stdbool.h>
  36 #include "main/glheader.h"
  37 #include "main/api_arrayelt.h"
  38 #include "main/api_exec.h"
  39 #include "main/context.h"
  40 #include "main/simple_list.h"
  41 #include "main/imports.h"
  42 #include "main/extensions.h"
  43 #include "main/version.h"
  44 #include "main/vtxfmt.h"
  45
  46 #include "swrast/swrast.h"
  47 #include "swrast_setup/swrast_setup.h"
  48 #include "vbo/vbo.h"
  49
  50 #include "tnl/tnl.h"
  51 #include "tnl/t_pipeline.h"
  52
  53 #include "drivers/common/driverfuncs.h"
  54
  55 #include "r200_context.h"
  56 #include "r200_ioctl.h"
  57 #include "r200_state.h"
  58 #include "r200_tex.h"
  59 #include "r200_swtcl.h"
  60 #include "r200_tcl.h"
  61 #include "r200_vertprog.h"
  62 #include "radeon_queryobj.h"
  63 #include "r200_blit.h"
  64 #include "radeon_fog.h"
  65
  66 #include "radeon_span.h"
  67
  68 #include "utils.h"
  69 #include "xmlpool.h" /* for symbolic values of enum-type options */
  70
  71 /* Return various strings for glGetString().
  72  */
  73 static const GLubyte *r200GetString( struct gl_context *ctx, GLenum name )
  74 {
  75    r200ContextPtr rmesa = R200_CONTEXT(ctx);
  76    static char buffer[128];
  77    unsigned   offset;
  78    GLuint agp_mode = (rmesa->radeon.radeonScreen->card_type == RADEON_CARD_PCI)? 0 :
  79       rmesa->radeon.radeonScreen->AGPMode;
  80
  81    switch ( name ) {
  82    case GL_VENDOR:
  83       return (GLubyte *)"Mesa Project";
  84
  85    case GL_RENDERER:
  86       offset = driGetRendererString( buffer, "R200", agp_mode );
  87
  88       sprintf( & buffer[ offset ], " %sTCL",
  89                !(rmesa->radeon.TclFallback & R200_TCL_FALLBACK_TCL_DISABLE)
  90                ? "" : "NO-" );
  91
  92       return (GLubyte *)buffer;
  93
  94    default:
  95       return NULL;
  96    }
  97 }
  98
  99
 100 extern const struct tnl_pipeline_stage _r200_render_stage;
 101 extern const struct tnl_pipeline_stage _r200_tcl_stage;
 102
 103 static const struct tnl_pipeline_stage *r200_pipeline[] = {
 104
 105    /* Try and go straight to t&l
 106     */
 107    &_r200_tcl_stage,
 108
 109    /* Catch any t&l fallbacks
 110     */
 111    &_tnl_vertex_transform_stage,
 112    &_tnl_normal_transform_stage,
 113    &_tnl_lighting_stage,
 114    &_tnl_fog_coordinate_stage,
 115    &_tnl_texgen_stage,
 116    &_tnl_texture_transform_stage,
 117    &_tnl_point_attenuation_stage,
 118    &_tnl_vertex_program_stage,
 119    /* Try again to go to tcl?
 120     *     - no good for asymmetric-twoside (do with multipass)
 121     *     - no good for asymmetric-unfilled (do with multipass)
 122     *     - good for material
 123     *     - good for texgen
 124     *     - need to manipulate a bit of state
 125     *
 126     * - worth it/not worth it?
 127     */
 128
 129    /* Else do them here.
 130     */
 131 /*    &_r200_render_stage,  */ /* FIXME: bugs with ut2003 */
 132    &_tnl_render_stage,          /* FALLBACK:  */
 133    NULL,
 134 };
 135
 136
 137
 138 /* Initialize the driver's misc functions.
 139  */
 140 static void r200InitDriverFuncs( struct dd_function_table *functions )
 141 {
 142     functions->GetString                = r200GetString;
 143 }
 144
 145
 146 static void r200_get_lock(radeonContextPtr radeon)
 147 {
 148    r200ContextPtr rmesa = (r200ContextPtr)radeon;
 149    drm_radeon_sarea_t *sarea = radeon->sarea;
 150
 151    R200_STATECHANGE( rmesa, ctx );
 152    if (rmesa->radeon.sarea->tiling_enabled) {
 153       rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |= R200_COLOR_TILE_ENABLE;
 154    }
 155    else rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] &= ~R200_COLOR_TILE_ENABLE;
 156
 157    if ( sarea->ctx_owner != rmesa->radeon.dri.hwContext ) {
 158       sarea->ctx_owner = rmesa->radeon.dri.hwContext;
 159    }
 160
 161 }
 162
 163 static void r200_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
 164 {
 165 }
 166
 167 static void r200_emit_query_finish(radeonContextPtr radeon)
 168 {
 169    BATCH_LOCALS(radeon);
 170    struct radeon_query_object *query = radeon->query.current;
 171
 172    BEGIN_BATCH(4);
 173    OUT_BATCH(CP_PACKET0(RADEON_RB3D_ZPASS_ADDR, 0));
 174    OUT_BATCH_RELOC(0, query->bo, query->curr_offset, 0, RADEON_GEM_DOMAIN_GTT, 0);
 175    END_BATCH();
 176    query->curr_offset += sizeof(uint32_t);
 177    assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
 178    query->emitted_begin = GL_FALSE;
 179 }
 180
 181 static void r200_init_vtbl(radeonContextPtr radeon)
 182 {
 183    radeon->vtbl.get_lock = r200_get_lock;
 184    radeon->vtbl.update_viewport_offset = r200UpdateViewportOffset;
 185    radeon->vtbl.emit_cs_header = r200_vtbl_emit_cs_header;
 186    radeon->vtbl.swtcl_flush = r200_swtcl_flush;
 187    radeon->vtbl.fallback = r200Fallback;
 188    radeon->vtbl.update_scissor = r200_vtbl_update_scissor;
 189    radeon->vtbl.emit_query_finish = r200_emit_query_finish;
 190    radeon->vtbl.check_blit = r200_check_blit;
 191    radeon->vtbl.blit = r200_blit;
 192    radeon->vtbl.is_format_renderable = radeonIsFormatRenderable;
 193 }
 194
 195
 196 /* Create the device specific rendering context.
 197  */
 198 GLboolean r200CreateContext( gl_api api,
 199                              const struct gl_config *glVisual,
 200                              __DRIcontext *driContextPriv,
 201                              unsigned major_version,
 202                              unsigned minor_version,
 203                              uint32_t flags,
 204                              bool notify_reset,
 205                              unsigned *error,
 206                              void *sharedContextPrivate)
 207 {
 208    __DRIscreen *sPriv = driContextPriv->driScreenPriv;
 209    radeonScreenPtr screen = (radeonScreenPtr)(sPriv->driverPrivate);
 210    struct dd_function_table functions;
 211    r200ContextPtr rmesa;
 212    struct gl_context *ctx;
 213    int i;
 214    int tcl_mode;
 215
 216    if (flags & ~__DRI_CTX_FLAG_DEBUG) {
 217       *error = __DRI_CTX_ERROR_UNKNOWN_FLAG;
 218       return false;
 219    }
 220
 221    if (notify_reset) {
 222       *error = __DRI_CTX_ERROR_UNKNOWN_ATTRIBUTE;
 223       return false;
 224    }
 225
 226    assert(glVisual);
 227    assert(driContextPriv);
 228    assert(screen);
 229
 230    /* Allocate the R200 context */
 231    rmesa = calloc(1, sizeof(*rmesa));
 232    if ( !rmesa ) {
 233       *error = __DRI_CTX_ERROR_NO_MEMORY;
 234       return GL_FALSE;
 235    }
 236
 237    rmesa->radeon.radeonScreen = screen;
 238    r200_init_vtbl(&rmesa->radeon);
 239    /* init exp fog table data */
 240    radeonInitStaticFogData();
 241
 242    /* Parse configuration files.
 243     * Do this here so that initialMaxAnisotropy is set before we create
 244     * the default textures.
 245     */
 246    driParseConfigFiles (&rmesa->radeon.optionCache, &screen->optionCache,
 247                         screen->driScreen->myNum, "r200");
 248    rmesa->radeon.initialMaxAnisotropy = driQueryOptionf(&rmesa->radeon.optionCache,
 249                                                         "def_max_anisotropy");
 250
 251    if ( sPriv->drm_version.major == 1
 252        && driQueryOptionb( &rmesa->radeon.optionCache, "hyperz" ) ) {
 253       if ( sPriv->drm_version.minor < 13 )
 254          fprintf( stderr, "DRM version 1.%d too old to support HyperZ, "
 255                           "disabling.\n", sPriv->drm_version.minor );
 256       else
 257          rmesa->using_hyperz = GL_TRUE;
 258    }
 259
 260    if ( sPriv->drm_version.minor >= 15 )
 261       rmesa->texmicrotile = GL_TRUE;
 262
 263    /* Init default driver functions then plug in our R200-specific functions
 264     * (the texture functions are especially important)
 265     */
 266    _mesa_init_driver_functions(&functions);
 267    r200InitDriverFuncs(&functions);
 268    r200InitIoctlFuncs(&functions);
 269    r200InitStateFuncs(&rmesa->radeon, &functions);
 270    r200InitTextureFuncs(&rmesa->radeon, &functions);
 271    r200InitShaderFuncs(&functions);
 272    radeonInitQueryObjFunctions(&functions);
 273
 274    if (!radeonInitContext(&rmesa->radeon, api, &functions,
 275                           glVisual, driContextPriv,
 276                           sharedContextPrivate)) {
 277      free(rmesa);
 278      *error = __DRI_CTX_ERROR_NO_MEMORY;
 279      return GL_FALSE;
 280    }
 281
 282    rmesa->radeon.swtcl.RenderIndex = ~0;
 283    rmesa->radeon.hw.all_dirty = 1;
 284
 285    ctx = &rmesa->radeon.glCtx;
 286
 287    driContextSetFlags(ctx, flags);
 288
 289    /* Initialize the software rasterizer and helper modules.
 290     */
 291    _swrast_CreateContext( ctx );
 292    _vbo_CreateContext( ctx );
 293    _tnl_CreateContext( ctx );
 294    _swsetup_CreateContext( ctx );
 295    _ae_create_context( ctx );
 296
 297    ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->radeon.optionCache,
 298                                                  "texture_units");
 299    ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits = ctx->Const.MaxTextureUnits;
 300    ctx->Const.MaxTextureCoordUnits = ctx->Const.MaxTextureUnits;
 301
 302    ctx->Const.MaxCombinedTextureImageUnits = ctx->Const.MaxTextureUnits;
 303
 304    ctx->Const.StripTextureBorder = GL_TRUE;
 305
 306    /* FIXME: When no memory manager is available we should set this
 307     * to some reasonable value based on texture memory pool size */
 308    ctx->Const.MaxTextureLevels = 12;
 309    ctx->Const.Max3DTextureLevels = 9;
 310    ctx->Const.MaxCubeTextureLevels = 12;
 311    ctx->Const.MaxTextureRectSize = 2048;
 312    ctx->Const.MaxRenderbufferSize = 2048;
 313
 314    ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 315
 316    /* No wide AA points.
 317     */
 318    ctx->Const.MinPointSize = 1.0;
 319    ctx->Const.MinPointSizeAA = 1.0;
 320    ctx->Const.MaxPointSizeAA = 1.0;
 321    ctx->Const.PointSizeGranularity = 0.0625;
 322    ctx->Const.MaxPointSize = 2047.0;
 323
 324    /* mesa initialization problem - _mesa_init_point was already called */
 325    ctx->Point.MaxSize = ctx->Const.MaxPointSize;
 326
 327    ctx->Const.MinLineWidth = 1.0;
 328    ctx->Const.MinLineWidthAA = 1.0;
 329    ctx->Const.MaxLineWidth = 10.0;
 330    ctx->Const.MaxLineWidthAA = 10.0;
 331    ctx->Const.LineWidthGranularity = 0.0625;
 332
 333    ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeInstructions = R200_VSF_MAX_INST;
 334    ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAttribs = 12;
 335    ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTemps = R200_VSF_MAX_TEMPS;
 336    ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters = R200_VSF_MAX_PARAM;
 337    ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAddressRegs = 1;
 338
 339    ctx->Const.MaxDrawBuffers = 1;
 340    ctx->Const.MaxColorAttachments = 1;
 341
 342    ctx->ShaderCompilerOptions[MESA_SHADER_VERTEX].OptimizeForAOS = GL_TRUE;
 343
 344    /* Install the customized pipeline:
 345     */
 346    _tnl_destroy_pipeline( ctx );
 347    _tnl_install_pipeline( ctx, r200_pipeline );
 348
 349    /* Try and keep materials and vertices separate:
 350     */
 351 /*    _tnl_isolate_materials( ctx, GL_TRUE ); */
 352
 353
 354    /* Configure swrast and TNL to match hardware characteristics:
 355     */
 356    _swrast_allow_pixel_fog( ctx, GL_FALSE );
 357    _swrast_allow_vertex_fog( ctx, GL_TRUE );
 358    _tnl_allow_pixel_fog( ctx, GL_FALSE );
 359    _tnl_allow_vertex_fog( ctx, GL_TRUE );
 360
 361
 362    for ( i = 0 ; i < R200_MAX_TEXTURE_UNITS ; i++ ) {
 363       _math_matrix_ctr( &rmesa->TexGenMatrix[i] );
 364       _math_matrix_set_identity( &rmesa->TexGenMatrix[i] );
 365    }
 366    _math_matrix_ctr( &rmesa->tmpmat );
 367    _math_matrix_set_identity( &rmesa->tmpmat );
 368
 369    ctx->Extensions.ARB_half_float_pixel = true;
 370    ctx->Extensions.ARB_occlusion_query = true;
 371    ctx->Extensions.ARB_point_sprite = true;
 372    ctx->Extensions.ARB_texture_border_clamp = true;
 373    ctx->Extensions.ARB_texture_cube_map = true;
 374    ctx->Extensions.ARB_texture_env_combine = true;
 375    ctx->Extensions.ARB_texture_env_dot3 = true;
 376    ctx->Extensions.ARB_texture_env_crossbar = true;
 377    ctx->Extensions.ARB_texture_mirror_clamp_to_edge = true;
 378    ctx->Extensions.ARB_vertex_program = true;
 379    ctx->Extensions.ATI_fragment_shader = (ctx->Const.MaxTextureUnits == 6);
 380    ctx->Extensions.ATI_texture_env_combine3 = true;
 381    ctx->Extensions.ATI_texture_mirror_once = true;
 382    ctx->Extensions.EXT_blend_color = true;
 383    ctx->Extensions.EXT_blend_equation_separate = true;
 384    ctx->Extensions.EXT_blend_func_separate = true;
 385    ctx->Extensions.EXT_blend_minmax = true;
 386    ctx->Extensions.EXT_gpu_program_parameters = true;
 387    ctx->Extensions.EXT_point_parameters = true;
 388    ctx->Extensions.EXT_texture_env_dot3 = true;
 389    ctx->Extensions.EXT_texture_filter_anisotropic = true;
 390    ctx->Extensions.EXT_texture_mirror_clamp = true;
 391    ctx->Extensions.MESA_pack_invert = true;
 392    ctx->Extensions.NV_texture_rectangle = true;
 393    ctx->Extensions.OES_EGL_image = true;
 394
 395    if (!(rmesa->radeon.radeonScreen->chip_flags & R200_CHIPSET_YCBCR_BROKEN)) {
 396      /* yuv textures don't work with some chips - R200 / rv280 okay so far
 397         others get the bit ordering right but don't actually do YUV-RGB conversion */
 398       ctx->Extensions.MESA_ycbcr_texture = true;
 399    }
 400    if (rmesa->radeon.glCtx.Mesa_DXTn) {
 401       ctx->Extensions.EXT_texture_compression_s3tc = true;
 402       ctx->Extensions.ANGLE_texture_compression_dxt = true;
 403    }
 404    else if (driQueryOptionb (&rmesa->radeon.optionCache, "force_s3tc_enable")) {
 405       ctx->Extensions.EXT_texture_compression_s3tc = true;
 406       ctx->Extensions.ANGLE_texture_compression_dxt = true;
 407    }
 408
 409 #if 0
 410    r200InitDriverFuncs( ctx );
 411    r200InitIoctlFuncs( ctx );
 412    r200InitStateFuncs( ctx );
 413    r200InitTextureFuncs( ctx );
 414 #endif
 415    /* plug in a few more device driver functions */
 416    /* XXX these should really go right after _mesa_init_driver_functions() */
 417    radeon_fbo_init(&rmesa->radeon);
 418    radeonInitSpanFuncs( ctx );
 419    r200InitTnlFuncs( ctx );
 420    r200InitState( rmesa );
 421    r200InitSwtcl( ctx );
 422
 423    rmesa->prefer_gart_client_texturing =
 424       (getenv("R200_GART_CLIENT_TEXTURES") != 0);
 425
 426    tcl_mode = driQueryOptioni(&rmesa->radeon.optionCache, "tcl_mode");
 427    if (driQueryOptionb(&rmesa->radeon.optionCache, "no_rast")) {
 428       fprintf(stderr, "disabling 3D acceleration\n");
 429       FALLBACK(rmesa, R200_FALLBACK_DISABLE, 1);
 430    }
 431    else if (tcl_mode == DRI_CONF_TCL_SW || getenv("R200_NO_TCL") ||
 432             !(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
 433       if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
 434          rmesa->radeon.radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL;
 435          fprintf(stderr, "Disabling HW TCL support\n");
 436       }
 437       TCL_FALLBACK(&rmesa->radeon.glCtx, R200_TCL_FALLBACK_TCL_DISABLE, 1);
 438    }
 439
 440    _mesa_compute_version(ctx);
 441
 442    /* Exec table initialization requires the version to be computed */
 443    _mesa_initialize_dispatch_tables(ctx);
 444    _mesa_initialize_vbo_vtxfmt(ctx);
 445
 446    *error = __DRI_CTX_ERROR_SUCCESS;
 447    return GL_TRUE;
 448 }
 449
 450
 451 void r200DestroyContext( __DRIcontext *driContextPriv )
 452 {
 453         int i;
 454         r200ContextPtr rmesa = (r200ContextPtr)driContextPriv->driverPrivate;
 455         if (rmesa)
 456         {
 457                 for ( i = 0 ; i < R200_MAX_TEXTURE_UNITS ; i++ ) {
 458                         _math_matrix_dtr( &rmesa->TexGenMatrix[i] );
 459                 }
 460         }
 461         radeonDestroyContext(driContextPriv);
 462 }