r200: Add scissor to state atom list.
[mesa.git] / src / mesa / drivers / dri / r200 / r200_context.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
3
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /*
31 * Authors:
32 * Keith Whitwell <keith@tungstengraphics.com>
33 */
34
35 #include "main/glheader.h"
36 #include "main/api_arrayelt.h"
37 #include "main/context.h"
38 #include "main/simple_list.h"
39 #include "main/imports.h"
40 #include "main/matrix.h"
41 #include "main/extensions.h"
42 #include "main/framebuffer.h"
43 #include "main/state.h"
44
45 #include "swrast/swrast.h"
46 #include "swrast_setup/swrast_setup.h"
47 #include "vbo/vbo.h"
48
49 #include "tnl/tnl.h"
50 #include "tnl/t_pipeline.h"
51
52 #include "drivers/common/driverfuncs.h"
53
54 #include "r200_context.h"
55 #include "r200_ioctl.h"
56 #include "r200_state.h"
57 #include "r200_pixel.h"
58 #include "r200_tex.h"
59 #include "r200_swtcl.h"
60 #include "r200_tcl.h"
61 #include "r200_maos.h"
62 #include "r200_vertprog.h"
63
64 #include "radeon_span.h"
65
66 #define need_GL_ARB_vertex_program
67 #define need_GL_ATI_fragment_shader
68 #define need_GL_EXT_blend_minmax
69 #define need_GL_EXT_fog_coord
70 #define need_GL_EXT_secondary_color
71 #define need_GL_EXT_blend_equation_separate
72 #define need_GL_EXT_blend_func_separate
73 #define need_GL_NV_vertex_program
74 #define need_GL_ARB_point_parameters
75 #define need_GL_EXT_framebuffer_object
76 #include "extension_helper.h"
77
78 #define DRIVER_DATE "20060602"
79
80 #include "vblank.h"
81 #include "utils.h"
82 #include "xmlpool.h" /* for symbolic values of enum-type options */
83
84 /* Return various strings for glGetString().
85 */
86 static const GLubyte *r200GetString( GLcontext *ctx, GLenum name )
87 {
88 r200ContextPtr rmesa = R200_CONTEXT(ctx);
89 static char buffer[128];
90 unsigned offset;
91 GLuint agp_mode = (rmesa->radeon.radeonScreen->card_type == RADEON_CARD_PCI)? 0 :
92 rmesa->radeon.radeonScreen->AGPMode;
93
94 switch ( name ) {
95 case GL_VENDOR:
96 return (GLubyte *)"Tungsten Graphics, Inc.";
97
98 case GL_RENDERER:
99 offset = driGetRendererString( buffer, "R200", DRIVER_DATE,
100 agp_mode );
101
102 sprintf( & buffer[ offset ], " %sTCL",
103 !(rmesa->radeon.TclFallback & R200_TCL_FALLBACK_TCL_DISABLE)
104 ? "" : "NO-" );
105
106 return (GLubyte *)buffer;
107
108 default:
109 return NULL;
110 }
111 }
112
113
114 /* Extension strings exported by the R200 driver.
115 */
116 const struct dri_extension card_extensions[] =
117 {
118 { "GL_ARB_multitexture", NULL },
119 { "GL_ARB_texture_border_clamp", NULL },
120 { "GL_ARB_texture_env_add", NULL },
121 { "GL_ARB_texture_env_combine", NULL },
122 { "GL_ARB_texture_env_dot3", NULL },
123 { "GL_ARB_texture_env_crossbar", NULL },
124 { "GL_ARB_texture_mirrored_repeat", NULL },
125 { "GL_EXT_blend_minmax", GL_EXT_blend_minmax_functions },
126 { "GL_EXT_blend_subtract", NULL },
127 { "GL_EXT_fog_coord", GL_EXT_fog_coord_functions },
128 { "GL_EXT_packed_depth_stencil", NULL},
129 { "GL_EXT_secondary_color", GL_EXT_secondary_color_functions },
130 { "GL_EXT_stencil_wrap", NULL },
131 { "GL_EXT_texture_edge_clamp", NULL },
132 { "GL_EXT_texture_env_combine", NULL },
133 { "GL_EXT_texture_env_dot3", NULL },
134 { "GL_EXT_texture_filter_anisotropic", NULL },
135 { "GL_EXT_texture_lod_bias", NULL },
136 { "GL_EXT_texture_mirror_clamp", NULL },
137 { "GL_EXT_texture_rectangle", NULL },
138 { "GL_ATI_texture_env_combine3", NULL },
139 { "GL_ATI_texture_mirror_once", NULL },
140 { "GL_MESA_pack_invert", NULL },
141 { "GL_NV_blend_square", NULL },
142 { "GL_SGIS_generate_mipmap", NULL },
143 { NULL, NULL }
144 };
145
146 const struct dri_extension blend_extensions[] = {
147 { "GL_EXT_blend_equation_separate", GL_EXT_blend_equation_separate_functions },
148 { "GL_EXT_blend_func_separate", GL_EXT_blend_func_separate_functions },
149 { NULL, NULL }
150 };
151
152 const struct dri_extension ARB_vp_extension[] = {
153 { "GL_ARB_vertex_program", GL_ARB_vertex_program_functions }
154 };
155
156 const struct dri_extension NV_vp_extension[] = {
157 { "GL_NV_vertex_program", GL_NV_vertex_program_functions }
158 };
159
160 const struct dri_extension ATI_fs_extension[] = {
161 { "GL_ATI_fragment_shader", GL_ATI_fragment_shader_functions }
162 };
163
164 const struct dri_extension point_extensions[] = {
165 { "GL_ARB_point_sprite", NULL },
166 { "GL_ARB_point_parameters", GL_ARB_point_parameters_functions },
167 { NULL, NULL }
168 };
169
170 const struct dri_extension mm_extensions[] = {
171 { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
172 { NULL, NULL }
173 };
174
175 extern const struct tnl_pipeline_stage _r200_render_stage;
176 extern const struct tnl_pipeline_stage _r200_tcl_stage;
177
178 static const struct tnl_pipeline_stage *r200_pipeline[] = {
179
180 /* Try and go straight to t&l
181 */
182 &_r200_tcl_stage,
183
184 /* Catch any t&l fallbacks
185 */
186 &_tnl_vertex_transform_stage,
187 &_tnl_normal_transform_stage,
188 &_tnl_lighting_stage,
189 &_tnl_fog_coordinate_stage,
190 &_tnl_texgen_stage,
191 &_tnl_texture_transform_stage,
192 &_tnl_point_attenuation_stage,
193 &_tnl_vertex_program_stage,
194 /* Try again to go to tcl?
195 * - no good for asymmetric-twoside (do with multipass)
196 * - no good for asymmetric-unfilled (do with multipass)
197 * - good for material
198 * - good for texgen
199 * - need to manipulate a bit of state
200 *
201 * - worth it/not worth it?
202 */
203
204 /* Else do them here.
205 */
206 /* &_r200_render_stage, */ /* FIXME: bugs with ut2003 */
207 &_tnl_render_stage, /* FALLBACK: */
208 NULL,
209 };
210
211
212
213 /* Initialize the driver's misc functions.
214 */
215 static void r200InitDriverFuncs( struct dd_function_table *functions )
216 {
217 functions->GetBufferSize = NULL; /* OBSOLETE */
218 functions->GetString = r200GetString;
219 }
220
221 static const struct dri_debug_control debug_control[] =
222 {
223 { "fall", DEBUG_FALLBACKS },
224 { "tex", DEBUG_TEXTURE },
225 { "ioctl", DEBUG_IOCTL },
226 { "prim", DEBUG_PRIMS },
227 { "vert", DEBUG_VERTS },
228 { "state", DEBUG_STATE },
229 { "code", DEBUG_CODEGEN },
230 { "vfmt", DEBUG_VFMT },
231 { "vtxf", DEBUG_VFMT },
232 { "verb", DEBUG_VERBOSE },
233 { "dri", DEBUG_DRI },
234 { "dma", DEBUG_DMA },
235 { "san", DEBUG_SANITY },
236 { "sync", DEBUG_SYNC },
237 { "pix", DEBUG_PIXEL },
238 { "mem", DEBUG_MEMORY },
239 { NULL, 0 }
240 };
241
242 static void r200_get_lock(radeonContextPtr radeon)
243 {
244 r200ContextPtr rmesa = (r200ContextPtr)radeon;
245 drm_radeon_sarea_t *sarea = radeon->sarea;
246
247 R200_STATECHANGE( rmesa, ctx );
248 if (rmesa->radeon.sarea->tiling_enabled) {
249 rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |= R200_COLOR_TILE_ENABLE;
250 }
251 else rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] &= ~R200_COLOR_TILE_ENABLE;
252
253 if ( sarea->ctx_owner != rmesa->radeon.dri.hwContext ) {
254 sarea->ctx_owner = rmesa->radeon.dri.hwContext;
255 if (!radeon->radeonScreen->kernel_mm)
256 radeon_bo_legacy_texture_age(radeon->radeonScreen->bom);
257 }
258
259 }
260
261 static void r200_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
262 {
263 }
264
265
266 static void r200_init_vtbl(radeonContextPtr radeon)
267 {
268 radeon->vtbl.get_lock = r200_get_lock;
269 radeon->vtbl.update_viewport_offset = r200UpdateViewportOffset;
270 radeon->vtbl.emit_cs_header = r200_vtbl_emit_cs_header;
271 radeon->vtbl.swtcl_flush = r200_swtcl_flush;
272 radeon->vtbl.fallback = r200Fallback;
273 radeon->vtbl.update_scissor = r200_vtbl_update_scissor;
274 }
275
276
277 /* Create the device specific rendering context.
278 */
279 GLboolean r200CreateContext( const __GLcontextModes *glVisual,
280 __DRIcontextPrivate *driContextPriv,
281 void *sharedContextPrivate)
282 {
283 __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
284 radeonScreenPtr screen = (radeonScreenPtr)(sPriv->private);
285 struct dd_function_table functions;
286 r200ContextPtr rmesa;
287 GLcontext *ctx;
288 int i;
289 int tcl_mode;
290
291 assert(glVisual);
292 assert(driContextPriv);
293 assert(screen);
294
295 /* Allocate the R200 context */
296 rmesa = (r200ContextPtr) CALLOC( sizeof(*rmesa) );
297 if ( !rmesa )
298 return GL_FALSE;
299
300 r200_init_vtbl(&rmesa->radeon);
301 /* init exp fog table data */
302 r200InitStaticFogData();
303
304 /* Parse configuration files.
305 * Do this here so that initialMaxAnisotropy is set before we create
306 * the default textures.
307 */
308 driParseConfigFiles (&rmesa->radeon.optionCache, &screen->optionCache,
309 screen->driScreen->myNum, "r200");
310 rmesa->radeon.initialMaxAnisotropy = driQueryOptionf(&rmesa->radeon.optionCache,
311 "def_max_anisotropy");
312
313 if ( driQueryOptionb( &rmesa->radeon.optionCache, "hyperz" ) ) {
314 if ( sPriv->drm_version.minor < 13 )
315 fprintf( stderr, "DRM version 1.%d too old to support HyperZ, "
316 "disabling.\n", sPriv->drm_version.minor );
317 else
318 rmesa->using_hyperz = GL_TRUE;
319 }
320
321 if ( sPriv->drm_version.minor >= 15 )
322 rmesa->texmicrotile = GL_TRUE;
323
324 /* Init default driver functions then plug in our R200-specific functions
325 * (the texture functions are especially important)
326 */
327 _mesa_init_driver_functions(&functions);
328 r200InitDriverFuncs(&functions);
329 r200InitIoctlFuncs(&functions);
330 r200InitStateFuncs(&functions);
331 r200InitTextureFuncs(&functions);
332 r200InitShaderFuncs(&functions);
333
334 if (!radeonInitContext(&rmesa->radeon, &functions,
335 glVisual, driContextPriv,
336 sharedContextPrivate)) {
337 FREE(rmesa);
338 return GL_FALSE;
339 }
340
341 rmesa->radeon.swtcl.RenderIndex = ~0;
342 rmesa->radeon.hw.all_dirty = 1;
343
344 /* Set the maximum texture size small enough that we can guarentee that
345 * all texture units can bind a maximal texture and have all of them in
346 * texturable memory at once. Depending on the allow_large_textures driconf
347 * setting allow larger textures.
348 */
349
350 ctx = rmesa->radeon.glCtx;
351 ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->radeon.optionCache,
352 "texture_units");
353 ctx->Const.MaxTextureImageUnits = ctx->Const.MaxTextureUnits;
354 ctx->Const.MaxTextureCoordUnits = ctx->Const.MaxTextureUnits;
355
356 i = driQueryOptioni( &rmesa->radeon.optionCache, "allow_large_textures");
357
358 /* FIXME: When no memory manager is available we should set this
359 * to some reasonable value based on texture memory pool size */
360 ctx->Const.MaxTextureLevels = 12;
361 ctx->Const.Max3DTextureLevels = 9;
362 ctx->Const.MaxCubeTextureLevels = 12;
363 ctx->Const.MaxTextureRectSize = 2048;
364
365 ctx->Const.MaxTextureMaxAnisotropy = 16.0;
366
367 /* No wide AA points.
368 */
369 ctx->Const.MinPointSize = 1.0;
370 ctx->Const.MinPointSizeAA = 1.0;
371 ctx->Const.MaxPointSizeAA = 1.0;
372 ctx->Const.PointSizeGranularity = 0.0625;
373 if (rmesa->radeon.radeonScreen->drmSupportsPointSprites)
374 ctx->Const.MaxPointSize = 2047.0;
375 else
376 ctx->Const.MaxPointSize = 1.0;
377
378 /* mesa initialization problem - _mesa_init_point was already called */
379 ctx->Point.MaxSize = ctx->Const.MaxPointSize;
380
381 ctx->Const.MinLineWidth = 1.0;
382 ctx->Const.MinLineWidthAA = 1.0;
383 ctx->Const.MaxLineWidth = 10.0;
384 ctx->Const.MaxLineWidthAA = 10.0;
385 ctx->Const.LineWidthGranularity = 0.0625;
386
387 ctx->Const.VertexProgram.MaxNativeInstructions = R200_VSF_MAX_INST;
388 ctx->Const.VertexProgram.MaxNativeAttribs = 12;
389 ctx->Const.VertexProgram.MaxNativeTemps = R200_VSF_MAX_TEMPS;
390 ctx->Const.VertexProgram.MaxNativeParameters = R200_VSF_MAX_PARAM;
391 ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
392
393 ctx->Const.MaxDrawBuffers = 1;
394
395 _mesa_set_mvp_with_dp4( ctx, GL_TRUE );
396
397 /* Initialize the software rasterizer and helper modules.
398 */
399 _swrast_CreateContext( ctx );
400 _vbo_CreateContext( ctx );
401 _tnl_CreateContext( ctx );
402 _swsetup_CreateContext( ctx );
403 _ae_create_context( ctx );
404
405 /* Install the customized pipeline:
406 */
407 _tnl_destroy_pipeline( ctx );
408 _tnl_install_pipeline( ctx, r200_pipeline );
409
410 /* Try and keep materials and vertices separate:
411 */
412 /* _tnl_isolate_materials( ctx, GL_TRUE ); */
413
414
415 /* Configure swrast and TNL to match hardware characteristics:
416 */
417 _swrast_allow_pixel_fog( ctx, GL_FALSE );
418 _swrast_allow_vertex_fog( ctx, GL_TRUE );
419 _tnl_allow_pixel_fog( ctx, GL_FALSE );
420 _tnl_allow_vertex_fog( ctx, GL_TRUE );
421
422
423 for ( i = 0 ; i < R200_MAX_TEXTURE_UNITS ; i++ ) {
424 _math_matrix_ctr( &rmesa->TexGenMatrix[i] );
425 _math_matrix_set_identity( &rmesa->TexGenMatrix[i] );
426 }
427 _math_matrix_ctr( &rmesa->tmpmat );
428 _math_matrix_set_identity( &rmesa->tmpmat );
429
430 driInitExtensions( ctx, card_extensions, GL_TRUE );
431
432 if (rmesa->radeon.radeonScreen->kernel_mm)
433 driInitExtensions(ctx, mm_extensions, GL_FALSE);
434 if (!(rmesa->radeon.radeonScreen->chip_flags & R200_CHIPSET_YCBCR_BROKEN)) {
435 /* yuv textures don't work with some chips - R200 / rv280 okay so far
436 others get the bit ordering right but don't actually do YUV-RGB conversion */
437 _mesa_enable_extension( ctx, "GL_MESA_ycbcr_texture" );
438 }
439 if (rmesa->radeon.glCtx->Mesa_DXTn) {
440 _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
441 _mesa_enable_extension( ctx, "GL_S3_s3tc" );
442 }
443 else if (driQueryOptionb (&rmesa->radeon.optionCache, "force_s3tc_enable")) {
444 _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
445 }
446
447 if (rmesa->radeon.radeonScreen->drmSupportsCubeMapsR200)
448 _mesa_enable_extension( ctx, "GL_ARB_texture_cube_map" );
449 if (rmesa->radeon.radeonScreen->drmSupportsBlendColor) {
450 driInitExtensions( ctx, blend_extensions, GL_FALSE );
451 }
452 if(rmesa->radeon.radeonScreen->drmSupportsVertexProgram)
453 driInitSingleExtension( ctx, ARB_vp_extension );
454 if(driQueryOptionb(&rmesa->radeon.optionCache, "nv_vertex_program"))
455 driInitSingleExtension( ctx, NV_vp_extension );
456
457 if ((ctx->Const.MaxTextureUnits == 6) && rmesa->radeon.radeonScreen->drmSupportsFragShader)
458 driInitSingleExtension( ctx, ATI_fs_extension );
459 if (rmesa->radeon.radeonScreen->drmSupportsPointSprites)
460 driInitExtensions( ctx, point_extensions, GL_FALSE );
461 #if 0
462 r200InitDriverFuncs( ctx );
463 r200InitIoctlFuncs( ctx );
464 r200InitStateFuncs( ctx );
465 r200InitTextureFuncs( ctx );
466 #endif
467 /* plug in a few more device driver functions */
468 /* XXX these should really go right after _mesa_init_driver_functions() */
469 radeon_fbo_init(&rmesa->radeon);
470 radeonInitSpanFuncs( ctx );
471 r200InitPixelFuncs( ctx );
472 r200InitTnlFuncs( ctx );
473 r200InitState( rmesa );
474 r200InitSwtcl( ctx );
475
476 rmesa->prefer_gart_client_texturing =
477 (getenv("R200_GART_CLIENT_TEXTURES") != 0);
478
479 #if DO_DEBUG
480 R200_DEBUG = driParseDebugString( getenv( "R200_DEBUG" ),
481 debug_control );
482 R200_DEBUG |= driParseDebugString( getenv( "RADEON_DEBUG" ),
483 debug_control );
484 #endif
485
486 tcl_mode = driQueryOptioni(&rmesa->radeon.optionCache, "tcl_mode");
487 if (driQueryOptionb(&rmesa->radeon.optionCache, "no_rast")) {
488 fprintf(stderr, "disabling 3D acceleration\n");
489 FALLBACK(rmesa, R200_FALLBACK_DISABLE, 1);
490 }
491 else if (tcl_mode == DRI_CONF_TCL_SW || getenv("R200_NO_TCL") ||
492 !(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
493 if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
494 rmesa->radeon.radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL;
495 fprintf(stderr, "Disabling HW TCL support\n");
496 }
497 TCL_FALLBACK(rmesa->radeon.glCtx, R200_TCL_FALLBACK_TCL_DISABLE, 1);
498 }
499
500 return GL_TRUE;
501 }
502
503
504 void r200DestroyContext( __DRIcontextPrivate *driContextPriv )
505 {
506 int i;
507 r200ContextPtr rmesa = (r200ContextPtr)driContextPriv->driverPrivate;
508 if (rmesa)
509 {
510 for ( i = 0 ; i < R200_MAX_TEXTURE_UNITS ; i++ ) {
511 _math_matrix_dtr( &rmesa->TexGenMatrix[i] );
512 }
513 }
514 radeonDestroyContext(driContextPriv);
515 }