e8e7a42099b0f6163726caa4a7f7591a18aa149b
[mesa.git] / src / mesa / drivers / dri / r200 / r200_context.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
3
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /*
31 * Authors:
32 * Keith Whitwell <keith@tungstengraphics.com>
33 */
34
35 #include "main/glheader.h"
36 #include "main/api_arrayelt.h"
37 #include "main/context.h"
38 #include "main/simple_list.h"
39 #include "main/imports.h"
40 #include "main/matrix.h"
41 #include "main/extensions.h"
42 #include "main/framebuffer.h"
43 #include "main/state.h"
44
45 #include "swrast/swrast.h"
46 #include "swrast_setup/swrast_setup.h"
47 #include "vbo/vbo.h"
48
49 #include "tnl/tnl.h"
50 #include "tnl/t_pipeline.h"
51
52 #include "drivers/common/driverfuncs.h"
53
54 #include "r200_context.h"
55 #include "r200_ioctl.h"
56 #include "r200_state.h"
57 #include "r200_pixel.h"
58 #include "r200_tex.h"
59 #include "r200_swtcl.h"
60 #include "r200_tcl.h"
61 #include "r200_maos.h"
62 #include "r200_vertprog.h"
63 #include "radeon_queryobj.h"
64
65 #include "radeon_span.h"
66
67 #define need_GL_ARB_occlusion_query
68 #define need_GL_ARB_vertex_program
69 #define need_GL_ATI_fragment_shader
70 #define need_GL_EXT_blend_minmax
71 #define need_GL_EXT_fog_coord
72 #define need_GL_EXT_secondary_color
73 #define need_GL_EXT_blend_equation_separate
74 #define need_GL_EXT_blend_func_separate
75 #define need_GL_NV_vertex_program
76 #define need_GL_ARB_point_parameters
77 #define need_GL_EXT_framebuffer_object
78 #include "extension_helper.h"
79
80 #define DRIVER_DATE "20060602"
81
82 #include "vblank.h"
83 #include "utils.h"
84 #include "xmlpool.h" /* for symbolic values of enum-type options */
85
86 /* Return various strings for glGetString().
87 */
88 static const GLubyte *r200GetString( GLcontext *ctx, GLenum name )
89 {
90 r200ContextPtr rmesa = R200_CONTEXT(ctx);
91 static char buffer[128];
92 unsigned offset;
93 GLuint agp_mode = (rmesa->radeon.radeonScreen->card_type == RADEON_CARD_PCI)? 0 :
94 rmesa->radeon.radeonScreen->AGPMode;
95
96 switch ( name ) {
97 case GL_VENDOR:
98 return (GLubyte *)"Tungsten Graphics, Inc.";
99
100 case GL_RENDERER:
101 offset = driGetRendererString( buffer, "R200", DRIVER_DATE,
102 agp_mode );
103
104 sprintf( & buffer[ offset ], " %sTCL",
105 !(rmesa->radeon.TclFallback & R200_TCL_FALLBACK_TCL_DISABLE)
106 ? "" : "NO-" );
107
108 return (GLubyte *)buffer;
109
110 default:
111 return NULL;
112 }
113 }
114
115
116 /* Extension strings exported by the R200 driver.
117 */
118 const struct dri_extension card_extensions[] =
119 {
120 { "GL_ARB_multitexture", NULL },
121 { "GL_ARB_occlusion_query", GL_ARB_occlusion_query_functions},
122 { "GL_ARB_texture_border_clamp", NULL },
123 { "GL_ARB_texture_env_add", NULL },
124 { "GL_ARB_texture_env_combine", NULL },
125 { "GL_ARB_texture_env_dot3", NULL },
126 { "GL_ARB_texture_env_crossbar", NULL },
127 { "GL_ARB_texture_mirrored_repeat", NULL },
128 { "GL_EXT_blend_minmax", GL_EXT_blend_minmax_functions },
129 { "GL_EXT_blend_subtract", NULL },
130 { "GL_EXT_fog_coord", GL_EXT_fog_coord_functions },
131 { "GL_EXT_packed_depth_stencil", NULL},
132 { "GL_EXT_secondary_color", GL_EXT_secondary_color_functions },
133 { "GL_EXT_stencil_wrap", NULL },
134 { "GL_EXT_texture_edge_clamp", NULL },
135 { "GL_EXT_texture_env_combine", NULL },
136 { "GL_EXT_texture_env_dot3", NULL },
137 { "GL_EXT_texture_filter_anisotropic", NULL },
138 { "GL_EXT_texture_lod_bias", NULL },
139 { "GL_EXT_texture_mirror_clamp", NULL },
140 { "GL_EXT_texture_rectangle", NULL },
141 { "GL_ATI_texture_env_combine3", NULL },
142 { "GL_ATI_texture_mirror_once", NULL },
143 { "GL_MESA_pack_invert", NULL },
144 { "GL_NV_blend_square", NULL },
145 { "GL_SGIS_generate_mipmap", NULL },
146 { NULL, NULL }
147 };
148
149 const struct dri_extension blend_extensions[] = {
150 { "GL_EXT_blend_equation_separate", GL_EXT_blend_equation_separate_functions },
151 { "GL_EXT_blend_func_separate", GL_EXT_blend_func_separate_functions },
152 { NULL, NULL }
153 };
154
155 const struct dri_extension ARB_vp_extension[] = {
156 { "GL_ARB_vertex_program", GL_ARB_vertex_program_functions }
157 };
158
159 const struct dri_extension NV_vp_extension[] = {
160 { "GL_NV_vertex_program", GL_NV_vertex_program_functions }
161 };
162
163 const struct dri_extension ATI_fs_extension[] = {
164 { "GL_ATI_fragment_shader", GL_ATI_fragment_shader_functions }
165 };
166
167 const struct dri_extension point_extensions[] = {
168 { "GL_ARB_point_sprite", NULL },
169 { "GL_ARB_point_parameters", GL_ARB_point_parameters_functions },
170 { NULL, NULL }
171 };
172
173 const struct dri_extension mm_extensions[] = {
174 { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
175 { NULL, NULL }
176 };
177
178 extern const struct tnl_pipeline_stage _r200_render_stage;
179 extern const struct tnl_pipeline_stage _r200_tcl_stage;
180
181 static const struct tnl_pipeline_stage *r200_pipeline[] = {
182
183 /* Try and go straight to t&l
184 */
185 &_r200_tcl_stage,
186
187 /* Catch any t&l fallbacks
188 */
189 &_tnl_vertex_transform_stage,
190 &_tnl_normal_transform_stage,
191 &_tnl_lighting_stage,
192 &_tnl_fog_coordinate_stage,
193 &_tnl_texgen_stage,
194 &_tnl_texture_transform_stage,
195 &_tnl_point_attenuation_stage,
196 &_tnl_vertex_program_stage,
197 /* Try again to go to tcl?
198 * - no good for asymmetric-twoside (do with multipass)
199 * - no good for asymmetric-unfilled (do with multipass)
200 * - good for material
201 * - good for texgen
202 * - need to manipulate a bit of state
203 *
204 * - worth it/not worth it?
205 */
206
207 /* Else do them here.
208 */
209 /* &_r200_render_stage, */ /* FIXME: bugs with ut2003 */
210 &_tnl_render_stage, /* FALLBACK: */
211 NULL,
212 };
213
214
215
216 /* Initialize the driver's misc functions.
217 */
218 static void r200InitDriverFuncs( struct dd_function_table *functions )
219 {
220 functions->GetBufferSize = NULL; /* OBSOLETE */
221 functions->GetString = r200GetString;
222 }
223
224 static const struct dri_debug_control debug_control[] =
225 {
226 { "fall", DEBUG_FALLBACKS },
227 { "tex", DEBUG_TEXTURE },
228 { "ioctl", DEBUG_IOCTL },
229 { "prim", DEBUG_PRIMS },
230 { "vert", DEBUG_VERTS },
231 { "state", DEBUG_STATE },
232 { "code", DEBUG_CODEGEN },
233 { "vfmt", DEBUG_VFMT },
234 { "vtxf", DEBUG_VFMT },
235 { "verb", DEBUG_VERBOSE },
236 { "dri", DEBUG_DRI },
237 { "dma", DEBUG_DMA },
238 { "san", DEBUG_SANITY },
239 { "sync", DEBUG_SYNC },
240 { "pix", DEBUG_PIXEL },
241 { "mem", DEBUG_MEMORY },
242 { NULL, 0 }
243 };
244
245 static void r200_get_lock(radeonContextPtr radeon)
246 {
247 r200ContextPtr rmesa = (r200ContextPtr)radeon;
248 drm_radeon_sarea_t *sarea = radeon->sarea;
249
250 R200_STATECHANGE( rmesa, ctx );
251 if (rmesa->radeon.sarea->tiling_enabled) {
252 rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |= R200_COLOR_TILE_ENABLE;
253 }
254 else rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] &= ~R200_COLOR_TILE_ENABLE;
255
256 if ( sarea->ctx_owner != rmesa->radeon.dri.hwContext ) {
257 sarea->ctx_owner = rmesa->radeon.dri.hwContext;
258 if (!radeon->radeonScreen->kernel_mm)
259 radeon_bo_legacy_texture_age(radeon->radeonScreen->bom);
260 }
261
262 }
263
264 static void r200_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
265 {
266 }
267
268 static void r200_emit_query_finish(radeonContextPtr radeon)
269 {
270 BATCH_LOCALS(radeon);
271 struct radeon_query_object *query = radeon->query.current;
272
273 BEGIN_BATCH_NO_AUTOSTATE(4);
274 OUT_BATCH(CP_PACKET0(RADEON_RB3D_ZPASS_ADDR, 0));
275 OUT_BATCH_RELOC(0, query->bo, query->curr_offset, 0, RADEON_GEM_DOMAIN_GTT, 0);
276 END_BATCH();
277 query->curr_offset += sizeof(uint32_t);
278 assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
279 query->emitted_begin = GL_FALSE;
280 }
281
282 static void r200_init_vtbl(radeonContextPtr radeon)
283 {
284 radeon->vtbl.get_lock = r200_get_lock;
285 radeon->vtbl.update_viewport_offset = r200UpdateViewportOffset;
286 radeon->vtbl.emit_cs_header = r200_vtbl_emit_cs_header;
287 radeon->vtbl.swtcl_flush = r200_swtcl_flush;
288 radeon->vtbl.fallback = r200Fallback;
289 radeon->vtbl.update_scissor = r200_vtbl_update_scissor;
290 radeon->vtbl.emit_query_finish = r200_emit_query_finish;
291 }
292
293
294 /* Create the device specific rendering context.
295 */
296 GLboolean r200CreateContext( const __GLcontextModes *glVisual,
297 __DRIcontextPrivate *driContextPriv,
298 void *sharedContextPrivate)
299 {
300 __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
301 radeonScreenPtr screen = (radeonScreenPtr)(sPriv->private);
302 struct dd_function_table functions;
303 r200ContextPtr rmesa;
304 GLcontext *ctx;
305 int i;
306 int tcl_mode;
307
308 assert(glVisual);
309 assert(driContextPriv);
310 assert(screen);
311
312 /* Allocate the R200 context */
313 rmesa = (r200ContextPtr) CALLOC( sizeof(*rmesa) );
314 if ( !rmesa )
315 return GL_FALSE;
316
317 r200_init_vtbl(&rmesa->radeon);
318 /* init exp fog table data */
319 r200InitStaticFogData();
320
321 /* Parse configuration files.
322 * Do this here so that initialMaxAnisotropy is set before we create
323 * the default textures.
324 */
325 driParseConfigFiles (&rmesa->radeon.optionCache, &screen->optionCache,
326 screen->driScreen->myNum, "r200");
327 rmesa->radeon.initialMaxAnisotropy = driQueryOptionf(&rmesa->radeon.optionCache,
328 "def_max_anisotropy");
329
330 if ( sPriv->drm_version.major == 1
331 && driQueryOptionb( &rmesa->radeon.optionCache, "hyperz" ) ) {
332 if ( sPriv->drm_version.minor < 13 )
333 fprintf( stderr, "DRM version 1.%d too old to support HyperZ, "
334 "disabling.\n", sPriv->drm_version.minor );
335 else
336 rmesa->using_hyperz = GL_TRUE;
337 }
338
339 if ( sPriv->drm_version.minor >= 15 )
340 rmesa->texmicrotile = GL_TRUE;
341
342 /* Init default driver functions then plug in our R200-specific functions
343 * (the texture functions are especially important)
344 */
345 _mesa_init_driver_functions(&functions);
346 r200InitDriverFuncs(&functions);
347 r200InitIoctlFuncs(&functions);
348 r200InitStateFuncs(&functions);
349 r200InitTextureFuncs(&functions);
350 r200InitShaderFuncs(&functions);
351 radeonInitQueryObjFunctions(&functions);
352
353 if (!radeonInitContext(&rmesa->radeon, &functions,
354 glVisual, driContextPriv,
355 sharedContextPrivate)) {
356 FREE(rmesa);
357 return GL_FALSE;
358 }
359
360 rmesa->radeon.swtcl.RenderIndex = ~0;
361 rmesa->radeon.hw.all_dirty = 1;
362
363 /* Set the maximum texture size small enough that we can guarentee that
364 * all texture units can bind a maximal texture and have all of them in
365 * texturable memory at once. Depending on the allow_large_textures driconf
366 * setting allow larger textures.
367 */
368
369 ctx = rmesa->radeon.glCtx;
370 ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->radeon.optionCache,
371 "texture_units");
372 ctx->Const.MaxTextureImageUnits = ctx->Const.MaxTextureUnits;
373 ctx->Const.MaxTextureCoordUnits = ctx->Const.MaxTextureUnits;
374
375 i = driQueryOptioni( &rmesa->radeon.optionCache, "allow_large_textures");
376
377 /* FIXME: When no memory manager is available we should set this
378 * to some reasonable value based on texture memory pool size */
379 ctx->Const.MaxTextureLevels = 12;
380 ctx->Const.Max3DTextureLevels = 9;
381 ctx->Const.MaxCubeTextureLevels = 12;
382 ctx->Const.MaxTextureRectSize = 2048;
383
384 ctx->Const.MaxTextureMaxAnisotropy = 16.0;
385
386 /* No wide AA points.
387 */
388 ctx->Const.MinPointSize = 1.0;
389 ctx->Const.MinPointSizeAA = 1.0;
390 ctx->Const.MaxPointSizeAA = 1.0;
391 ctx->Const.PointSizeGranularity = 0.0625;
392 if (rmesa->radeon.radeonScreen->drmSupportsPointSprites)
393 ctx->Const.MaxPointSize = 2047.0;
394 else
395 ctx->Const.MaxPointSize = 1.0;
396
397 /* mesa initialization problem - _mesa_init_point was already called */
398 ctx->Point.MaxSize = ctx->Const.MaxPointSize;
399
400 ctx->Const.MinLineWidth = 1.0;
401 ctx->Const.MinLineWidthAA = 1.0;
402 ctx->Const.MaxLineWidth = 10.0;
403 ctx->Const.MaxLineWidthAA = 10.0;
404 ctx->Const.LineWidthGranularity = 0.0625;
405
406 ctx->Const.VertexProgram.MaxNativeInstructions = R200_VSF_MAX_INST;
407 ctx->Const.VertexProgram.MaxNativeAttribs = 12;
408 ctx->Const.VertexProgram.MaxNativeTemps = R200_VSF_MAX_TEMPS;
409 ctx->Const.VertexProgram.MaxNativeParameters = R200_VSF_MAX_PARAM;
410 ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
411
412 ctx->Const.MaxDrawBuffers = 1;
413
414 _mesa_set_mvp_with_dp4( ctx, GL_TRUE );
415
416 /* Initialize the software rasterizer and helper modules.
417 */
418 _swrast_CreateContext( ctx );
419 _vbo_CreateContext( ctx );
420 _tnl_CreateContext( ctx );
421 _swsetup_CreateContext( ctx );
422 _ae_create_context( ctx );
423
424 /* Install the customized pipeline:
425 */
426 _tnl_destroy_pipeline( ctx );
427 _tnl_install_pipeline( ctx, r200_pipeline );
428
429 /* Try and keep materials and vertices separate:
430 */
431 /* _tnl_isolate_materials( ctx, GL_TRUE ); */
432
433
434 /* Configure swrast and TNL to match hardware characteristics:
435 */
436 _swrast_allow_pixel_fog( ctx, GL_FALSE );
437 _swrast_allow_vertex_fog( ctx, GL_TRUE );
438 _tnl_allow_pixel_fog( ctx, GL_FALSE );
439 _tnl_allow_vertex_fog( ctx, GL_TRUE );
440
441
442 for ( i = 0 ; i < R200_MAX_TEXTURE_UNITS ; i++ ) {
443 _math_matrix_ctr( &rmesa->TexGenMatrix[i] );
444 _math_matrix_set_identity( &rmesa->TexGenMatrix[i] );
445 }
446 _math_matrix_ctr( &rmesa->tmpmat );
447 _math_matrix_set_identity( &rmesa->tmpmat );
448
449 driInitExtensions( ctx, card_extensions, GL_TRUE );
450
451 if (rmesa->radeon.radeonScreen->kernel_mm)
452 driInitExtensions(ctx, mm_extensions, GL_FALSE);
453 if (!(rmesa->radeon.radeonScreen->chip_flags & R200_CHIPSET_YCBCR_BROKEN)) {
454 /* yuv textures don't work with some chips - R200 / rv280 okay so far
455 others get the bit ordering right but don't actually do YUV-RGB conversion */
456 _mesa_enable_extension( ctx, "GL_MESA_ycbcr_texture" );
457 }
458 if (rmesa->radeon.glCtx->Mesa_DXTn) {
459 _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
460 _mesa_enable_extension( ctx, "GL_S3_s3tc" );
461 }
462 else if (driQueryOptionb (&rmesa->radeon.optionCache, "force_s3tc_enable")) {
463 _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
464 }
465
466 if (rmesa->radeon.radeonScreen->drmSupportsCubeMapsR200)
467 _mesa_enable_extension( ctx, "GL_ARB_texture_cube_map" );
468 if (rmesa->radeon.radeonScreen->drmSupportsBlendColor) {
469 driInitExtensions( ctx, blend_extensions, GL_FALSE );
470 }
471 if(rmesa->radeon.radeonScreen->drmSupportsVertexProgram)
472 driInitSingleExtension( ctx, ARB_vp_extension );
473 if(driQueryOptionb(&rmesa->radeon.optionCache, "nv_vertex_program"))
474 driInitSingleExtension( ctx, NV_vp_extension );
475
476 if ((ctx->Const.MaxTextureUnits == 6) && rmesa->radeon.radeonScreen->drmSupportsFragShader)
477 driInitSingleExtension( ctx, ATI_fs_extension );
478 if (rmesa->radeon.radeonScreen->drmSupportsPointSprites)
479 driInitExtensions( ctx, point_extensions, GL_FALSE );
480
481 if (!rmesa->radeon.radeonScreen->kernel_mm)
482 _mesa_disable_extension(ctx, "GL_ARB_occlusion_query");
483 #if 0
484 r200InitDriverFuncs( ctx );
485 r200InitIoctlFuncs( ctx );
486 r200InitStateFuncs( ctx );
487 r200InitTextureFuncs( ctx );
488 #endif
489 /* plug in a few more device driver functions */
490 /* XXX these should really go right after _mesa_init_driver_functions() */
491 radeon_fbo_init(&rmesa->radeon);
492 radeonInitSpanFuncs( ctx );
493 r200InitPixelFuncs( ctx );
494 r200InitTnlFuncs( ctx );
495 r200InitState( rmesa );
496 r200InitSwtcl( ctx );
497
498 rmesa->prefer_gart_client_texturing =
499 (getenv("R200_GART_CLIENT_TEXTURES") != 0);
500
501 #if DO_DEBUG
502 R200_DEBUG = driParseDebugString( getenv( "R200_DEBUG" ),
503 debug_control );
504 R200_DEBUG |= driParseDebugString( getenv( "RADEON_DEBUG" ),
505 debug_control );
506 #endif
507
508 tcl_mode = driQueryOptioni(&rmesa->radeon.optionCache, "tcl_mode");
509 if (driQueryOptionb(&rmesa->radeon.optionCache, "no_rast")) {
510 fprintf(stderr, "disabling 3D acceleration\n");
511 FALLBACK(rmesa, R200_FALLBACK_DISABLE, 1);
512 }
513 else if (tcl_mode == DRI_CONF_TCL_SW || getenv("R200_NO_TCL") ||
514 !(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
515 if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
516 rmesa->radeon.radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL;
517 fprintf(stderr, "Disabling HW TCL support\n");
518 }
519 TCL_FALLBACK(rmesa->radeon.glCtx, R200_TCL_FALLBACK_TCL_DISABLE, 1);
520 }
521
522 return GL_TRUE;
523 }
524
525
526 void r200DestroyContext( __DRIcontextPrivate *driContextPriv )
527 {
528 int i;
529 r200ContextPtr rmesa = (r200ContextPtr)driContextPriv->driverPrivate;
530 if (rmesa)
531 {
532 for ( i = 0 ; i < R200_MAX_TEXTURE_UNITS ; i++ ) {
533 _math_matrix_dtr( &rmesa->TexGenMatrix[i] );
534 }
535 }
536 radeonDestroyContext(driContextPriv);
537 }