dri: Remove redundant GL_SGIS_texture_edge_clamp enables
[mesa.git] / src / mesa / drivers / dri / r200 / r200_context.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
3
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /*
31 * Authors:
32 * Keith Whitwell <keith@tungstengraphics.com>
33 */
34
35 #include <stdbool.h>
36 #include "main/glheader.h"
37 #include "main/api_arrayelt.h"
38 #include "main/context.h"
39 #include "main/simple_list.h"
40 #include "main/imports.h"
41 #include "main/extensions.h"
42 #include "main/mfeatures.h"
43
44 #include "swrast/swrast.h"
45 #include "swrast_setup/swrast_setup.h"
46 #include "vbo/vbo.h"
47
48 #include "tnl/tnl.h"
49 #include "tnl/t_pipeline.h"
50
51 #include "drivers/common/driverfuncs.h"
52
53 #include "r200_context.h"
54 #include "r200_ioctl.h"
55 #include "r200_state.h"
56 #include "r200_tex.h"
57 #include "r200_swtcl.h"
58 #include "r200_tcl.h"
59 #include "r200_vertprog.h"
60 #include "radeon_queryobj.h"
61 #include "r200_blit.h"
62
63 #include "radeon_span.h"
64
65 #include "utils.h"
66 #include "xmlpool.h" /* for symbolic values of enum-type options */
67
68 /* Return various strings for glGetString().
69 */
70 static const GLubyte *r200GetString( struct gl_context *ctx, GLenum name )
71 {
72 r200ContextPtr rmesa = R200_CONTEXT(ctx);
73 static char buffer[128];
74 unsigned offset;
75 GLuint agp_mode = (rmesa->radeon.radeonScreen->card_type == RADEON_CARD_PCI)? 0 :
76 rmesa->radeon.radeonScreen->AGPMode;
77
78 switch ( name ) {
79 case GL_VENDOR:
80 return (GLubyte *)"Tungsten Graphics, Inc.";
81
82 case GL_RENDERER:
83 offset = driGetRendererString( buffer, "R200", agp_mode );
84
85 sprintf( & buffer[ offset ], " %sTCL",
86 !(rmesa->radeon.TclFallback & R200_TCL_FALLBACK_TCL_DISABLE)
87 ? "" : "NO-" );
88
89 return (GLubyte *)buffer;
90
91 default:
92 return NULL;
93 }
94 }
95
96
97 extern const struct tnl_pipeline_stage _r200_render_stage;
98 extern const struct tnl_pipeline_stage _r200_tcl_stage;
99
100 static const struct tnl_pipeline_stage *r200_pipeline[] = {
101
102 /* Try and go straight to t&l
103 */
104 &_r200_tcl_stage,
105
106 /* Catch any t&l fallbacks
107 */
108 &_tnl_vertex_transform_stage,
109 &_tnl_normal_transform_stage,
110 &_tnl_lighting_stage,
111 &_tnl_fog_coordinate_stage,
112 &_tnl_texgen_stage,
113 &_tnl_texture_transform_stage,
114 &_tnl_point_attenuation_stage,
115 &_tnl_vertex_program_stage,
116 /* Try again to go to tcl?
117 * - no good for asymmetric-twoside (do with multipass)
118 * - no good for asymmetric-unfilled (do with multipass)
119 * - good for material
120 * - good for texgen
121 * - need to manipulate a bit of state
122 *
123 * - worth it/not worth it?
124 */
125
126 /* Else do them here.
127 */
128 /* &_r200_render_stage, */ /* FIXME: bugs with ut2003 */
129 &_tnl_render_stage, /* FALLBACK: */
130 NULL,
131 };
132
133
134
135 /* Initialize the driver's misc functions.
136 */
137 static void r200InitDriverFuncs( struct dd_function_table *functions )
138 {
139 functions->GetBufferSize = NULL; /* OBSOLETE */
140 functions->GetString = r200GetString;
141 }
142
143
144 static void r200_get_lock(radeonContextPtr radeon)
145 {
146 r200ContextPtr rmesa = (r200ContextPtr)radeon;
147 drm_radeon_sarea_t *sarea = radeon->sarea;
148
149 R200_STATECHANGE( rmesa, ctx );
150 if (rmesa->radeon.sarea->tiling_enabled) {
151 rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |= R200_COLOR_TILE_ENABLE;
152 }
153 else rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] &= ~R200_COLOR_TILE_ENABLE;
154
155 if ( sarea->ctx_owner != rmesa->radeon.dri.hwContext ) {
156 sarea->ctx_owner = rmesa->radeon.dri.hwContext;
157 if (!radeon->radeonScreen->kernel_mm)
158 radeon_bo_legacy_texture_age(radeon->radeonScreen->bom);
159 }
160
161 }
162
163 static void r200_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
164 {
165 }
166
167 static void r200_emit_query_finish(radeonContextPtr radeon)
168 {
169 BATCH_LOCALS(radeon);
170 struct radeon_query_object *query = radeon->query.current;
171
172 BEGIN_BATCH_NO_AUTOSTATE(4);
173 OUT_BATCH(CP_PACKET0(RADEON_RB3D_ZPASS_ADDR, 0));
174 OUT_BATCH_RELOC(0, query->bo, query->curr_offset, 0, RADEON_GEM_DOMAIN_GTT, 0);
175 END_BATCH();
176 query->curr_offset += sizeof(uint32_t);
177 assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
178 query->emitted_begin = GL_FALSE;
179 }
180
181 static void r200_init_vtbl(radeonContextPtr radeon)
182 {
183 radeon->vtbl.get_lock = r200_get_lock;
184 radeon->vtbl.update_viewport_offset = r200UpdateViewportOffset;
185 radeon->vtbl.emit_cs_header = r200_vtbl_emit_cs_header;
186 radeon->vtbl.swtcl_flush = r200_swtcl_flush;
187 radeon->vtbl.fallback = r200Fallback;
188 radeon->vtbl.update_scissor = r200_vtbl_update_scissor;
189 radeon->vtbl.emit_query_finish = r200_emit_query_finish;
190 radeon->vtbl.check_blit = r200_check_blit;
191 radeon->vtbl.blit = r200_blit;
192 radeon->vtbl.is_format_renderable = radeonIsFormatRenderable;
193 }
194
195
196 /* Create the device specific rendering context.
197 */
198 GLboolean r200CreateContext( gl_api api,
199 const struct gl_config *glVisual,
200 __DRIcontext *driContextPriv,
201 void *sharedContextPrivate)
202 {
203 __DRIscreen *sPriv = driContextPriv->driScreenPriv;
204 radeonScreenPtr screen = (radeonScreenPtr)(sPriv->private);
205 struct dd_function_table functions;
206 r200ContextPtr rmesa;
207 struct gl_context *ctx;
208 int i;
209 int tcl_mode;
210
211 assert(glVisual);
212 assert(driContextPriv);
213 assert(screen);
214
215 /* Allocate the R200 context */
216 rmesa = (r200ContextPtr) CALLOC( sizeof(*rmesa) );
217 if ( !rmesa )
218 return GL_FALSE;
219
220 rmesa->radeon.radeonScreen = screen;
221 r200_init_vtbl(&rmesa->radeon);
222 /* init exp fog table data */
223 r200InitStaticFogData();
224
225 /* Parse configuration files.
226 * Do this here so that initialMaxAnisotropy is set before we create
227 * the default textures.
228 */
229 driParseConfigFiles (&rmesa->radeon.optionCache, &screen->optionCache,
230 screen->driScreen->myNum, "r200");
231 rmesa->radeon.initialMaxAnisotropy = driQueryOptionf(&rmesa->radeon.optionCache,
232 "def_max_anisotropy");
233
234 if ( sPriv->drm_version.major == 1
235 && driQueryOptionb( &rmesa->radeon.optionCache, "hyperz" ) ) {
236 if ( sPriv->drm_version.minor < 13 )
237 fprintf( stderr, "DRM version 1.%d too old to support HyperZ, "
238 "disabling.\n", sPriv->drm_version.minor );
239 else
240 rmesa->using_hyperz = GL_TRUE;
241 }
242
243 if ( sPriv->drm_version.minor >= 15 )
244 rmesa->texmicrotile = GL_TRUE;
245
246 /* Init default driver functions then plug in our R200-specific functions
247 * (the texture functions are especially important)
248 */
249 _mesa_init_driver_functions(&functions);
250 r200InitDriverFuncs(&functions);
251 r200InitIoctlFuncs(&functions);
252 r200InitStateFuncs(&rmesa->radeon, &functions);
253 r200InitTextureFuncs(&rmesa->radeon, &functions);
254 r200InitShaderFuncs(&functions);
255 radeonInitQueryObjFunctions(&functions);
256
257 if (!radeonInitContext(&rmesa->radeon, &functions,
258 glVisual, driContextPriv,
259 sharedContextPrivate)) {
260 FREE(rmesa);
261 return GL_FALSE;
262 }
263
264 rmesa->radeon.swtcl.RenderIndex = ~0;
265 rmesa->radeon.hw.all_dirty = 1;
266
267 /* Set the maximum texture size small enough that we can guarentee that
268 * all texture units can bind a maximal texture and have all of them in
269 * texturable memory at once. Depending on the allow_large_textures driconf
270 * setting allow larger textures.
271 */
272
273 ctx = rmesa->radeon.glCtx;
274 ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->radeon.optionCache,
275 "texture_units");
276 ctx->Const.MaxTextureImageUnits = ctx->Const.MaxTextureUnits;
277 ctx->Const.MaxTextureCoordUnits = ctx->Const.MaxTextureUnits;
278
279 ctx->Const.MaxCombinedTextureImageUnits = ctx->Const.MaxTextureUnits;
280
281 i = driQueryOptioni( &rmesa->radeon.optionCache, "allow_large_textures");
282
283 /* FIXME: When no memory manager is available we should set this
284 * to some reasonable value based on texture memory pool size */
285 ctx->Const.MaxTextureLevels = 12;
286 ctx->Const.Max3DTextureLevels = 9;
287 ctx->Const.MaxCubeTextureLevels = 12;
288 ctx->Const.MaxTextureRectSize = 2048;
289 ctx->Const.MaxRenderbufferSize = 2048;
290
291 ctx->Const.MaxTextureMaxAnisotropy = 16.0;
292
293 /* No wide AA points.
294 */
295 ctx->Const.MinPointSize = 1.0;
296 ctx->Const.MinPointSizeAA = 1.0;
297 ctx->Const.MaxPointSizeAA = 1.0;
298 ctx->Const.PointSizeGranularity = 0.0625;
299 if (rmesa->radeon.radeonScreen->drmSupportsPointSprites)
300 ctx->Const.MaxPointSize = 2047.0;
301 else
302 ctx->Const.MaxPointSize = 1.0;
303
304 /* mesa initialization problem - _mesa_init_point was already called */
305 ctx->Point.MaxSize = ctx->Const.MaxPointSize;
306
307 ctx->Const.MinLineWidth = 1.0;
308 ctx->Const.MinLineWidthAA = 1.0;
309 ctx->Const.MaxLineWidth = 10.0;
310 ctx->Const.MaxLineWidthAA = 10.0;
311 ctx->Const.LineWidthGranularity = 0.0625;
312
313 ctx->Const.VertexProgram.MaxNativeInstructions = R200_VSF_MAX_INST;
314 ctx->Const.VertexProgram.MaxNativeAttribs = 12;
315 ctx->Const.VertexProgram.MaxNativeTemps = R200_VSF_MAX_TEMPS;
316 ctx->Const.VertexProgram.MaxNativeParameters = R200_VSF_MAX_PARAM;
317 ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
318
319 ctx->Const.MaxDrawBuffers = 1;
320 ctx->Const.MaxColorAttachments = 1;
321
322 _mesa_set_mvp_with_dp4( ctx, GL_TRUE );
323
324 /* Initialize the software rasterizer and helper modules.
325 */
326 _swrast_CreateContext( ctx );
327 _vbo_CreateContext( ctx );
328 _tnl_CreateContext( ctx );
329 _swsetup_CreateContext( ctx );
330 _ae_create_context( ctx );
331
332 /* Install the customized pipeline:
333 */
334 _tnl_destroy_pipeline( ctx );
335 _tnl_install_pipeline( ctx, r200_pipeline );
336
337 /* Try and keep materials and vertices separate:
338 */
339 /* _tnl_isolate_materials( ctx, GL_TRUE ); */
340
341
342 /* Configure swrast and TNL to match hardware characteristics:
343 */
344 _swrast_allow_pixel_fog( ctx, GL_FALSE );
345 _swrast_allow_vertex_fog( ctx, GL_TRUE );
346 _tnl_allow_pixel_fog( ctx, GL_FALSE );
347 _tnl_allow_vertex_fog( ctx, GL_TRUE );
348
349
350 for ( i = 0 ; i < R200_MAX_TEXTURE_UNITS ; i++ ) {
351 _math_matrix_ctr( &rmesa->TexGenMatrix[i] );
352 _math_matrix_set_identity( &rmesa->TexGenMatrix[i] );
353 }
354 _math_matrix_ctr( &rmesa->tmpmat );
355 _math_matrix_set_identity( &rmesa->tmpmat );
356
357 ctx->Extensions.ARB_half_float_pixel = true;
358 ctx->Extensions.ARB_multitexture = true;
359 ctx->Extensions.ARB_occlusion_query = true;
360 ctx->Extensions.ARB_texture_border_clamp = true;
361 ctx->Extensions.ARB_texture_env_combine = true;
362 ctx->Extensions.ARB_texture_env_dot3 = true;
363 ctx->Extensions.ARB_texture_env_crossbar = true;
364 ctx->Extensions.ARB_texture_mirrored_repeat = true;
365 ctx->Extensions.ARB_vertex_array_object = true;
366 ctx->Extensions.EXT_blend_color =
367 rmesa->radeon.radeonScreen->drmSupportsBlendColor;
368 ctx->Extensions.EXT_blend_minmax = true;
369 ctx->Extensions.EXT_blend_subtract = true;
370 ctx->Extensions.EXT_fog_coord = true;
371 ctx->Extensions.EXT_packed_depth_stencil = true;
372 ctx->Extensions.EXT_secondary_color = true;
373 ctx->Extensions.EXT_stencil_wrap = true;
374 ctx->Extensions.EXT_texture_env_add = true;
375 ctx->Extensions.EXT_texture_env_combine = true;
376 ctx->Extensions.EXT_texture_env_dot3 = true;
377 ctx->Extensions.EXT_texture_filter_anisotropic = true;
378 ctx->Extensions.EXT_texture_lod_bias = true;
379 ctx->Extensions.EXT_texture_mirror_clamp = true;
380 ctx->Extensions.APPLE_vertex_array_object = true;
381 ctx->Extensions.ATI_texture_env_combine3 = true;
382 ctx->Extensions.ATI_texture_mirror_once = true;
383 ctx->Extensions.MESA_pack_invert = true;
384 ctx->Extensions.NV_blend_square = true;
385 ctx->Extensions.NV_texture_rectangle = true;
386 #if FEATURE_OES_EGL_image
387 ctx->Extensions.OES_EGL_image = true;
388 #endif
389
390 ctx->Extensions.EXT_framebuffer_object =
391 rmesa->radeon.radeonScreen->kernel_mm;
392 ctx->Extensions.ARB_occlusion_query =
393 rmesa->radeon.radeonScreen->kernel_mm;
394
395 if (!(rmesa->radeon.radeonScreen->chip_flags & R200_CHIPSET_YCBCR_BROKEN)) {
396 /* yuv textures don't work with some chips - R200 / rv280 okay so far
397 others get the bit ordering right but don't actually do YUV-RGB conversion */
398 ctx->Extensions.MESA_ycbcr_texture = true;
399 }
400 if (rmesa->radeon.glCtx->Mesa_DXTn) {
401 ctx->Extensions.EXT_texture_compression_s3tc = true;
402 ctx->Extensions.S3_s3tc = true;
403 }
404 else if (driQueryOptionb (&rmesa->radeon.optionCache, "force_s3tc_enable")) {
405 ctx->Extensions.EXT_texture_compression_s3tc = true;
406 }
407
408 ctx->Extensions.ARB_texture_cube_map =
409 rmesa->radeon.radeonScreen->drmSupportsCubeMapsR200;
410
411 if (rmesa->radeon.radeonScreen->drmSupportsBlendColor) {
412 ctx->Extensions.EXT_blend_equation_separate = true;
413 ctx->Extensions.EXT_blend_func_separate = true;
414 }
415
416 if (rmesa->radeon.radeonScreen->drmSupportsVertexProgram) {
417 ctx->Extensions.ARB_vertex_program = true;
418 ctx->Extensions.EXT_gpu_program_parameters = true;
419 }
420
421 ctx->Extensions.NV_vertex_program =
422 driQueryOptionb(&rmesa->radeon.optionCache, "nv_vertex_program");
423
424 ctx->Extensions.ATI_fragment_shader = (ctx->Const.MaxTextureUnits == 6)
425 && rmesa->radeon.radeonScreen->drmSupportsFragShader;
426
427 if (rmesa->radeon.radeonScreen->drmSupportsPointSprites) {
428 ctx->Extensions.ARB_point_sprite = true;
429 ctx->Extensions.EXT_point_parameters = true;
430 }
431
432 #if 0
433 r200InitDriverFuncs( ctx );
434 r200InitIoctlFuncs( ctx );
435 r200InitStateFuncs( ctx );
436 r200InitTextureFuncs( ctx );
437 #endif
438 /* plug in a few more device driver functions */
439 /* XXX these should really go right after _mesa_init_driver_functions() */
440 radeon_fbo_init(&rmesa->radeon);
441 radeonInitSpanFuncs( ctx );
442 r200InitTnlFuncs( ctx );
443 r200InitState( rmesa );
444 r200InitSwtcl( ctx );
445
446 rmesa->prefer_gart_client_texturing =
447 (getenv("R200_GART_CLIENT_TEXTURES") != 0);
448
449 tcl_mode = driQueryOptioni(&rmesa->radeon.optionCache, "tcl_mode");
450 if (driQueryOptionb(&rmesa->radeon.optionCache, "no_rast")) {
451 fprintf(stderr, "disabling 3D acceleration\n");
452 FALLBACK(rmesa, R200_FALLBACK_DISABLE, 1);
453 }
454 else if (tcl_mode == DRI_CONF_TCL_SW || getenv("R200_NO_TCL") ||
455 !(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
456 if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
457 rmesa->radeon.radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL;
458 fprintf(stderr, "Disabling HW TCL support\n");
459 }
460 TCL_FALLBACK(rmesa->radeon.glCtx, R200_TCL_FALLBACK_TCL_DISABLE, 1);
461 }
462
463 return GL_TRUE;
464 }
465
466
467 void r200DestroyContext( __DRIcontext *driContextPriv )
468 {
469 int i;
470 r200ContextPtr rmesa = (r200ContextPtr)driContextPriv->driverPrivate;
471 if (rmesa)
472 {
473 for ( i = 0 ; i < R200_MAX_TEXTURE_UNITS ; i++ ) {
474 _math_matrix_dtr( &rmesa->TexGenMatrix[i] );
475 }
476 }
477 radeonDestroyContext(driContextPriv);
478 }