src/mesa/drivers/dri/r200/r200_context.h

   1 /*
   2 Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
   3
   4 The Weather Channel (TM) funded Tungsten Graphics to develop the
   5 initial release of the Radeon 8500 driver under the XFree86 license.
   6 This notice must be preserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /*
  31  * Authors:
  32  *   Keith Whitwell <keith@tungstengraphics.com>
  33  */
  34
  35 #ifndef __R200_CONTEXT_H__
  36 #define __R200_CONTEXT_H__
  37
  38 #include "tnl/t_vertex.h"
  39 #include "drm.h"
  40 #include "radeon_drm.h"
  41 #include "dri_util.h"
  42 #include "texmem.h"
  43
  44 #include "main/macros.h"
  45 #include "main/mtypes.h"
  46 #include "main/colormac.h"
  47 #include "r200_reg.h"
  48 #include "r200_vertprog.h"
  49
  50 #ifndef R200_EMIT_VAP_PVS_CNTL
  51 #error This driver requires a newer libdrm to compile
  52 #endif
  53
  54 #include "radeon_screen.h"
  55 #include "radeon_common.h"
  56
  57 #include "radeon_lock.h"
  58
  59 struct r200_context;
  60 typedef struct r200_context r200ContextRec;
  61 typedef struct r200_context *r200ContextPtr;
  62
  63 #include "main/mm.h"
  64
  65 struct r200_vertex_program {
  66         struct gl_vertex_program mesa_program; /* Must be first */
  67         int translated;
  68         /* need excess instr: 1 for late loop checking, 2 for
  69            additional instr due to instr/attr, 3 for fog */
  70         VERTEX_SHADER_INSTRUCTION instr[R200_VSF_MAX_INST + 6];
  71         int pos_end;
  72         int inputs[VERT_ATTRIB_MAX];
  73         GLubyte inputmap_rev[16];
  74         int native;
  75         int fogpidx;
  76         int fogmode;
  77 };
  78
  79 #define R200_TEX_ALL 0x3f
  80
  81
  82 struct r200_texture_env_state {
  83    radeonTexObjPtr texobj;
  84    GLuint outputreg;
  85    GLuint unitneeded;
  86 };
  87
  88 #define R200_MAX_TEXTURE_UNITS 6
  89
  90 struct r200_texture_state {
  91    struct r200_texture_env_state unit[R200_MAX_TEXTURE_UNITS];
  92 };
  93
  94
  95 /* Trying to keep these relatively short as the variables are becoming
  96  * extravagently long.  Drop the driver name prefix off the front of
  97  * everything - I think we know which driver we're in by now, and keep the
  98  * prefix to 3 letters unless absolutely impossible.
  99  */
 100
 101 #define CTX_CMD_0             0
 102 #define CTX_PP_MISC           1
 103 #define CTX_PP_FOG_COLOR      2
 104 #define CTX_RE_SOLID_COLOR    3
 105 #define CTX_RB3D_BLENDCNTL    4
 106 #define CTX_RB3D_DEPTHOFFSET  5
 107 #define CTX_RB3D_DEPTHPITCH   6
 108 #define CTX_RB3D_ZSTENCILCNTL 7
 109 #define CTX_CMD_1             8
 110 #define CTX_PP_CNTL           9
 111 #define CTX_RB3D_CNTL         10
 112 #define CTX_RB3D_COLOROFFSET  11
 113 #define CTX_CMD_2             12 /* why */
 114 #define CTX_RB3D_COLORPITCH   13 /* why */
 115 #define CTX_STATE_SIZE_OLDDRM 14
 116 #define CTX_CMD_3             14
 117 #define CTX_RB3D_BLENDCOLOR   15
 118 #define CTX_RB3D_ABLENDCNTL   16
 119 #define CTX_RB3D_CBLENDCNTL   17
 120 #define CTX_STATE_SIZE_NEWDRM 18
 121
 122 #define SET_CMD_0               0
 123 #define SET_SE_CNTL             1
 124 #define SET_RE_CNTL             2 /* replace se_coord_fmt */
 125 #define SET_STATE_SIZE          3
 126
 127 #define VTE_CMD_0               0
 128 #define VTE_SE_VTE_CNTL         1
 129 #define VTE_STATE_SIZE          2
 130
 131 #define LIN_CMD_0               0
 132 #define LIN_RE_LINE_PATTERN     1
 133 #define LIN_RE_LINE_STATE       2
 134 #define LIN_CMD_1               3
 135 #define LIN_SE_LINE_WIDTH       4
 136 #define LIN_STATE_SIZE          5
 137
 138 #define MSK_CMD_0               0
 139 #define MSK_RB3D_STENCILREFMASK 1
 140 #define MSK_RB3D_ROPCNTL        2
 141 #define MSK_RB3D_PLANEMASK      3
 142 #define MSK_STATE_SIZE          4
 143
 144 #define VPT_CMD_0           0
 145 #define VPT_SE_VPORT_XSCALE          1
 146 #define VPT_SE_VPORT_XOFFSET         2
 147 #define VPT_SE_VPORT_YSCALE          3
 148 #define VPT_SE_VPORT_YOFFSET         4
 149 #define VPT_SE_VPORT_ZSCALE          5
 150 #define VPT_SE_VPORT_ZOFFSET         6
 151 #define VPT_STATE_SIZE      7
 152
 153 #define ZBS_CMD_0               0
 154 #define ZBS_SE_ZBIAS_FACTOR     1
 155 #define ZBS_SE_ZBIAS_CONSTANT   2
 156 #define ZBS_STATE_SIZE          3
 157
 158 #define MSC_CMD_0               0
 159 #define MSC_RE_MISC             1
 160 #define MSC_STATE_SIZE          2
 161
 162 #define TAM_CMD_0               0
 163 #define TAM_DEBUG3              1
 164 #define TAM_STATE_SIZE          2
 165
 166 #define TEX_CMD_0                   0
 167 #define TEX_PP_TXFILTER             1  /*2c00*/
 168 #define TEX_PP_TXFORMAT             2  /*2c04*/
 169 #define TEX_PP_TXFORMAT_X           3  /*2c08*/
 170 #define TEX_PP_TXSIZE               4  /*2c0c*/
 171 #define TEX_PP_TXPITCH              5  /*2c10*/
 172 #define TEX_PP_BORDER_COLOR         6  /*2c14*/
 173 #define TEX_CMD_1_OLDDRM            7
 174 #define TEX_PP_TXOFFSET_OLDDRM      8  /*2d00 */
 175 #define TEX_STATE_SIZE_OLDDRM       9
 176 #define TEX_PP_CUBIC_FACES          7
 177 #define TEX_PP_TXMULTI_CTL          8
 178 #define TEX_CMD_1_NEWDRM            9
 179 #define TEX_PP_TXOFFSET_NEWDRM     10
 180 #define TEX_STATE_SIZE_NEWDRM      11
 181
 182 #define CUBE_CMD_0                  0  /* 1 register follows */ /* this command unnecessary */
 183 #define CUBE_PP_CUBIC_FACES         1  /* 0x2c18 */             /* with new enough drm */
 184 #define CUBE_CMD_1                  2  /* 5 registers follow */
 185 #define CUBE_PP_CUBIC_OFFSET_F1     3  /* 0x2d04 */
 186 #define CUBE_PP_CUBIC_OFFSET_F2     4  /* 0x2d08 */
 187 #define CUBE_PP_CUBIC_OFFSET_F3     5  /* 0x2d0c */
 188 #define CUBE_PP_CUBIC_OFFSET_F4     6  /* 0x2d10 */
 189 #define CUBE_PP_CUBIC_OFFSET_F5     7  /* 0x2d14 */
 190 #define CUBE_STATE_SIZE             8
 191
 192 #define PIX_CMD_0                   0
 193 #define PIX_PP_TXCBLEND             1
 194 #define PIX_PP_TXCBLEND2            2
 195 #define PIX_PP_TXABLEND             3
 196 #define PIX_PP_TXABLEND2            4
 197 #define PIX_STATE_SIZE              5
 198
 199 #define TF_CMD_0                    0
 200 #define TF_TFACTOR_0                1
 201 #define TF_TFACTOR_1                2
 202 #define TF_TFACTOR_2                3
 203 #define TF_TFACTOR_3                4
 204 #define TF_TFACTOR_4                5
 205 #define TF_TFACTOR_5                6
 206 #define TF_STATE_SIZE               7
 207
 208 #define ATF_CMD_0                   0
 209 #define ATF_TFACTOR_0               1
 210 #define ATF_TFACTOR_1               2
 211 #define ATF_TFACTOR_2               3
 212 #define ATF_TFACTOR_3               4
 213 #define ATF_TFACTOR_4               5
 214 #define ATF_TFACTOR_5               6
 215 #define ATF_TFACTOR_6               7
 216 #define ATF_TFACTOR_7               8
 217 #define ATF_STATE_SIZE              9
 218
 219 /* ATI_FRAGMENT_SHADER */
 220 #define AFS_CMD_0                 0
 221 #define AFS_IC0                   1 /* 2f00 */
 222 #define AFS_IC1                   2 /* 2f04 */
 223 #define AFS_IA0                   3 /* 2f08 */
 224 #define AFS_IA1                   4 /* 2f0c */
 225 #define AFS_STATE_SIZE           33
 226
 227 #define PVS_CMD_0                 0
 228 #define PVS_CNTL_1                1
 229 #define PVS_CNTL_2                2
 230 #define PVS_STATE_SIZE            3
 231
 232 /* those are quite big... */
 233 #define VPI_CMD_0                 0
 234 #define VPI_OPDST_0               1
 235 #define VPI_SRC0_0                2
 236 #define VPI_SRC1_0                3
 237 #define VPI_SRC2_0                4
 238 #define VPI_OPDST_63              253
 239 #define VPI_SRC0_63               254
 240 #define VPI_SRC1_63               255
 241 #define VPI_SRC2_63               256
 242 #define VPI_STATE_SIZE            257
 243
 244 #define VPP_CMD_0                0
 245 #define VPP_PARAM0_0             1
 246 #define VPP_PARAM1_0             2
 247 #define VPP_PARAM2_0             3
 248 #define VPP_PARAM3_0             4
 249 #define VPP_PARAM0_95            381
 250 #define VPP_PARAM1_95            382
 251 #define VPP_PARAM2_95            383
 252 #define VPP_PARAM3_95            384
 253 #define VPP_STATE_SIZE           385
 254
 255 #define TCL_CMD_0                 0
 256 #define TCL_LIGHT_MODEL_CTL_0     1
 257 #define TCL_LIGHT_MODEL_CTL_1     2
 258 #define TCL_PER_LIGHT_CTL_0       3
 259 #define TCL_PER_LIGHT_CTL_1       4
 260 #define TCL_PER_LIGHT_CTL_2       5
 261 #define TCL_PER_LIGHT_CTL_3       6
 262 #define TCL_CMD_1                 7
 263 #define TCL_UCP_VERT_BLEND_CTL    8
 264 #define TCL_STATE_SIZE            9
 265
 266 #define MSL_CMD_0                     0
 267 #define MSL_MATRIX_SELECT_0           1
 268 #define MSL_MATRIX_SELECT_1           2
 269 #define MSL_MATRIX_SELECT_2           3
 270 #define MSL_MATRIX_SELECT_3           4
 271 #define MSL_MATRIX_SELECT_4           5
 272 #define MSL_STATE_SIZE                6
 273
 274 #define TCG_CMD_0                 0
 275 #define TCG_TEX_PROC_CTL_2            1
 276 #define TCG_TEX_PROC_CTL_3            2
 277 #define TCG_TEX_PROC_CTL_0            3
 278 #define TCG_TEX_PROC_CTL_1            4
 279 #define TCG_TEX_CYL_WRAP_CTL      5
 280 #define TCG_STATE_SIZE            6
 281
 282 #define MTL_CMD_0            0
 283 #define MTL_EMMISSIVE_RED    1
 284 #define MTL_EMMISSIVE_GREEN  2
 285 #define MTL_EMMISSIVE_BLUE   3
 286 #define MTL_EMMISSIVE_ALPHA  4
 287 #define MTL_AMBIENT_RED      5
 288 #define MTL_AMBIENT_GREEN    6
 289 #define MTL_AMBIENT_BLUE     7
 290 #define MTL_AMBIENT_ALPHA    8
 291 #define MTL_DIFFUSE_RED      9
 292 #define MTL_DIFFUSE_GREEN    10
 293 #define MTL_DIFFUSE_BLUE     11
 294 #define MTL_DIFFUSE_ALPHA    12
 295 #define MTL_SPECULAR_RED     13
 296 #define MTL_SPECULAR_GREEN   14
 297 #define MTL_SPECULAR_BLUE    15
 298 #define MTL_SPECULAR_ALPHA   16
 299 #define MTL_CMD_1            17
 300 #define MTL_SHININESS        18
 301 #define MTL_STATE_SIZE       19
 302
 303 #define VAP_CMD_0                   0
 304 #define VAP_SE_VAP_CNTL             1
 305 #define VAP_STATE_SIZE              2
 306
 307 /* Replaces a lot of packet info from radeon
 308  */
 309 #define VTX_CMD_0                   0
 310 #define VTX_VTXFMT_0            1
 311 #define VTX_VTXFMT_1            2
 312 #define VTX_TCL_OUTPUT_VTXFMT_0 3
 313 #define VTX_TCL_OUTPUT_VTXFMT_1 4
 314 #define VTX_CMD_1               5
 315 #define VTX_TCL_OUTPUT_COMPSEL  6
 316 #define VTX_CMD_2               7
 317 #define VTX_STATE_CNTL          8
 318 #define VTX_STATE_SIZE          9
 319
 320 /* SPR - point sprite state
 321  */
 322 #define SPR_CMD_0              0
 323 #define SPR_POINT_SPRITE_CNTL  1
 324 #define SPR_STATE_SIZE         2
 325
 326 #define PTP_CMD_0              0
 327 #define PTP_VPORT_SCALE_0      1
 328 #define PTP_VPORT_SCALE_1      2
 329 #define PTP_VPORT_SCALE_PTSIZE 3
 330 #define PTP_VPORT_SCALE_3      4
 331 #define PTP_CMD_1              5
 332 #define PTP_ATT_CONST_QUAD     6
 333 #define PTP_ATT_CONST_LIN      7
 334 #define PTP_ATT_CONST_CON      8
 335 #define PTP_ATT_CONST_3        9
 336 #define PTP_EYE_X             10
 337 #define PTP_EYE_Y             11
 338 #define PTP_EYE_Z             12
 339 #define PTP_EYE_3             13
 340 #define PTP_CLAMP_MIN         14
 341 #define PTP_CLAMP_MAX         15
 342 #define PTP_CLAMP_2           16
 343 #define PTP_CLAMP_3           17
 344 #define PTP_STATE_SIZE        18
 345
 346 #define VTX_COLOR(v,n)   (((v)>>(R200_VTX_COLOR_0_SHIFT+(n)*2))&\
 347                          R200_VTX_COLOR_MASK)
 348
 349 /**
 350  * Given the \c R200_SE_VTX_FMT_1 for the current vertex state, determine
 351  * how many components are in texture coordinate \c n.
 352  */
 353 #define VTX_TEXn_COUNT(v,n)   (((v) >> (3 * n)) & 0x07)
 354
 355 #define MAT_CMD_0              0
 356 #define MAT_ELT_0              1
 357 #define MAT_STATE_SIZE         17
 358
 359 #define GRD_CMD_0                  0
 360 #define GRD_VERT_GUARD_CLIP_ADJ    1
 361 #define GRD_VERT_GUARD_DISCARD_ADJ 2
 362 #define GRD_HORZ_GUARD_CLIP_ADJ    3
 363 #define GRD_HORZ_GUARD_DISCARD_ADJ 4
 364 #define GRD_STATE_SIZE             5
 365
 366 /* position changes frequently when lighting in modelpos - separate
 367  * out to new state item?
 368  */
 369 #define LIT_CMD_0                  0
 370 #define LIT_AMBIENT_RED            1
 371 #define LIT_AMBIENT_GREEN          2
 372 #define LIT_AMBIENT_BLUE           3
 373 #define LIT_AMBIENT_ALPHA          4
 374 #define LIT_DIFFUSE_RED            5
 375 #define LIT_DIFFUSE_GREEN          6
 376 #define LIT_DIFFUSE_BLUE           7
 377 #define LIT_DIFFUSE_ALPHA          8
 378 #define LIT_SPECULAR_RED           9
 379 #define LIT_SPECULAR_GREEN         10
 380 #define LIT_SPECULAR_BLUE          11
 381 #define LIT_SPECULAR_ALPHA         12
 382 #define LIT_POSITION_X             13
 383 #define LIT_POSITION_Y             14
 384 #define LIT_POSITION_Z             15
 385 #define LIT_POSITION_W             16
 386 #define LIT_DIRECTION_X            17
 387 #define LIT_DIRECTION_Y            18
 388 #define LIT_DIRECTION_Z            19
 389 #define LIT_DIRECTION_W            20
 390 #define LIT_ATTEN_QUADRATIC        21
 391 #define LIT_ATTEN_LINEAR           22
 392 #define LIT_ATTEN_CONST            23
 393 #define LIT_ATTEN_XXX              24
 394 #define LIT_CMD_1                  25
 395 #define LIT_SPOT_DCD               26
 396 #define LIT_SPOT_DCM               27
 397 #define LIT_SPOT_EXPONENT          28
 398 #define LIT_SPOT_CUTOFF            29
 399 #define LIT_SPECULAR_THRESH        30
 400 #define LIT_RANGE_CUTOFF           31 /* ? */
 401 #define LIT_ATTEN_CONST_INV        32
 402 #define LIT_STATE_SIZE             33
 403
 404 /* Fog
 405  */
 406 #define FOG_CMD_0      0
 407 #define FOG_R          1
 408 #define FOG_C          2
 409 #define FOG_D          3
 410 #define FOG_PAD        4
 411 #define FOG_STATE_SIZE 5
 412
 413 /* UCP
 414  */
 415 #define UCP_CMD_0      0
 416 #define UCP_X          1
 417 #define UCP_Y          2
 418 #define UCP_Z          3
 419 #define UCP_W          4
 420 #define UCP_STATE_SIZE 5
 421
 422 /* GLT - Global ambient
 423  */
 424 #define GLT_CMD_0      0
 425 #define GLT_RED        1
 426 #define GLT_GREEN      2
 427 #define GLT_BLUE       3
 428 #define GLT_ALPHA      4
 429 #define GLT_STATE_SIZE 5
 430
 431 /* EYE
 432  */
 433 #define EYE_CMD_0          0
 434 #define EYE_X              1
 435 #define EYE_Y              2
 436 #define EYE_Z              3
 437 #define EYE_RESCALE_FACTOR 4
 438 #define EYE_STATE_SIZE     5
 439
 440 /* CST - constant state
 441  */
 442 #define CST_CMD_0                             0
 443 #define CST_PP_CNTL_X                         1
 444 #define CST_CMD_1                             2
 445 #define CST_RB3D_DEPTHXY_OFFSET               3
 446 #define CST_CMD_2                             4
 447 #define CST_RE_AUX_SCISSOR_CNTL               5
 448 #define CST_CMD_3                             6
 449 #define CST_RE_SCISSOR_TL_0                   7
 450 #define CST_RE_SCISSOR_BR_0                   8
 451 #define CST_CMD_4                             9
 452 #define CST_SE_VAP_CNTL_STATUS                10
 453 #define CST_CMD_5                             11
 454 #define CST_RE_POINTSIZE                      12
 455 #define CST_CMD_6                             13
 456 #define CST_SE_TCL_INPUT_VTX_0                14
 457 #define CST_SE_TCL_INPUT_VTX_1                15
 458 #define CST_SE_TCL_INPUT_VTX_2                16
 459 #define CST_SE_TCL_INPUT_VTX_3                17
 460 #define CST_STATE_SIZE                        18
 461
 462 #define PRF_CMD_0         0
 463 #define PRF_PP_TRI_PERF   1
 464 #define PRF_PP_PERF_CNTL  2
 465 #define PRF_STATE_SIZE    3
 466
 467
 468 #define SCI_CMD_0         0
 469 #define SCI_RE_AUX        1
 470 #define SCI_CMD_1         2
 471 #define SCI_XY_1          3
 472 #define SCI_CMD_2         4
 473 #define SCI_XY_2          5
 474 #define SCI_STATE_SIZE    6
 475
 476 #define R200_QUERYOBJ_CMD_0  0
 477 #define R200_QUERYOBJ_DATA_0 1
 478 #define R200_QUERYOBJ_CMDSIZE  2
 479
 480 #define STP_CMD_0 0
 481 #define STP_DATA_0 1
 482 #define STP_CMD_1 2
 483 #define STP_STATE_SIZE 35
 484
 485 struct r200_hw_state {
 486    /* Hardware state, stored as cmdbuf commands:
 487     *   -- Need to doublebuffer for
 488     *           - reviving state after loss of context
 489     *           - eliding noop statechange loops? (except line stipple count)
 490     */
 491    struct radeon_state_atom ctx;
 492    struct radeon_state_atom set;
 493    struct radeon_state_atom sci;
 494    struct radeon_state_atom vte;
 495    struct radeon_state_atom lin;
 496    struct radeon_state_atom msk;
 497    struct radeon_state_atom vpt;
 498    struct radeon_state_atom vap;
 499    struct radeon_state_atom vtx;
 500    struct radeon_state_atom tcl;
 501    struct radeon_state_atom msl;
 502    struct radeon_state_atom tcg;
 503    struct radeon_state_atom msc;
 504    struct radeon_state_atom cst;
 505    struct radeon_state_atom tam;
 506    struct radeon_state_atom tf;
 507    struct radeon_state_atom tex[6];
 508    struct radeon_state_atom cube[6];
 509    struct radeon_state_atom zbs;
 510    struct radeon_state_atom mtl[2];
 511    struct radeon_state_atom mat[9];
 512    struct radeon_state_atom lit[8]; /* includes vec, scl commands */
 513    struct radeon_state_atom ucp[6];
 514    struct radeon_state_atom pix[6]; /* pixshader stages */
 515    struct radeon_state_atom eye; /* eye pos */
 516    struct radeon_state_atom grd; /* guard band clipping */
 517    struct radeon_state_atom fog;
 518    struct radeon_state_atom glt;
 519    struct radeon_state_atom prf;
 520    struct radeon_state_atom afs[2];
 521    struct radeon_state_atom pvs;
 522    struct radeon_state_atom vpi[2];
 523    struct radeon_state_atom vpp[2];
 524    struct radeon_state_atom atf;
 525    struct radeon_state_atom spr;
 526    struct radeon_state_atom ptp;
 527    struct radeon_state_atom stp;
 528 };
 529
 530 struct r200_state {
 531    /* Derived state for internal purposes:
 532     */
 533    struct r200_texture_state texture;
 534    GLuint envneeded;
 535 };
 536
 537 #define R200_CMD_BUF_SZ  (16*1024)
 538
 539 #define R200_ELT_BUF_SZ  (16*1024)
 540 /* r200_tcl.c
 541  */
 542 struct r200_tcl_info {
 543    GLuint hw_primitive;
 544
 545    int elt_used;
 546
 547 };
 548
 549
 550 /* r200_swtcl.c
 551  */
 552 struct r200_swtcl_info {
 553
 554
 555    radeon_point_func draw_point;
 556    radeon_line_func draw_line;
 557    radeon_tri_func draw_tri;
 558
 559    /**
 560     * Offset of the 4UB color data within a hardware (swtcl) vertex.
 561     */
 562    GLuint coloroffset;
 563
 564    /**
 565     * Offset of the 3UB specular color data within a hardware (swtcl) vertex.
 566     */
 567    GLuint specoffset;
 568
 569    /**
 570     * Should Mesa project vertex data or will the hardware do it?
 571     */
 572    GLboolean needproj;
 573 };
 574
 575
 576
 577
 578    /* A maximum total of 29 elements per vertex:  3 floats for position, 3
 579     * floats for normal, 4 floats for color, 4 bytes for secondary color,
 580     * 3 floats for each texture unit (18 floats total).
 581     *
 582     * we maybe need add. 4 to prevent segfault if someone specifies
 583     * GL_TEXTURE6/GL_TEXTURE7 (esp. for the codegen-path) (FIXME: )
 584     *
 585     * The position data is never actually stored here, so 3 elements could be
 586     * trimmed out of the buffer.
 587     */
 588
 589 #define R200_MAX_VERTEX_SIZE ((3*6)+11)
 590
 591 struct r200_context {
 592    struct radeon_context radeon;
 593
 594    /* Driver and hardware state management
 595     */
 596    struct r200_hw_state hw;
 597    struct r200_state state;
 598    struct r200_vertex_program *curr_vp_hw;
 599
 600    /* Vertex buffers
 601     */
 602    struct radeon_ioctl ioctl;
 603    struct radeon_store store;
 604
 605    /* Clientdata textures;
 606     */
 607    GLuint prefer_gart_client_texturing;
 608
 609    /* TCL stuff
 610     */
 611    GLmatrix TexGenMatrix[R200_MAX_TEXTURE_UNITS];
 612    GLboolean recheck_texgen[R200_MAX_TEXTURE_UNITS];
 613    GLboolean TexGenNeedNormals[R200_MAX_TEXTURE_UNITS];
 614    GLuint TexMatEnabled;
 615    GLuint TexMatCompSel;
 616    GLuint TexGenEnabled;
 617    GLuint TexGenCompSel;
 618    GLmatrix tmpmat;
 619
 620    /* r200_tcl.c
 621     */
 622    struct r200_tcl_info tcl;
 623
 624    /* r200_swtcl.c
 625     */
 626    struct r200_swtcl_info swtcl;
 627
 628    GLboolean using_hyperz;
 629    GLboolean texmicrotile;
 630
 631   struct ati_fragment_shader *afs_loaded;
 632 };
 633
 634 #define R200_CONTEXT(ctx)               ((r200ContextPtr)(ctx->DriverCtx))
 635
 636
 637 extern void r200DestroyContext( __DRIcontext *driContextPriv );
 638 extern GLboolean r200CreateContext( gl_api api,
 639                                     const struct gl_config *glVisual,
 640                                     __DRIcontext *driContextPriv,
 641                                     void *sharedContextPrivate);
 642 extern GLboolean r200MakeCurrent( __DRIcontext *driContextPriv,
 643                                   __DRIdrawable *driDrawPriv,
 644                                   __DRIdrawable *driReadPriv );
 645 extern GLboolean r200UnbindContext( __DRIcontext *driContextPriv );
 646
 647 extern void r200_init_texcopy_functions(struct dd_function_table *table);
 648
 649 /* ================================================================
 650  * Debugging:
 651  */
 652
 653 #define R200_DEBUG RADEON_DEBUG
 654
 655
 656
 657 #endif /* __R200_CONTEXT_H__ */