2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 **************************************************************************/
32 * Keith Whitwell <keith@tungstengraphics.com>
35 #ifndef __R200_IOCTL_H__
36 #define __R200_IOCTL_H__
38 #include "main/simple_list.h"
39 #include "radeon_dri.h"
41 #include "radeon_bocs_wrapper.h"
45 #include "radeon_drm.h"
47 extern void r200EmitVertexAOS( r200ContextPtr rmesa
,
52 extern void r200EmitVbufPrim( r200ContextPtr rmesa
,
56 extern void r200FlushElts(GLcontext
*ctx
);
58 extern GLushort
*r200AllocEltsOpenEnded( r200ContextPtr rmesa
,
62 extern void r200EmitAOS(r200ContextPtr rmesa
, GLuint nr
, GLuint offset
);
64 extern void r200InitIoctlFuncs( struct dd_function_table
*functions
);
66 extern void *r200AllocateMemoryMESA( __DRIscreen
*screen
, GLsizei size
, GLfloat readfreq
,
67 GLfloat writefreq
, GLfloat priority
);
68 extern void r200FreeMemoryMESA( __DRIscreen
*screen
, GLvoid
*pointer
);
69 extern GLuint
r200GetMemoryOffsetMESA( __DRIscreen
*screen
, const GLvoid
*pointer
);
71 extern GLboolean
r200IsGartMemory( r200ContextPtr rmesa
, const GLvoid
*pointer
,
74 extern GLuint
r200GartOffsetFromVirtual( r200ContextPtr rmesa
,
75 const GLvoid
*pointer
);
77 void r200SetUpAtomList( r200ContextPtr rmesa
);
79 /* ================================================================
83 /* Close off the last primitive, if it exists.
85 #define R200_NEWPRIM( rmesa ) \
87 if ( rmesa->radeon.dma.flush ) \
88 rmesa->radeon.dma.flush( rmesa->radeon.glCtx ); \
91 /* Can accomodate several state changes and primitive changes without
92 * actually firing the buffer.
94 #define R200_STATECHANGE( rmesa, ATOM ) \
96 R200_NEWPRIM( rmesa ); \
97 rmesa->hw.ATOM.dirty = GL_TRUE; \
98 rmesa->radeon.hw.is_dirty = GL_TRUE; \
101 #define R200_DB_STATE( ATOM ) \
102 memcpy( rmesa->hw.ATOM.lastcmd, rmesa->hw.ATOM.cmd, \
103 rmesa->hw.ATOM.cmd_size * 4)
105 static INLINE
int R200_DB_STATECHANGE(
106 r200ContextPtr rmesa
,
107 struct radeon_state_atom
*atom
)
109 if (memcmp(atom
->cmd
, atom
->lastcmd
, atom
->cmd_size
*4)) {
111 R200_NEWPRIM( rmesa
);
112 atom
->dirty
= GL_TRUE
;
113 rmesa
->radeon
.hw
.is_dirty
= GL_TRUE
;
115 atom
->cmd
= atom
->lastcmd
;
124 /* Command lengths. Note that any time you ensure ELTS_BUFSZ or VBUF_BUFSZ
125 * are available, you will also be adding an rmesa->state.max_state_size because
126 * r200EmitState is called from within r200EmitVbufPrim and r200FlushElts.
128 #define AOS_BUFSZ(nr) ((3 + ((nr / 2) * 3) + ((nr & 1) * 2)) * sizeof(int))
129 #define VERT_AOS_BUFSZ (5 * sizeof(int))
130 #define ELTS_BUFSZ(nr) (12 + nr * 2)
131 #define VBUF_BUFSZ (3 * sizeof(int))
133 static inline uint32_t cmdpacket3(int cmd_type
)
135 drm_radeon_cmd_header_t cmd
;
138 cmd
.header
.cmd_type
= cmd_type
;
140 return (uint32_t)cmd
.i
;
144 #define OUT_BATCH_PACKET3(packet, num_extra) do { \
145 if (!b_l_rmesa->radeonScreen->kernel_mm) { \
146 OUT_BATCH(cmdpacket3(RADEON_CMD_PACKET3)); \
147 OUT_BATCH(CP_PACKET3((packet), (num_extra))); \
149 OUT_BATCH(CP_PACKET2); \
150 OUT_BATCH(CP_PACKET3((packet), (num_extra))); \
154 #define OUT_BATCH_PACKET3_CLIP(packet, num_extra) do { \
155 if (!b_l_rmesa->radeonScreen->kernel_mm) { \
156 OUT_BATCH(cmdpacket3(RADEON_CMD_PACKET3_CLIP)); \
157 OUT_BATCH(CP_PACKET3((packet), (num_extra))); \
159 OUT_BATCH(CP_PACKET2); \
160 OUT_BATCH(CP_PACKET3((packet), (num_extra))); \
165 #endif /* __R200_IOCTL_H__ */