src/mesa/drivers/dri/r200/r200_ioctl.h

   1 /*
   2 Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
   3
   4 The Weather Channel (TM) funded Tungsten Graphics to develop the
   5 initial release of the Radeon 8500 driver under the XFree86 license.
   6 This notice must be preserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /*
  31  * Authors:
  32  *   Keith Whitwell <keith@tungstengraphics.com>
  33  */
  34
  35 #ifndef __R200_IOCTL_H__
  36 #define __R200_IOCTL_H__
  37
  38 #include "main/simple_list.h"
  39 #include "radeon_dri.h"
  40 #include "r200_lock.h"
  41
  42 #include "xf86drm.h"
  43 #include "drm.h"
  44 #include "radeon_drm.h"
  45
  46 #include "common_cmdbuf.h"
  47
  48 extern void r200EmitState( r200ContextPtr rmesa );
  49 extern void r200EmitVertexAOS( r200ContextPtr rmesa,
  50                                GLuint vertex_size,
  51                                struct radeon_bo *bo,
  52                                GLuint offset );
  53
  54 extern void r200EmitVbufPrim( r200ContextPtr rmesa,
  55                                 GLuint primitive,
  56                                 GLuint vertex_nr );
  57
  58 extern void r200FlushElts(GLcontext *ctx);
  59
  60 extern GLushort *r200AllocEltsOpenEnded( r200ContextPtr rmesa,
  61                                            GLuint primitive,
  62                                            GLuint min_nr );
  63
  64 extern void r200EmitAOS(r200ContextPtr rmesa, GLuint nr, GLuint offset);
  65
  66 extern void r200EmitBlit( r200ContextPtr rmesa,
  67                           GLuint color_fmt,
  68                           GLuint src_pitch,
  69                           GLuint src_offset,
  70                           GLuint dst_pitch,
  71                           GLuint dst_offset,
  72                           GLint srcx, GLint srcy,
  73                           GLint dstx, GLint dsty,
  74                           GLuint w, GLuint h );
  75
  76 extern void r200EmitWait( r200ContextPtr rmesa, GLuint flags );
  77
  78 //extern void r200FlushCmdBuf( r200ContextPtr rmesa, const char * );
  79 //extern int r200FlushCmdBufLocked( r200ContextPtr rmesa, const char * caller );
  80
  81 extern void r200RefillCurrentDmaRegion( r200ContextPtr rmesa );
  82
  83 extern void r200AllocDmaRegion( r200ContextPtr rmesa,
  84                                   struct radeon_dma_region *region,
  85                                   int bytes,
  86                                   int alignment );
  87
  88 extern void r200ReleaseDmaRegion( r200ContextPtr rmesa,
  89                                     struct radeon_dma_region *region,
  90                                     const char *caller );
  91
  92 extern void r200Flush( GLcontext *ctx );
  93 extern void r200Finish( GLcontext *ctx );
  94 extern void r200InitIoctlFuncs( struct dd_function_table *functions );
  95
  96 extern void *r200AllocateMemoryMESA( __DRIscreen *screen, GLsizei size, GLfloat readfreq,
  97                                    GLfloat writefreq, GLfloat priority );
  98 extern void r200FreeMemoryMESA( __DRIscreen *screen, GLvoid *pointer );
  99 extern GLuint r200GetMemoryOffsetMESA( __DRIscreen *screen, const GLvoid *pointer );
 100
 101 extern GLboolean r200IsGartMemory( r200ContextPtr rmesa, const GLvoid *pointer,
 102                                    GLint size );
 103
 104 extern GLuint r200GartOffsetFromVirtual( r200ContextPtr rmesa,
 105                                          const GLvoid *pointer );
 106
 107 void r200SetUpAtomList( r200ContextPtr rmesa );
 108
 109 /* ================================================================
 110  * Helper macros:
 111  */
 112
 113 /* Close off the last primitive, if it exists.
 114  */
 115 #define R200_NEWPRIM( rmesa )                   \
 116 do {                                            \
 117    if ( rmesa->radeon.dma.flush )                       \
 118       rmesa->radeon.dma.flush( rmesa->radeon.glCtx );   \
 119 } while (0)
 120
 121 /* Can accomodate several state changes and primitive changes without
 122  * actually firing the buffer.
 123  */
 124 #define R200_STATECHANGE( rmesa, ATOM )                 \
 125 do {                                                            \
 126    R200_NEWPRIM( rmesa );                                       \
 127    rmesa->hw.ATOM.dirty = GL_TRUE;                              \
 128    rmesa->hw.is_dirty = GL_TRUE;                                \
 129 } while (0)
 130
 131 #define R200_DB_STATE( ATOM )                           \
 132    memcpy( rmesa->hw.ATOM.lastcmd, rmesa->hw.ATOM.cmd,  \
 133            rmesa->hw.ATOM.cmd_size * 4)
 134
 135 static INLINE int R200_DB_STATECHANGE(
 136    r200ContextPtr rmesa,
 137    struct radeon_state_atom *atom )
 138 {
 139    if (memcmp(atom->cmd, atom->lastcmd, atom->cmd_size*4)) {
 140       GLuint *tmp;
 141       R200_NEWPRIM( rmesa );
 142       atom->dirty = GL_TRUE;
 143       rmesa->hw.is_dirty = GL_TRUE;
 144       tmp = atom->cmd;
 145       atom->cmd = atom->lastcmd;
 146       atom->lastcmd = tmp;
 147       return 1;
 148    }
 149    else
 150       return 0;
 151 }
 152
 153
 154 /* Fire the buffered vertices no matter what.
 155  */
 156 #define R200_FIREVERTICES( rmesa )                      \
 157 do {                                                    \
 158    if ( rmesa->radeon.dma.flush ) {     \
 159       r200Flush( rmesa->radeon.glCtx );                 \
 160    }                                                    \
 161 } while (0)
 162
 163 /* Command lengths.  Note that any time you ensure ELTS_BUFSZ or VBUF_BUFSZ
 164  * are available, you will also be adding an rmesa->state.max_state_size because
 165  * r200EmitState is called from within r200EmitVbufPrim and r200FlushElts.
 166  */
 167 #define AOS_BUFSZ(nr)   ((3 + ((nr / 2) * 3) + ((nr & 1) * 2)) * sizeof(int))
 168 #define VERT_AOS_BUFSZ  (5 * sizeof(int))
 169 #define ELTS_BUFSZ(nr)  (12 + nr * 2)
 170 #define VBUF_BUFSZ      (3 * sizeof(int))
 171
 172 /* Ensure that a minimum amount of space is available in the command buffer.
 173  * This is used to ensure atomicity of state updates with the rendering requests
 174  * that rely on them.
 175  *
 176  * An alternative would be to implement a "soft lock" such that when the buffer
 177  * wraps at an inopportune time, we grab the lock, flush the current buffer,
 178  * and hang on to the lock until the critical section is finished and we flush
 179  * the buffer again and unlock.
 180  */
 181 #if 0
 182 static INLINE void r200EnsureCmdBufSpace( r200ContextPtr rmesa, int bytes )
 183 {
 184    if (rmesa->store.cmd_used + bytes > R200_CMD_BUF_SZ)
 185       rcommonFlushCmdBuf( rmesa, __FUNCTION__ );
 186    assert( bytes <= R200_CMD_BUF_SZ );
 187 }
 188
 189 /* Alloc space in the command buffer
 190  */
 191 static INLINE char *r200AllocCmdBuf( r200ContextPtr rmesa,
 192                                          int bytes, const char *where )
 193 {
 194    char * head;
 195
 196    if (rmesa->store.cmd_used + bytes > R200_CMD_BUF_SZ)
 197       r200FlushCmdBuf( rmesa, where );
 198
 199    head = rmesa->store.cmd_buf + rmesa->store.cmd_used;
 200    rmesa->store.cmd_used += bytes;
 201    assert( rmesa->store.cmd_used <= R200_CMD_BUF_SZ );
 202    return head;
 203 }
 204 #endif
 205
 206 static inline uint32_t cmdpacket3(int cmd_type)
 207 {
 208   drm_radeon_cmd_header_t cmd;
 209
 210   cmd.i = 0;
 211   cmd.header.cmd_type = cmd_type;
 212
 213   return (uint32_t)cmd.i;
 214
 215 }
 216
 217 #define OUT_BATCH_PACKET3(packet, num_extra) do {             \
 218     if (!b_l_rmesa->radeonScreen->kernel_mm) {                \
 219       OUT_BATCH(cmdpacket3(RADEON_CMD_PACKET3));                                      \
 220       OUT_BATCH(CP_PACKET3((packet), (num_extra)));           \
 221     } else {                                                  \
 222       OUT_BATCH(CP_PACKET2);                                  \
 223       OUT_BATCH(CP_PACKET3((packet), (num_extra)));           \
 224     }                                                         \
 225   } while(0)
 226
 227 #define OUT_BATCH_PACKET3_CLIP(packet, num_extra) do {        \
 228     if (!b_l_rmesa->radeonScreen->kernel_mm) {                \
 229       OUT_BATCH(cmdpacket3(RADEON_CMD_PACKET3_CLIP));         \
 230       OUT_BATCH(CP_PACKET3((packet), (num_extra)));           \
 231     } else {                                                  \
 232       OUT_BATCH(CP_PACKET2);                                  \
 233       OUT_BATCH(CP_PACKET3((packet), (num_extra)));           \
 234     }                                                         \
 235   } while(0)
 236
 237
 238 #endif /* __R200_IOCTL_H__ */