2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 **************************************************************************/
32 * Keith Whitwell <keith@tungstengraphics.com>
35 #ifndef __R200_IOCTL_H__
36 #define __R200_IOCTL_H__
38 #include "main/simple_list.h"
39 #include "radeon_dri.h"
41 #include "radeon_bocs_wrapper.h"
45 #include "radeon_drm.h"
47 extern void r200EmitMaxVtxIndex(r200ContextPtr rmesa
, int count
);
48 extern void r200EmitVertexAOS( r200ContextPtr rmesa
,
53 extern void r200EmitVbufPrim( r200ContextPtr rmesa
,
57 extern void r200FlushElts(struct gl_context
*ctx
);
59 extern GLushort
*r200AllocEltsOpenEnded( r200ContextPtr rmesa
,
63 extern void r200EmitAOS(r200ContextPtr rmesa
, GLuint nr
, GLuint offset
);
65 extern void r200InitIoctlFuncs( struct dd_function_table
*functions
);
67 extern GLboolean
r200IsGartMemory( r200ContextPtr rmesa
, const GLvoid
*pointer
,
70 extern GLuint
r200GartOffsetFromVirtual( r200ContextPtr rmesa
,
71 const GLvoid
*pointer
);
73 void r200SetUpAtomList( r200ContextPtr rmesa
);
75 /* ================================================================
79 /* Close off the last primitive, if it exists.
81 #define R200_NEWPRIM( rmesa ) \
83 if ( rmesa->radeon.dma.flush ) \
84 rmesa->radeon.dma.flush( rmesa->radeon.glCtx ); \
87 /* Can accomodate several state changes and primitive changes without
88 * actually firing the buffer.
90 #define R200_STATECHANGE( rmesa, ATOM ) \
92 R200_NEWPRIM( rmesa ); \
93 rmesa->hw.ATOM.dirty = GL_TRUE; \
94 rmesa->radeon.hw.is_dirty = GL_TRUE; \
97 #define R200_SET_STATE( rmesa, ATOM, index, newvalue ) \
99 uint32_t __index = (index); \
100 uint32_t __dword = (newvalue); \
101 if (__dword != (rmesa)->hw.ATOM.cmd[__index]) { \
102 R200_STATECHANGE( (rmesa), ATOM ); \
103 (rmesa)->hw.ATOM.cmd[__index] = __dword; \
107 #define R200_DB_STATE( ATOM ) \
108 memcpy( rmesa->hw.ATOM.lastcmd, rmesa->hw.ATOM.cmd, \
109 rmesa->hw.ATOM.cmd_size * 4)
111 static INLINE
int R200_DB_STATECHANGE(
112 r200ContextPtr rmesa
,
113 struct radeon_state_atom
*atom
)
115 if (memcmp(atom
->cmd
, atom
->lastcmd
, atom
->cmd_size
*4)) {
117 R200_NEWPRIM( rmesa
);
118 atom
->dirty
= GL_TRUE
;
119 rmesa
->radeon
.hw
.is_dirty
= GL_TRUE
;
121 atom
->cmd
= atom
->lastcmd
;
130 /* Command lengths. Note that any time you ensure ELTS_BUFSZ or VBUF_BUFSZ
131 * are available, you will also be adding an rmesa->state.max_state_size because
132 * r200EmitState is called from within r200EmitVbufPrim and r200FlushElts.
134 #define AOS_BUFSZ(nr) ((3 + ((nr / 2) * 3) + ((nr & 1) * 2) + nr*2))
135 #define VERT_AOS_BUFSZ (5)
136 #define ELTS_BUFSZ(nr) (12 + nr * 2)
137 #define VBUF_BUFSZ (3)
138 #define SCISSOR_BUFSZ (8)
139 #define INDEX_BUFSZ (8+2)
141 static inline uint32_t cmdpacket3(int cmd_type
)
143 drm_radeon_cmd_header_t cmd
;
146 cmd
.header
.cmd_type
= cmd_type
;
148 return (uint32_t)cmd
.i
;
152 #define OUT_BATCH_PACKET3(packet, num_extra) do { \
153 if (!b_l_rmesa->radeonScreen->kernel_mm) { \
154 OUT_BATCH(cmdpacket3(RADEON_CMD_PACKET3)); \
155 OUT_BATCH(CP_PACKET3((packet), (num_extra))); \
157 OUT_BATCH(CP_PACKET2); \
158 OUT_BATCH(CP_PACKET3((packet), (num_extra))); \
162 #define OUT_BATCH_PACKET3_CLIP(packet, num_extra) do { \
163 if (!b_l_rmesa->radeonScreen->kernel_mm) { \
164 OUT_BATCH(cmdpacket3(RADEON_CMD_PACKET3_CLIP)); \
165 OUT_BATCH(CP_PACKET3((packet), (num_extra))); \
167 OUT_BATCH(CP_PACKET2); \
168 OUT_BATCH(CP_PACKET3((packet), (num_extra))); \
173 #endif /* __R200_IOCTL_H__ */