src/mesa/drivers/dri/r200/r200_tcl.c

   1 /*
   2 Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
   3
   4 The Weather Channel (TM) funded Tungsten Graphics to develop the
   5 initial release of the Radeon 8500 driver under the XFree86 license.
   6 This notice must be preserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /*
  31  * Authors:
  32  *   Keith Whitwell <keith@tungstengraphics.com>
  33  */
  34
  35 #include "main/glheader.h"
  36 #include "main/imports.h"
  37 #include "main/mtypes.h"
  38 #include "main/enums.h"
  39 #include "main/colormac.h"
  40 #include "main/light.h"
  41
  42 #include "vbo/vbo.h"
  43 #include "tnl/tnl.h"
  44 #include "tnl/t_pipeline.h"
  45
  46 #include "r200_context.h"
  47 #include "r200_state.h"
  48 #include "r200_ioctl.h"
  49 #include "r200_tcl.h"
  50 #include "r200_swtcl.h"
  51 #include "r200_maos.h"
  52
  53 #include "radeon_common_context.h"
  54
  55
  56
  57 #define HAVE_POINTS      1
  58 #define HAVE_LINES       1
  59 #define HAVE_LINE_LOOP   0
  60 #define HAVE_LINE_STRIPS 1
  61 #define HAVE_TRIANGLES   1
  62 #define HAVE_TRI_STRIPS  1
  63 #define HAVE_TRI_STRIP_1 0
  64 #define HAVE_TRI_FANS    1
  65 #define HAVE_QUADS       1
  66 #define HAVE_QUAD_STRIPS 1
  67 #define HAVE_POLYGONS    1
  68 #define HAVE_ELTS        1
  69
  70
  71 #define HW_POINTS           ((ctx->Point.PointSprite || \
  72                                 ((ctx->_TriangleCaps & (DD_POINT_SIZE | DD_POINT_ATTEN)) && \
  73                                 !(ctx->_TriangleCaps & (DD_POINT_SMOOTH)))) ? \
  74                                 R200_VF_PRIM_POINT_SPRITES : R200_VF_PRIM_POINTS)
  75 #define HW_LINES            R200_VF_PRIM_LINES
  76 #define HW_LINE_LOOP        0
  77 #define HW_LINE_STRIP       R200_VF_PRIM_LINE_STRIP
  78 #define HW_TRIANGLES        R200_VF_PRIM_TRIANGLES
  79 #define HW_TRIANGLE_STRIP_0 R200_VF_PRIM_TRIANGLE_STRIP
  80 #define HW_TRIANGLE_STRIP_1 0
  81 #define HW_TRIANGLE_FAN     R200_VF_PRIM_TRIANGLE_FAN
  82 #define HW_QUADS            R200_VF_PRIM_QUADS
  83 #define HW_QUAD_STRIP       R200_VF_PRIM_QUAD_STRIP
  84 #define HW_POLYGON          R200_VF_PRIM_POLYGON
  85
  86
  87 static GLboolean discrete_prim[0x10] = {
  88    0,                           /* 0 none */
  89    1,                           /* 1 points */
  90    1,                           /* 2 lines */
  91    0,                           /* 3 line_strip */
  92    1,                           /* 4 tri_list */
  93    0,                           /* 5 tri_fan */
  94    0,                           /* 6 tri_strip */
  95    0,                           /* 7 tri_w_flags */
  96    1,                           /* 8 rect list (unused) */
  97    1,                           /* 9 3vert point */
  98    1,                           /* a 3vert line */
  99    0,                           /* b point sprite */
 100    0,                           /* c line loop */
 101    1,                           /* d quads */
 102    0,                           /* e quad strip */
 103    0,                           /* f polygon */
 104 };
 105
 106
 107 #define LOCAL_VARS r200ContextPtr rmesa = R200_CONTEXT(ctx)
 108 #define ELT_TYPE  GLushort
 109
 110 #define ELT_INIT(prim, hw_prim) \
 111    r200TclPrimitive( ctx, prim, hw_prim | R200_VF_PRIM_WALK_IND )
 112
 113 #define GET_MESA_ELTS() TNL_CONTEXT(ctx)->vb.Elts
 114
 115
 116 /* Don't really know how many elts will fit in what's left of cmdbuf,
 117  * as there is state to emit, etc:
 118  */
 119
 120 /* Testing on isosurf shows a maximum around here.  Don't know if it's
 121  * the card or driver or kernel module that is causing the behaviour.
 122  */
 123 #define GET_MAX_HW_ELTS() 300
 124
 125 #define RESET_STIPPLE() do {                    \
 126    R200_STATECHANGE( rmesa, lin );              \
 127    radeonEmitState(&rmesa->radeon);                     \
 128 } while (0)
 129
 130 #define AUTO_STIPPLE( mode )  do {              \
 131    R200_STATECHANGE( rmesa, lin );              \
 132    if (mode)                                    \
 133       rmesa->hw.lin.cmd[LIN_RE_LINE_PATTERN] |= \
 134          R200_LINE_PATTERN_AUTO_RESET;  \
 135    else                                         \
 136       rmesa->hw.lin.cmd[LIN_RE_LINE_PATTERN] &= \
 137          ~R200_LINE_PATTERN_AUTO_RESET; \
 138    radeonEmitState(&rmesa->radeon);                     \
 139 } while (0)
 140
 141
 142 #define ALLOC_ELTS(nr)  r200AllocElts( rmesa, nr )
 143
 144 static GLushort *r200AllocElts( r200ContextPtr rmesa, GLuint nr )
 145 {
 146    if (rmesa->radeon.dma.flush == r200FlushElts &&
 147        rmesa->tcl.elt_used + nr*2 < R200_ELT_BUF_SZ) {
 148
 149       GLushort *dest = (GLushort *)(rmesa->radeon.tcl.elt_dma_bo->ptr +
 150                                     rmesa->radeon.tcl.elt_dma_offset + rmesa->tcl.elt_used);
 151
 152       rmesa->tcl.elt_used += nr*2;
 153
 154       return dest;
 155    }
 156    else {
 157       if (rmesa->radeon.dma.flush)
 158          rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
 159
 160       r200EmitAOS( rmesa,
 161                    rmesa->radeon.tcl.aos_count, 0 );
 162
 163       r200EmitMaxVtxIndex(rmesa, rmesa->radeon.tcl.aos[0].count);
 164       return r200AllocEltsOpenEnded( rmesa, rmesa->tcl.hw_primitive, nr );
 165    }
 166 }
 167
 168
 169 #define CLOSE_ELTS()                            \
 170 do {                                            \
 171    if (0) R200_NEWPRIM( rmesa );                \
 172 }                                               \
 173 while (0)
 174
 175
 176 /* TODO: Try to extend existing primitive if both are identical,
 177  * discrete and there are no intervening state changes.  (Somewhat
 178  * duplicates changes to DrawArrays code)
 179  */
 180 static void r200EmitPrim( struct gl_context *ctx,
 181                           GLenum prim,
 182                           GLuint hwprim,
 183                           GLuint start,
 184                           GLuint count)
 185 {
 186    r200ContextPtr rmesa = R200_CONTEXT( ctx );
 187    r200TclPrimitive( ctx, prim, hwprim );
 188
 189    //   fprintf(stderr,"Emit prim %d\n", rmesa->radeon.tcl.aos_count);
 190
 191    r200EmitAOS( rmesa,
 192                 rmesa->radeon.tcl.aos_count,
 193                 start );
 194
 195    /* Why couldn't this packet have taken an offset param?
 196     */
 197    r200EmitVbufPrim( rmesa,
 198                      rmesa->tcl.hw_primitive,
 199                      count - start );
 200 }
 201
 202 #define EMIT_PRIM(ctx, prim, hwprim, start, count) do {         \
 203    r200EmitPrim( ctx, prim, hwprim, start, count );             \
 204    (void) rmesa; } while (0)
 205
 206 #define MAX_CONVERSION_SIZE 40
 207 /* Try & join small primitives
 208  */
 209 #if 0
 210 #define PREFER_DISCRETE_ELT_PRIM( NR, PRIM ) 0
 211 #else
 212 #define PREFER_DISCRETE_ELT_PRIM( NR, PRIM )                    \
 213   ((NR) < 20 ||                                                 \
 214    ((NR) < 40 &&                                                \
 215     rmesa->tcl.hw_primitive == (PRIM|                           \
 216                             R200_VF_TCL_OUTPUT_VTX_ENABLE|      \
 217                                 R200_VF_PRIM_WALK_IND)))
 218 #endif
 219
 220 #ifdef MESA_BIG_ENDIAN
 221 /* We could do without (most of) this ugliness if dest was always 32 bit word aligned... */
 222 #define EMIT_ELT(dest, offset, x) do {                          \
 223         int off = offset + ( ( (GLuint)dest & 0x2 ) >> 1 );     \
 224         GLushort *des = (GLushort *)( (GLuint)dest & ~0x2 );    \
 225         (des)[ off + 1 - 2 * ( off & 1 ) ] = (GLushort)(x);     \
 226         (void)rmesa; } while (0)
 227 #else
 228 #define EMIT_ELT(dest, offset, x) do {                          \
 229         (dest)[offset] = (GLushort) (x);                        \
 230         (void)rmesa; } while (0)
 231 #endif
 232
 233 #define EMIT_TWO_ELTS(dest, offset, x, y)  *(GLuint *)((dest)+offset) = ((y)<<16)|(x);
 234
 235
 236
 237 #define TAG(x) tcl_##x
 238 #include "tnl_dd/t_dd_dmatmp2.h"
 239
 240 /**********************************************************************/
 241 /*                          External entrypoints                     */
 242 /**********************************************************************/
 243
 244 void r200EmitPrimitive( struct gl_context *ctx,
 245                           GLuint first,
 246                           GLuint last,
 247                           GLuint flags )
 248 {
 249    tcl_render_tab_verts[flags&PRIM_MODE_MASK]( ctx, first, last, flags );
 250 }
 251
 252 void r200EmitEltPrimitive( struct gl_context *ctx,
 253                              GLuint first,
 254                              GLuint last,
 255                              GLuint flags )
 256 {
 257    tcl_render_tab_elts[flags&PRIM_MODE_MASK]( ctx, first, last, flags );
 258 }
 259
 260 void r200TclPrimitive( struct gl_context *ctx,
 261                          GLenum prim,
 262                          int hw_prim )
 263 {
 264    r200ContextPtr rmesa = R200_CONTEXT(ctx);
 265    GLuint newprim = hw_prim | R200_VF_TCL_OUTPUT_VTX_ENABLE;
 266
 267    radeon_prepare_render(&rmesa->radeon);
 268    if (rmesa->radeon.NewGLState)
 269       r200ValidateState( ctx );
 270
 271    if (newprim != rmesa->tcl.hw_primitive ||
 272        !discrete_prim[hw_prim&0xf]) {
 273       /* need to disable perspective-correct texturing for point sprites */
 274       if ((prim & PRIM_MODE_MASK) == GL_POINTS && ctx->Point.PointSprite) {
 275          if (rmesa->hw.set.cmd[SET_RE_CNTL] & R200_PERSPECTIVE_ENABLE) {
 276             R200_STATECHANGE( rmesa, set );
 277             rmesa->hw.set.cmd[SET_RE_CNTL] &= ~R200_PERSPECTIVE_ENABLE;
 278          }
 279       }
 280       else if (!(rmesa->hw.set.cmd[SET_RE_CNTL] & R200_PERSPECTIVE_ENABLE)) {
 281          R200_STATECHANGE( rmesa, set );
 282          rmesa->hw.set.cmd[SET_RE_CNTL] |= R200_PERSPECTIVE_ENABLE;
 283       }
 284       R200_NEWPRIM( rmesa );
 285       rmesa->tcl.hw_primitive = newprim;
 286    }
 287 }
 288
 289
 290 /**********************************************************************/
 291 /*             Fog blend factor computation for hw tcl                */
 292 /*             same calculation used as in t_vb_fog.c                 */
 293 /**********************************************************************/
 294
 295 #define FOG_EXP_TABLE_SIZE 256
 296 #define FOG_MAX (10.0)
 297 #define EXP_FOG_MAX .0006595
 298 #define FOG_INCR (FOG_MAX/FOG_EXP_TABLE_SIZE)
 299 static GLfloat exp_table[FOG_EXP_TABLE_SIZE];
 300
 301 #if 1
 302 #define NEG_EXP( result, narg )                                         \
 303 do {                                                                    \
 304    GLfloat f = (GLfloat) (narg * (1.0/FOG_INCR));                       \
 305    GLint k = (GLint) f;                                                 \
 306    if (k > FOG_EXP_TABLE_SIZE-2)                                        \
 307       result = (GLfloat) EXP_FOG_MAX;                                   \
 308    else                                                                 \
 309       result = exp_table[k] + (f-k)*(exp_table[k+1]-exp_table[k]);      \
 310 } while (0)
 311 #else
 312 #define NEG_EXP( result, narg )                                 \
 313 do {                                                            \
 314    result = exp(-narg);                                         \
 315 } while (0)
 316 #endif
 317
 318
 319 /**
 320  * Initialize the exp_table[] lookup table for approximating exp().
 321  */
 322 void
 323 r200InitStaticFogData( void )
 324 {
 325    GLfloat f = 0.0F;
 326    GLint i = 0;
 327    for ( ; i < FOG_EXP_TABLE_SIZE ; i++, f += FOG_INCR) {
 328       exp_table[i] = (GLfloat) exp(-f);
 329    }
 330 }
 331
 332
 333 /**
 334  * Compute per-vertex fog blend factors from fog coordinates by
 335  * evaluating the GL_LINEAR, GL_EXP or GL_EXP2 fog function.
 336  * Fog coordinates are distances from the eye (typically between the
 337  * near and far clip plane distances).
 338  * Note the fog (eye Z) coords may be negative so we use ABS(z) below.
 339  * Fog blend factors are in the range [0,1].
 340  */
 341 float
 342 r200ComputeFogBlendFactor( struct gl_context *ctx, GLfloat fogcoord )
 343 {
 344    GLfloat end  = ctx->Fog.End;
 345    GLfloat d, temp;
 346    const GLfloat z = FABSF(fogcoord);
 347
 348    switch (ctx->Fog.Mode) {
 349    case GL_LINEAR:
 350       if (ctx->Fog.Start == ctx->Fog.End)
 351          d = 1.0F;
 352       else
 353          d = 1.0F / (ctx->Fog.End - ctx->Fog.Start);
 354       temp = (end - z) * d;
 355       return CLAMP(temp, 0.0F, 1.0F);
 356       break;
 357    case GL_EXP:
 358       d = ctx->Fog.Density;
 359       NEG_EXP( temp, d * z );
 360       return temp;
 361       break;
 362    case GL_EXP2:
 363       d = ctx->Fog.Density*ctx->Fog.Density;
 364       NEG_EXP( temp, d * z * z );
 365       return temp;
 366       break;
 367    default:
 368       _mesa_problem(ctx, "Bad fog mode in make_fog_coord");
 369       return 0;
 370    }
 371 }
 372
 373 /**
 374  * Predict total emit size for next rendering operation so there is no flush in middle of rendering
 375  * Prediction has to aim towards the best possible value that is worse than worst case scenario
 376  */
 377 static GLuint r200EnsureEmitSize( struct gl_context * ctx , GLubyte* vimap_rev )
 378 {
 379   r200ContextPtr rmesa = R200_CONTEXT(ctx);
 380   TNLcontext *tnl = TNL_CONTEXT(ctx);
 381   struct vertex_buffer *VB = &tnl->vb;
 382   GLuint space_required;
 383   GLuint state_size;
 384   GLuint nr_aos = 0;
 385   int i;
 386   /* predict number of aos to emit */
 387   for (i = 0; i < 15; ++i)
 388   {
 389     if (vimap_rev[i] != 255)
 390     {
 391       ++nr_aos;
 392     }
 393   }
 394
 395   {
 396     /* count the prediction for state size */
 397     space_required = 0;
 398     state_size = radeonCountStateEmitSize( &rmesa->radeon );
 399     /* vtx may be changed in r200EmitArrays so account for it if not dirty */
 400     if (!rmesa->hw.vtx.dirty)
 401       state_size += rmesa->hw.vtx.check(rmesa->radeon.glCtx, &rmesa->hw.vtx);
 402     /* predict size for elements */
 403     for (i = 0; i < VB->PrimitiveCount; ++i)
 404     {
 405       if (!VB->Primitive[i].count)
 406         continue;
 407       /* If primitive.count is less than MAX_CONVERSION_SIZE
 408          rendering code may decide convert to elts.
 409          In that case we have to make pessimistic prediction.
 410          and use larger of 2 paths. */
 411       const GLuint elt_count =(VB->Primitive[i].count/GET_MAX_HW_ELTS() + 1);
 412       const GLuint elts = ELTS_BUFSZ(nr_aos) * elt_count;
 413       const GLuint index = INDEX_BUFSZ * elt_count;
 414       const GLuint vbuf = VBUF_BUFSZ;
 415       if ( (!VB->Elts && VB->Primitive[i].count >= MAX_CONVERSION_SIZE)
 416           || vbuf > index + elts)
 417         space_required += vbuf;
 418       else
 419         space_required += index + elts;
 420       space_required += AOS_BUFSZ(nr_aos);
 421     }
 422   }
 423
 424   radeon_print(RADEON_RENDER,RADEON_VERBOSE,
 425       "%s space %u, aos %d\n",
 426       __func__, space_required, AOS_BUFSZ(nr_aos) );
 427   /* flush the buffer in case we need more than is left. */
 428   if (rcommonEnsureCmdBufSpace(&rmesa->radeon, space_required + state_size, __FUNCTION__))
 429     return space_required + radeonCountStateEmitSize( &rmesa->radeon );
 430   else
 431     return space_required + state_size;
 432 }
 433
 434
 435 /**********************************************************************/
 436 /*                          Render pipeline stage                     */
 437 /**********************************************************************/
 438
 439
 440 /* TCL render.
 441  */
 442 static GLboolean r200_run_tcl_render( struct gl_context *ctx,
 443                                       struct tnl_pipeline_stage *stage )
 444 {
 445    r200ContextPtr rmesa = R200_CONTEXT(ctx);
 446    TNLcontext *tnl = TNL_CONTEXT(ctx);
 447    struct vertex_buffer *VB = &tnl->vb;
 448    GLuint i;
 449    GLubyte *vimap_rev;
 450 /* use hw fixed order for simplicity, pos 0, weight 1, normal 2, fog 3,
 451    color0 - color3 4-7, texcoord0 - texcoord5 8-13, pos 1 14. Must not use
 452    more than 12 of those at the same time. */
 453    GLubyte map_rev_fixed[15] = {255, 255, 255, 255, 255, 255, 255, 255,
 454                             255, 255, 255, 255, 255, 255, 255};
 455
 456
 457    /* TODO: separate this from the swtnl pipeline
 458     */
 459    if (rmesa->radeon.TclFallback)
 460       return GL_TRUE;   /* fallback to software t&l */
 461
 462    radeon_print(RADEON_RENDER, RADEON_NORMAL, "%s\n", __FUNCTION__);
 463
 464    if (VB->Count == 0)
 465       return GL_FALSE;
 466
 467    /* Validate state:
 468     */
 469    if (rmesa->radeon.NewGLState)
 470       if (!r200ValidateState( ctx ))
 471          return GL_TRUE; /* fallback to sw t&l */
 472
 473    if (!ctx->VertexProgram._Enabled) {
 474    /* NOTE: inputs != tnl->render_inputs - these are the untransformed
 475     * inputs.
 476     */
 477       map_rev_fixed[0] = VERT_ATTRIB_POS;
 478       /* technically there is no reason we always need VA_COLOR0. In theory
 479          could disable it depending on lighting, color materials, texturing... */
 480       map_rev_fixed[4] = VERT_ATTRIB_COLOR0;
 481
 482       if (ctx->Light.Enabled) {
 483          map_rev_fixed[2] = VERT_ATTRIB_NORMAL;
 484       }
 485
 486       /* this also enables VA_COLOR1 when using separate specular
 487          lighting model, which is unnecessary.
 488          FIXME: OTOH, we're missing the case where a ATI_fragment_shader accesses
 489          the secondary color (if lighting is disabled). The chip seems
 490          misconfigured for that though elsewhere (tcl output, might lock up) */
 491       if (ctx->_TriangleCaps & DD_SEPARATE_SPECULAR) {
 492          map_rev_fixed[5] = VERT_ATTRIB_COLOR1;
 493       }
 494
 495       if ( (ctx->Fog.FogCoordinateSource == GL_FOG_COORD) && ctx->Fog.Enabled ) {
 496          map_rev_fixed[3] = VERT_ATTRIB_FOG;
 497       }
 498
 499       for (i = 0 ; i < ctx->Const.MaxTextureUnits; i++) {
 500          if (ctx->Texture.Unit[i]._ReallyEnabled) {
 501             if (rmesa->TexGenNeedNormals[i]) {
 502                map_rev_fixed[2] = VERT_ATTRIB_NORMAL;
 503             }
 504             map_rev_fixed[8 + i] = VERT_ATTRIB_TEX0 + i;
 505          }
 506       }
 507       vimap_rev = &map_rev_fixed[0];
 508    }
 509    else {
 510       /* vtx_tcl_output_vtxfmt_0/1 need to match configuration of "fragment
 511          part", since using some vertex interpolator later which is not in
 512          out_vtxfmt0/1 will lock up. It seems to be ok to write in vertex
 513          prog to a not enabled output however, so just don't mess with it.
 514          We only need to change compsel. */
 515       GLuint out_compsel = 0;
 516       const GLbitfield64 vp_out =
 517          rmesa->curr_vp_hw->mesa_program.Base.OutputsWritten;
 518
 519       vimap_rev = &rmesa->curr_vp_hw->inputmap_rev[0];
 520       assert(vp_out & BITFIELD64_BIT(VERT_RESULT_HPOS));
 521       out_compsel = R200_OUTPUT_XYZW;
 522       if (vp_out & BITFIELD64_BIT(VERT_RESULT_COL0)) {
 523          out_compsel |= R200_OUTPUT_COLOR_0;
 524       }
 525       if (vp_out & BITFIELD64_BIT(VERT_RESULT_COL1)) {
 526          out_compsel |= R200_OUTPUT_COLOR_1;
 527       }
 528       if (vp_out & BITFIELD64_BIT(VERT_RESULT_FOGC)) {
 529          out_compsel |= R200_OUTPUT_DISCRETE_FOG;
 530       }
 531       if (vp_out & BITFIELD64_BIT(VERT_RESULT_PSIZ)) {
 532          out_compsel |= R200_OUTPUT_PT_SIZE;
 533       }
 534       for (i = VERT_RESULT_TEX0; i < VERT_RESULT_TEX6; i++) {
 535          if (vp_out & BITFIELD64_BIT(i)) {
 536             out_compsel |= R200_OUTPUT_TEX_0 << (i - VERT_RESULT_TEX0);
 537          }
 538       }
 539       if (rmesa->hw.vtx.cmd[VTX_TCL_OUTPUT_COMPSEL] != out_compsel) {
 540          R200_STATECHANGE( rmesa, vtx );
 541          rmesa->hw.vtx.cmd[VTX_TCL_OUTPUT_COMPSEL] = out_compsel;
 542       }
 543    }
 544
 545    /* Do the actual work:
 546     */
 547    radeonReleaseArrays( ctx, ~0 /* stage->changed_inputs */ );
 548    GLuint emit_end = r200EnsureEmitSize( ctx, vimap_rev )
 549      + rmesa->radeon.cmdbuf.cs->cdw;
 550    r200EmitArrays( ctx, vimap_rev );
 551
 552    for (i = 0 ; i < VB->PrimitiveCount ; i++)
 553    {
 554       GLuint prim = _tnl_translate_prim(&VB->Primitive[i]);
 555       GLuint start = VB->Primitive[i].start;
 556       GLuint length = VB->Primitive[i].count;
 557
 558       if (!length)
 559          continue;
 560
 561       if (VB->Elts)
 562          r200EmitEltPrimitive( ctx, start, start+length, prim );
 563       else
 564          r200EmitPrimitive( ctx, start, start+length, prim );
 565    }
 566    if ( emit_end < rmesa->radeon.cmdbuf.cs->cdw )
 567      WARN_ONCE("Rendering was %d commands larger than predicted size."
 568          " We might overflow  command buffer.\n", rmesa->radeon.cmdbuf.cs->cdw - emit_end);
 569
 570    return GL_FALSE;             /* finished the pipe */
 571 }
 572
 573
 574
 575 /* Initial state for tcl stage.
 576  */
 577 const struct tnl_pipeline_stage _r200_tcl_stage =
 578 {
 579    "r200 render",
 580    NULL,                        /*  private */
 581    NULL,
 582    NULL,
 583    NULL,
 584    r200_run_tcl_render  /* run */
 585 };
 586
 587
 588
 589 /**********************************************************************/
 590 /*                 Validate state at pipeline start                   */
 591 /**********************************************************************/
 592
 593
 594 /*-----------------------------------------------------------------------
 595  * Manage TCL fallbacks
 596  */
 597
 598
 599 static void transition_to_swtnl( struct gl_context *ctx )
 600 {
 601    r200ContextPtr rmesa = R200_CONTEXT(ctx);
 602    TNLcontext *tnl = TNL_CONTEXT(ctx);
 603
 604    R200_NEWPRIM( rmesa );
 605
 606    r200ChooseVertexState( ctx );
 607    r200ChooseRenderState( ctx );
 608
 609    _mesa_validate_all_lighting_tables( ctx );
 610
 611    tnl->Driver.NotifyMaterialChange =
 612       _mesa_validate_all_lighting_tables;
 613
 614    radeonReleaseArrays( ctx, ~0 );
 615
 616    /* Still using the D3D based hardware-rasterizer from the radeon;
 617     * need to put the card into D3D mode to make it work:
 618     */
 619    R200_STATECHANGE( rmesa, vap );
 620    rmesa->hw.vap.cmd[VAP_SE_VAP_CNTL] &= ~(R200_VAP_TCL_ENABLE|R200_VAP_PROG_VTX_SHADER_ENABLE);
 621 }
 622
 623 static void transition_to_hwtnl( struct gl_context *ctx )
 624 {
 625    r200ContextPtr rmesa = R200_CONTEXT(ctx);
 626    TNLcontext *tnl = TNL_CONTEXT(ctx);
 627
 628    _tnl_need_projected_coords( ctx, GL_FALSE );
 629
 630    r200UpdateMaterial( ctx );
 631
 632    tnl->Driver.NotifyMaterialChange = r200UpdateMaterial;
 633
 634    if ( rmesa->radeon.dma.flush )
 635       rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
 636
 637    rmesa->radeon.dma.flush = NULL;
 638
 639    R200_STATECHANGE( rmesa, vap );
 640    rmesa->hw.vap.cmd[VAP_SE_VAP_CNTL] |= R200_VAP_TCL_ENABLE;
 641    rmesa->hw.vap.cmd[VAP_SE_VAP_CNTL] &= ~R200_VAP_FORCE_W_TO_ONE;
 642
 643    if (ctx->VertexProgram._Enabled) {
 644       rmesa->hw.vap.cmd[VAP_SE_VAP_CNTL] |= R200_VAP_PROG_VTX_SHADER_ENABLE;
 645    }
 646
 647    if ( ((rmesa->hw.ctx.cmd[CTX_PP_FOG_COLOR] & R200_FOG_USE_MASK)
 648       == R200_FOG_USE_SPEC_ALPHA) &&
 649       (ctx->Fog.FogCoordinateSource == GL_FOG_COORD )) {
 650       R200_STATECHANGE( rmesa, ctx );
 651       rmesa->hw.ctx.cmd[CTX_PP_FOG_COLOR] &= ~R200_FOG_USE_MASK;
 652       rmesa->hw.ctx.cmd[CTX_PP_FOG_COLOR] |= R200_FOG_USE_VTX_FOG;
 653    }
 654
 655    R200_STATECHANGE( rmesa, vte );
 656    rmesa->hw.vte.cmd[VTE_SE_VTE_CNTL] &= ~(R200_VTX_XY_FMT|R200_VTX_Z_FMT);
 657    rmesa->hw.vte.cmd[VTE_SE_VTE_CNTL] |= R200_VTX_W0_FMT;
 658
 659    if (R200_DEBUG & RADEON_FALLBACKS)
 660       fprintf(stderr, "R200 end tcl fallback\n");
 661 }
 662
 663
 664 static char *fallbackStrings[] = {
 665    "Rasterization fallback",
 666    "Unfilled triangles",
 667    "Twosided lighting, differing materials",
 668    "Materials in VB (maybe between begin/end)",
 669    "Texgen unit 0",
 670    "Texgen unit 1",
 671    "Texgen unit 2",
 672    "Texgen unit 3",
 673    "Texgen unit 4",
 674    "Texgen unit 5",
 675    "User disable",
 676    "Bitmap as points",
 677    "Vertex program"
 678 };
 679
 680
 681 static char *getFallbackString(GLuint bit)
 682 {
 683    int i = 0;
 684    while (bit > 1) {
 685       i++;
 686       bit >>= 1;
 687    }
 688    return fallbackStrings[i];
 689 }
 690
 691
 692
 693 void r200TclFallback( struct gl_context *ctx, GLuint bit, GLboolean mode )
 694 {
 695         r200ContextPtr rmesa = R200_CONTEXT(ctx);
 696         GLuint oldfallback = rmesa->radeon.TclFallback;
 697
 698         if (mode) {
 699                 if (oldfallback == 0) {
 700                         /* We have to flush before transition */
 701                         if ( rmesa->radeon.dma.flush )
 702                                 rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
 703
 704                         if (R200_DEBUG & RADEON_FALLBACKS)
 705                                 fprintf(stderr, "R200 begin tcl fallback %s\n",
 706                                                 getFallbackString( bit ));
 707                         rmesa->radeon.TclFallback |= bit;
 708                         transition_to_swtnl( ctx );
 709                 } else
 710                         rmesa->radeon.TclFallback |= bit;
 711         } else {
 712                 if (oldfallback == bit) {
 713                         /* We have to flush before transition */
 714                         if ( rmesa->radeon.dma.flush )
 715                                 rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
 716
 717                         if (R200_DEBUG & RADEON_FALLBACKS)
 718                                 fprintf(stderr, "R200 end tcl fallback %s\n",
 719                                                 getFallbackString( bit ));
 720                         rmesa->radeon.TclFallback &= ~bit;
 721                         transition_to_hwtnl( ctx );
 722                 } else
 723                         rmesa->radeon.TclFallback &= ~bit;
 724         }
 725 }