Merge branch 'outputswritten64'
[mesa.git] / src / mesa / drivers / dri / r200 / r200_tcl.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
3
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /*
31 * Authors:
32 * Keith Whitwell <keith@tungstengraphics.com>
33 */
34
35 #include "main/glheader.h"
36 #include "main/imports.h"
37 #include "main/mtypes.h"
38 #include "main/enums.h"
39 #include "main/colormac.h"
40 #include "main/light.h"
41
42 #include "vbo/vbo.h"
43 #include "tnl/tnl.h"
44 #include "tnl/t_pipeline.h"
45
46 #include "r200_context.h"
47 #include "r200_state.h"
48 #include "r200_ioctl.h"
49 #include "r200_tex.h"
50 #include "r200_tcl.h"
51 #include "r200_swtcl.h"
52 #include "r200_maos.h"
53
54 #include "radeon_common_context.h"
55
56
57
58 #define HAVE_POINTS 1
59 #define HAVE_LINES 1
60 #define HAVE_LINE_LOOP 0
61 #define HAVE_LINE_STRIPS 1
62 #define HAVE_TRIANGLES 1
63 #define HAVE_TRI_STRIPS 1
64 #define HAVE_TRI_STRIP_1 0
65 #define HAVE_TRI_FANS 1
66 #define HAVE_QUADS 1
67 #define HAVE_QUAD_STRIPS 1
68 #define HAVE_POLYGONS 1
69 #define HAVE_ELTS 1
70
71
72 #define HW_POINTS ((ctx->Point.PointSprite || \
73 ((ctx->_TriangleCaps & (DD_POINT_SIZE | DD_POINT_ATTEN)) && \
74 !(ctx->_TriangleCaps & (DD_POINT_SMOOTH)))) ? \
75 R200_VF_PRIM_POINT_SPRITES : R200_VF_PRIM_POINTS)
76 #define HW_LINES R200_VF_PRIM_LINES
77 #define HW_LINE_LOOP 0
78 #define HW_LINE_STRIP R200_VF_PRIM_LINE_STRIP
79 #define HW_TRIANGLES R200_VF_PRIM_TRIANGLES
80 #define HW_TRIANGLE_STRIP_0 R200_VF_PRIM_TRIANGLE_STRIP
81 #define HW_TRIANGLE_STRIP_1 0
82 #define HW_TRIANGLE_FAN R200_VF_PRIM_TRIANGLE_FAN
83 #define HW_QUADS R200_VF_PRIM_QUADS
84 #define HW_QUAD_STRIP R200_VF_PRIM_QUAD_STRIP
85 #define HW_POLYGON R200_VF_PRIM_POLYGON
86
87
88 static GLboolean discrete_prim[0x10] = {
89 0, /* 0 none */
90 1, /* 1 points */
91 1, /* 2 lines */
92 0, /* 3 line_strip */
93 1, /* 4 tri_list */
94 0, /* 5 tri_fan */
95 0, /* 6 tri_strip */
96 0, /* 7 tri_w_flags */
97 1, /* 8 rect list (unused) */
98 1, /* 9 3vert point */
99 1, /* a 3vert line */
100 0, /* b point sprite */
101 0, /* c line loop */
102 1, /* d quads */
103 0, /* e quad strip */
104 0, /* f polygon */
105 };
106
107
108 #define LOCAL_VARS r200ContextPtr rmesa = R200_CONTEXT(ctx)
109 #define ELT_TYPE GLushort
110
111 #define ELT_INIT(prim, hw_prim) \
112 r200TclPrimitive( ctx, prim, hw_prim | R200_VF_PRIM_WALK_IND )
113
114 #define GET_MESA_ELTS() TNL_CONTEXT(ctx)->vb.Elts
115
116
117 /* Don't really know how many elts will fit in what's left of cmdbuf,
118 * as there is state to emit, etc:
119 */
120
121 /* Testing on isosurf shows a maximum around here. Don't know if it's
122 * the card or driver or kernel module that is causing the behaviour.
123 */
124 #define GET_MAX_HW_ELTS() 300
125
126 #define RESET_STIPPLE() do { \
127 R200_STATECHANGE( rmesa, lin ); \
128 radeonEmitState(&rmesa->radeon); \
129 } while (0)
130
131 #define AUTO_STIPPLE( mode ) do { \
132 R200_STATECHANGE( rmesa, lin ); \
133 if (mode) \
134 rmesa->hw.lin.cmd[LIN_RE_LINE_PATTERN] |= \
135 R200_LINE_PATTERN_AUTO_RESET; \
136 else \
137 rmesa->hw.lin.cmd[LIN_RE_LINE_PATTERN] &= \
138 ~R200_LINE_PATTERN_AUTO_RESET; \
139 radeonEmitState(&rmesa->radeon); \
140 } while (0)
141
142
143 #define ALLOC_ELTS(nr) r200AllocElts( rmesa, nr )
144
145 static GLushort *r200AllocElts( r200ContextPtr rmesa, GLuint nr )
146 {
147 if (rmesa->radeon.dma.flush == r200FlushElts &&
148 rmesa->tcl.elt_used + nr*2 < R200_ELT_BUF_SZ) {
149
150 GLushort *dest = (GLushort *)(rmesa->radeon.tcl.elt_dma_bo->ptr +
151 rmesa->radeon.tcl.elt_dma_offset + rmesa->tcl.elt_used);
152
153 rmesa->tcl.elt_used += nr*2;
154
155 return dest;
156 }
157 else {
158 if (rmesa->radeon.dma.flush)
159 rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
160
161 r200EmitAOS( rmesa,
162 rmesa->radeon.tcl.aos_count, 0 );
163
164 r200EmitMaxVtxIndex(rmesa, rmesa->radeon.tcl.aos[0].count);
165 return r200AllocEltsOpenEnded( rmesa, rmesa->tcl.hw_primitive, nr );
166 }
167 }
168
169
170 #define CLOSE_ELTS() \
171 do { \
172 if (0) R200_NEWPRIM( rmesa ); \
173 } \
174 while (0)
175
176
177 /* TODO: Try to extend existing primitive if both are identical,
178 * discrete and there are no intervening state changes. (Somewhat
179 * duplicates changes to DrawArrays code)
180 */
181 static void r200EmitPrim( GLcontext *ctx,
182 GLenum prim,
183 GLuint hwprim,
184 GLuint start,
185 GLuint count)
186 {
187 r200ContextPtr rmesa = R200_CONTEXT( ctx );
188 r200TclPrimitive( ctx, prim, hwprim );
189
190 // fprintf(stderr,"Emit prim %d\n", rmesa->radeon.tcl.aos_count);
191
192 r200EmitAOS( rmesa,
193 rmesa->radeon.tcl.aos_count,
194 start );
195
196 /* Why couldn't this packet have taken an offset param?
197 */
198 r200EmitVbufPrim( rmesa,
199 rmesa->tcl.hw_primitive,
200 count - start );
201 }
202
203 #define EMIT_PRIM(ctx, prim, hwprim, start, count) do { \
204 r200EmitPrim( ctx, prim, hwprim, start, count ); \
205 (void) rmesa; } while (0)
206
207 #define MAX_CONVERSION_SIZE 40
208 /* Try & join small primitives
209 */
210 #if 0
211 #define PREFER_DISCRETE_ELT_PRIM( NR, PRIM ) 0
212 #else
213 #define PREFER_DISCRETE_ELT_PRIM( NR, PRIM ) \
214 ((NR) < 20 || \
215 ((NR) < 40 && \
216 rmesa->tcl.hw_primitive == (PRIM| \
217 R200_VF_TCL_OUTPUT_VTX_ENABLE| \
218 R200_VF_PRIM_WALK_IND)))
219 #endif
220
221 #ifdef MESA_BIG_ENDIAN
222 /* We could do without (most of) this ugliness if dest was always 32 bit word aligned... */
223 #define EMIT_ELT(dest, offset, x) do { \
224 int off = offset + ( ( (GLuint)dest & 0x2 ) >> 1 ); \
225 GLushort *des = (GLushort *)( (GLuint)dest & ~0x2 ); \
226 (des)[ off + 1 - 2 * ( off & 1 ) ] = (GLushort)(x); \
227 (void)rmesa; } while (0)
228 #else
229 #define EMIT_ELT(dest, offset, x) do { \
230 (dest)[offset] = (GLushort) (x); \
231 (void)rmesa; } while (0)
232 #endif
233
234 #define EMIT_TWO_ELTS(dest, offset, x, y) *(GLuint *)((dest)+offset) = ((y)<<16)|(x);
235
236
237
238 #define TAG(x) tcl_##x
239 #include "tnl_dd/t_dd_dmatmp2.h"
240
241 /**********************************************************************/
242 /* External entrypoints */
243 /**********************************************************************/
244
245 void r200EmitPrimitive( GLcontext *ctx,
246 GLuint first,
247 GLuint last,
248 GLuint flags )
249 {
250 tcl_render_tab_verts[flags&PRIM_MODE_MASK]( ctx, first, last, flags );
251 }
252
253 void r200EmitEltPrimitive( GLcontext *ctx,
254 GLuint first,
255 GLuint last,
256 GLuint flags )
257 {
258 tcl_render_tab_elts[flags&PRIM_MODE_MASK]( ctx, first, last, flags );
259 }
260
261 void r200TclPrimitive( GLcontext *ctx,
262 GLenum prim,
263 int hw_prim )
264 {
265 r200ContextPtr rmesa = R200_CONTEXT(ctx);
266 GLuint newprim = hw_prim | R200_VF_TCL_OUTPUT_VTX_ENABLE;
267
268 if (newprim != rmesa->tcl.hw_primitive ||
269 !discrete_prim[hw_prim&0xf]) {
270 /* need to disable perspective-correct texturing for point sprites */
271 if ((prim & PRIM_MODE_MASK) == GL_POINTS && ctx->Point.PointSprite) {
272 if (rmesa->hw.set.cmd[SET_RE_CNTL] & R200_PERSPECTIVE_ENABLE) {
273 R200_STATECHANGE( rmesa, set );
274 rmesa->hw.set.cmd[SET_RE_CNTL] &= ~R200_PERSPECTIVE_ENABLE;
275 }
276 }
277 else if (!(rmesa->hw.set.cmd[SET_RE_CNTL] & R200_PERSPECTIVE_ENABLE)) {
278 R200_STATECHANGE( rmesa, set );
279 rmesa->hw.set.cmd[SET_RE_CNTL] |= R200_PERSPECTIVE_ENABLE;
280 }
281 R200_NEWPRIM( rmesa );
282 rmesa->tcl.hw_primitive = newprim;
283 }
284 }
285
286
287 /**********************************************************************/
288 /* Fog blend factor computation for hw tcl */
289 /* same calculation used as in t_vb_fog.c */
290 /**********************************************************************/
291
292 #define FOG_EXP_TABLE_SIZE 256
293 #define FOG_MAX (10.0)
294 #define EXP_FOG_MAX .0006595
295 #define FOG_INCR (FOG_MAX/FOG_EXP_TABLE_SIZE)
296 static GLfloat exp_table[FOG_EXP_TABLE_SIZE];
297
298 #if 1
299 #define NEG_EXP( result, narg ) \
300 do { \
301 GLfloat f = (GLfloat) (narg * (1.0/FOG_INCR)); \
302 GLint k = (GLint) f; \
303 if (k > FOG_EXP_TABLE_SIZE-2) \
304 result = (GLfloat) EXP_FOG_MAX; \
305 else \
306 result = exp_table[k] + (f-k)*(exp_table[k+1]-exp_table[k]); \
307 } while (0)
308 #else
309 #define NEG_EXP( result, narg ) \
310 do { \
311 result = exp(-narg); \
312 } while (0)
313 #endif
314
315
316 /**
317 * Initialize the exp_table[] lookup table for approximating exp().
318 */
319 void
320 r200InitStaticFogData( void )
321 {
322 GLfloat f = 0.0F;
323 GLint i = 0;
324 for ( ; i < FOG_EXP_TABLE_SIZE ; i++, f += FOG_INCR) {
325 exp_table[i] = (GLfloat) exp(-f);
326 }
327 }
328
329
330 /**
331 * Compute per-vertex fog blend factors from fog coordinates by
332 * evaluating the GL_LINEAR, GL_EXP or GL_EXP2 fog function.
333 * Fog coordinates are distances from the eye (typically between the
334 * near and far clip plane distances).
335 * Note the fog (eye Z) coords may be negative so we use ABS(z) below.
336 * Fog blend factors are in the range [0,1].
337 */
338 float
339 r200ComputeFogBlendFactor( GLcontext *ctx, GLfloat fogcoord )
340 {
341 GLfloat end = ctx->Fog.End;
342 GLfloat d, temp;
343 const GLfloat z = FABSF(fogcoord);
344
345 switch (ctx->Fog.Mode) {
346 case GL_LINEAR:
347 if (ctx->Fog.Start == ctx->Fog.End)
348 d = 1.0F;
349 else
350 d = 1.0F / (ctx->Fog.End - ctx->Fog.Start);
351 temp = (end - z) * d;
352 return CLAMP(temp, 0.0F, 1.0F);
353 break;
354 case GL_EXP:
355 d = ctx->Fog.Density;
356 NEG_EXP( temp, d * z );
357 return temp;
358 break;
359 case GL_EXP2:
360 d = ctx->Fog.Density*ctx->Fog.Density;
361 NEG_EXP( temp, d * z * z );
362 return temp;
363 break;
364 default:
365 _mesa_problem(ctx, "Bad fog mode in make_fog_coord");
366 return 0;
367 }
368 }
369
370 /**
371 * Predict total emit size for next rendering operation so there is no flush in middle of rendering
372 * Prediction has to aim towards the best possible value that is worse than worst case scenario
373 */
374 static GLuint r200EnsureEmitSize( GLcontext * ctx , GLubyte* vimap_rev )
375 {
376 r200ContextPtr rmesa = R200_CONTEXT(ctx);
377 TNLcontext *tnl = TNL_CONTEXT(ctx);
378 struct vertex_buffer *VB = &tnl->vb;
379 GLuint space_required;
380 GLuint state_size;
381 GLuint nr_aos = 0;
382 int i;
383 /* predict number of aos to emit */
384 for (i = 0; i < 15; ++i)
385 {
386 if (vimap_rev[i] != 255)
387 {
388 ++nr_aos;
389 }
390 }
391
392 {
393 /* count the prediction for state size */
394 space_required = 0;
395 state_size = radeonCountStateEmitSize( &rmesa->radeon );
396 /* vtx may be changed in r200EmitArrays so account for it if not dirty */
397 if (!rmesa->hw.vtx.dirty)
398 state_size += rmesa->hw.vtx.check(rmesa->radeon.glCtx, &rmesa->hw.vtx);
399 /* predict size for elements */
400 for (i = 0; i < VB->PrimitiveCount; ++i)
401 {
402 if (!VB->Primitive[i].count)
403 continue;
404 /* If primitive.count is less than MAX_CONVERSION_SIZE
405 rendering code may decide convert to elts.
406 In that case we have to make pessimistic prediction.
407 and use larger of 2 paths. */
408 const GLuint elts = ELTS_BUFSZ(nr_aos);
409 const GLuint index = INDEX_BUFSZ;
410 const GLuint vbuf = VBUF_BUFSZ;
411 if ( (!VB->Elts && VB->Primitive[i].count >= MAX_CONVERSION_SIZE)
412 || vbuf > index + elts)
413 space_required += vbuf;
414 else
415 space_required += index + elts;
416 space_required += AOS_BUFSZ(nr_aos);
417 }
418 }
419
420 radeon_print(RADEON_RENDER,RADEON_VERBOSE,
421 "%s space %u, aos %d\n",
422 __func__, space_required, AOS_BUFSZ(nr_aos) );
423 /* flush the buffer in case we need more than is left. */
424 if (rcommonEnsureCmdBufSpace(&rmesa->radeon, space_required + state_size, __FUNCTION__))
425 return space_required + radeonCountStateEmitSize( &rmesa->radeon );
426 else
427 return space_required + state_size;
428 }
429
430
431 /**********************************************************************/
432 /* Render pipeline stage */
433 /**********************************************************************/
434
435
436 /* TCL render.
437 */
438 static GLboolean r200_run_tcl_render( GLcontext *ctx,
439 struct tnl_pipeline_stage *stage )
440 {
441 r200ContextPtr rmesa = R200_CONTEXT(ctx);
442 TNLcontext *tnl = TNL_CONTEXT(ctx);
443 struct vertex_buffer *VB = &tnl->vb;
444 GLuint i;
445 GLubyte *vimap_rev;
446 /* use hw fixed order for simplicity, pos 0, weight 1, normal 2, fog 3,
447 color0 - color3 4-7, texcoord0 - texcoord5 8-13, pos 1 14. Must not use
448 more than 12 of those at the same time. */
449 GLubyte map_rev_fixed[15] = {255, 255, 255, 255, 255, 255, 255, 255,
450 255, 255, 255, 255, 255, 255, 255};
451
452
453 /* TODO: separate this from the swtnl pipeline
454 */
455 if (rmesa->radeon.TclFallback)
456 return GL_TRUE; /* fallback to software t&l */
457
458 radeon_print(RADEON_RENDER, RADEON_NORMAL, "%s\n", __FUNCTION__);
459
460 if (VB->Count == 0)
461 return GL_FALSE;
462
463 /* Validate state:
464 */
465 if (rmesa->radeon.NewGLState)
466 if (!r200ValidateState( ctx ))
467 return GL_TRUE; /* fallback to sw t&l */
468
469 if (!ctx->VertexProgram._Enabled) {
470 /* NOTE: inputs != tnl->render_inputs - these are the untransformed
471 * inputs.
472 */
473 map_rev_fixed[0] = VERT_ATTRIB_POS;
474 /* technically there is no reason we always need VA_COLOR0. In theory
475 could disable it depending on lighting, color materials, texturing... */
476 map_rev_fixed[4] = VERT_ATTRIB_COLOR0;
477
478 if (ctx->Light.Enabled) {
479 map_rev_fixed[2] = VERT_ATTRIB_NORMAL;
480 }
481
482 /* this also enables VA_COLOR1 when using separate specular
483 lighting model, which is unnecessary.
484 FIXME: OTOH, we're missing the case where a ATI_fragment_shader accesses
485 the secondary color (if lighting is disabled). The chip seems
486 misconfigured for that though elsewhere (tcl output, might lock up) */
487 if (ctx->_TriangleCaps & DD_SEPARATE_SPECULAR) {
488 map_rev_fixed[5] = VERT_ATTRIB_COLOR1;
489 }
490
491 if ( (ctx->Fog.FogCoordinateSource == GL_FOG_COORD) && ctx->Fog.Enabled ) {
492 map_rev_fixed[3] = VERT_ATTRIB_FOG;
493 }
494
495 for (i = 0 ; i < ctx->Const.MaxTextureUnits; i++) {
496 if (ctx->Texture.Unit[i]._ReallyEnabled) {
497 if (rmesa->TexGenNeedNormals[i]) {
498 map_rev_fixed[2] = VERT_ATTRIB_NORMAL;
499 }
500 map_rev_fixed[8 + i] = VERT_ATTRIB_TEX0 + i;
501 }
502 }
503 vimap_rev = &map_rev_fixed[0];
504 }
505 else {
506 /* vtx_tcl_output_vtxfmt_0/1 need to match configuration of "fragment
507 part", since using some vertex interpolator later which is not in
508 out_vtxfmt0/1 will lock up. It seems to be ok to write in vertex
509 prog to a not enabled output however, so just don't mess with it.
510 We only need to change compsel. */
511 GLuint out_compsel = 0;
512 const GLbitfield64 vp_out =
513 rmesa->curr_vp_hw->mesa_program.Base.OutputsWritten;
514
515 vimap_rev = &rmesa->curr_vp_hw->inputmap_rev[0];
516 assert(vp_out & BITFIELD64_BIT(VERT_RESULT_HPOS));
517 out_compsel = R200_OUTPUT_XYZW;
518 if (vp_out & BITFIELD64_BIT(VERT_RESULT_COL0)) {
519 out_compsel |= R200_OUTPUT_COLOR_0;
520 }
521 if (vp_out & BITFIELD64_BIT(VERT_RESULT_COL1)) {
522 out_compsel |= R200_OUTPUT_COLOR_1;
523 }
524 if (vp_out & BITFIELD64_BIT(VERT_RESULT_FOGC)) {
525 out_compsel |= R200_OUTPUT_DISCRETE_FOG;
526 }
527 if (vp_out & BITFIELD64_BIT(VERT_RESULT_PSIZ)) {
528 out_compsel |= R200_OUTPUT_PT_SIZE;
529 }
530 for (i = VERT_RESULT_TEX0; i < VERT_RESULT_TEX6; i++) {
531 if (vp_out & BITFIELD64_BIT(i)) {
532 out_compsel |= R200_OUTPUT_TEX_0 << (i - VERT_RESULT_TEX0);
533 }
534 }
535 if (rmesa->hw.vtx.cmd[VTX_TCL_OUTPUT_COMPSEL] != out_compsel) {
536 R200_STATECHANGE( rmesa, vtx );
537 rmesa->hw.vtx.cmd[VTX_TCL_OUTPUT_COMPSEL] = out_compsel;
538 }
539 }
540
541 /* Do the actual work:
542 */
543 radeonReleaseArrays( ctx, ~0 /* stage->changed_inputs */ );
544 GLuint emit_end = r200EnsureEmitSize( ctx, vimap_rev )
545 + rmesa->radeon.cmdbuf.cs->cdw;
546 r200EmitArrays( ctx, vimap_rev );
547
548 for (i = 0 ; i < VB->PrimitiveCount ; i++)
549 {
550 GLuint prim = _tnl_translate_prim(&VB->Primitive[i]);
551 GLuint start = VB->Primitive[i].start;
552 GLuint length = VB->Primitive[i].count;
553
554 if (!length)
555 continue;
556
557 if (VB->Elts)
558 r200EmitEltPrimitive( ctx, start, start+length, prim );
559 else
560 r200EmitPrimitive( ctx, start, start+length, prim );
561 }
562 if ( emit_end < rmesa->radeon.cmdbuf.cs->cdw )
563 WARN_ONCE("Rendering was %d commands larger than predicted size."
564 " We might overflow command buffer.\n", rmesa->radeon.cmdbuf.cs->cdw - emit_end);
565
566 return GL_FALSE; /* finished the pipe */
567 }
568
569
570
571 /* Initial state for tcl stage.
572 */
573 const struct tnl_pipeline_stage _r200_tcl_stage =
574 {
575 "r200 render",
576 NULL, /* private */
577 NULL,
578 NULL,
579 NULL,
580 r200_run_tcl_render /* run */
581 };
582
583
584
585 /**********************************************************************/
586 /* Validate state at pipeline start */
587 /**********************************************************************/
588
589
590 /*-----------------------------------------------------------------------
591 * Manage TCL fallbacks
592 */
593
594
595 static void transition_to_swtnl( GLcontext *ctx )
596 {
597 r200ContextPtr rmesa = R200_CONTEXT(ctx);
598 TNLcontext *tnl = TNL_CONTEXT(ctx);
599
600 R200_NEWPRIM( rmesa );
601
602 r200ChooseVertexState( ctx );
603 r200ChooseRenderState( ctx );
604
605 _mesa_validate_all_lighting_tables( ctx );
606
607 tnl->Driver.NotifyMaterialChange =
608 _mesa_validate_all_lighting_tables;
609
610 radeonReleaseArrays( ctx, ~0 );
611
612 /* Still using the D3D based hardware-rasterizer from the radeon;
613 * need to put the card into D3D mode to make it work:
614 */
615 R200_STATECHANGE( rmesa, vap );
616 rmesa->hw.vap.cmd[VAP_SE_VAP_CNTL] &= ~(R200_VAP_TCL_ENABLE|R200_VAP_PROG_VTX_SHADER_ENABLE);
617 }
618
619 static void transition_to_hwtnl( GLcontext *ctx )
620 {
621 r200ContextPtr rmesa = R200_CONTEXT(ctx);
622 TNLcontext *tnl = TNL_CONTEXT(ctx);
623
624 _tnl_need_projected_coords( ctx, GL_FALSE );
625
626 r200UpdateMaterial( ctx );
627
628 tnl->Driver.NotifyMaterialChange = r200UpdateMaterial;
629
630 if ( rmesa->radeon.dma.flush )
631 rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
632
633 rmesa->radeon.dma.flush = NULL;
634
635 R200_STATECHANGE( rmesa, vap );
636 rmesa->hw.vap.cmd[VAP_SE_VAP_CNTL] |= R200_VAP_TCL_ENABLE;
637 rmesa->hw.vap.cmd[VAP_SE_VAP_CNTL] &= ~R200_VAP_FORCE_W_TO_ONE;
638
639 if (ctx->VertexProgram._Enabled) {
640 rmesa->hw.vap.cmd[VAP_SE_VAP_CNTL] |= R200_VAP_PROG_VTX_SHADER_ENABLE;
641 }
642
643 if ( ((rmesa->hw.ctx.cmd[CTX_PP_FOG_COLOR] & R200_FOG_USE_MASK)
644 == R200_FOG_USE_SPEC_ALPHA) &&
645 (ctx->Fog.FogCoordinateSource == GL_FOG_COORD )) {
646 R200_STATECHANGE( rmesa, ctx );
647 rmesa->hw.ctx.cmd[CTX_PP_FOG_COLOR] &= ~R200_FOG_USE_MASK;
648 rmesa->hw.ctx.cmd[CTX_PP_FOG_COLOR] |= R200_FOG_USE_VTX_FOG;
649 }
650
651 R200_STATECHANGE( rmesa, vte );
652 rmesa->hw.vte.cmd[VTE_SE_VTE_CNTL] &= ~(R200_VTX_XY_FMT|R200_VTX_Z_FMT);
653 rmesa->hw.vte.cmd[VTE_SE_VTE_CNTL] |= R200_VTX_W0_FMT;
654
655 if (R200_DEBUG & RADEON_FALLBACKS)
656 fprintf(stderr, "R200 end tcl fallback\n");
657 }
658
659
660 static char *fallbackStrings[] = {
661 "Rasterization fallback",
662 "Unfilled triangles",
663 "Twosided lighting, differing materials",
664 "Materials in VB (maybe between begin/end)",
665 "Texgen unit 0",
666 "Texgen unit 1",
667 "Texgen unit 2",
668 "Texgen unit 3",
669 "Texgen unit 4",
670 "Texgen unit 5",
671 "User disable",
672 "Bitmap as points",
673 "Vertex program"
674 };
675
676
677 static char *getFallbackString(GLuint bit)
678 {
679 int i = 0;
680 while (bit > 1) {
681 i++;
682 bit >>= 1;
683 }
684 return fallbackStrings[i];
685 }
686
687
688
689 void r200TclFallback( GLcontext *ctx, GLuint bit, GLboolean mode )
690 {
691 r200ContextPtr rmesa = R200_CONTEXT(ctx);
692 GLuint oldfallback = rmesa->radeon.TclFallback;
693
694 if (mode) {
695 rmesa->radeon.TclFallback |= bit;
696 if (oldfallback == 0) {
697 if (R200_DEBUG & RADEON_FALLBACKS)
698 fprintf(stderr, "R200 begin tcl fallback %s\n",
699 getFallbackString( bit ));
700 transition_to_swtnl( ctx );
701 }
702 }
703 else {
704 rmesa->radeon.TclFallback &= ~bit;
705 if (oldfallback == bit) {
706 if (R200_DEBUG & RADEON_FALLBACKS)
707 fprintf(stderr, "R200 end tcl fallback %s\n",
708 getFallbackString( bit ));
709 transition_to_hwtnl( ctx );
710 }
711 }
712 }