i965: Move device info initialization to common code
[mesa.git] / src / mesa / drivers / dri / r200 / r200_tex.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
3
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 */
28
29 /*
30 * Authors:
31 * Keith Whitwell <keithw@vmware.com>
32 */
33
34 #include "main/glheader.h"
35 #include "main/imports.h"
36 #include "main/context.h"
37 #include "main/enums.h"
38 #include "main/image.h"
39 #include "main/teximage.h"
40 #include "main/texobj.h"
41 #include "main/samplerobj.h"
42
43 #include "radeon_mipmap_tree.h"
44 #include "r200_context.h"
45 #include "r200_ioctl.h"
46 #include "r200_tex.h"
47
48 #include "util/xmlpool.h"
49
50
51
52 /**
53 * Set the texture wrap modes.
54 *
55 * \param t Texture object whose wrap modes are to be set
56 * \param swrap Wrap mode for the \a s texture coordinate
57 * \param twrap Wrap mode for the \a t texture coordinate
58 */
59
60 static void r200SetTexWrap( radeonTexObjPtr t, GLenum swrap, GLenum twrap, GLenum rwrap )
61 {
62 GLboolean is_clamp = GL_FALSE;
63 GLboolean is_clamp_to_border = GL_FALSE;
64 struct gl_texture_object *tObj = &t->base;
65
66 radeon_print(RADEON_TEXTURE, RADEON_TRACE,
67 "%s(tex %p) sw %s, tw %s, rw %s\n",
68 __func__, t,
69 _mesa_enum_to_string(swrap),
70 _mesa_enum_to_string(twrap),
71 _mesa_enum_to_string(rwrap));
72
73 t->pp_txfilter &= ~(R200_CLAMP_S_MASK | R200_CLAMP_T_MASK | R200_BORDER_MODE_D3D);
74
75 switch ( swrap ) {
76 case GL_REPEAT:
77 t->pp_txfilter |= R200_CLAMP_S_WRAP;
78 break;
79 case GL_CLAMP:
80 t->pp_txfilter |= R200_CLAMP_S_CLAMP_GL;
81 is_clamp = GL_TRUE;
82 break;
83 case GL_CLAMP_TO_EDGE:
84 t->pp_txfilter |= R200_CLAMP_S_CLAMP_LAST;
85 break;
86 case GL_CLAMP_TO_BORDER:
87 t->pp_txfilter |= R200_CLAMP_S_CLAMP_GL;
88 is_clamp_to_border = GL_TRUE;
89 break;
90 case GL_MIRRORED_REPEAT:
91 t->pp_txfilter |= R200_CLAMP_S_MIRROR;
92 break;
93 case GL_MIRROR_CLAMP_EXT:
94 t->pp_txfilter |= R200_CLAMP_S_MIRROR_CLAMP_GL;
95 is_clamp = GL_TRUE;
96 break;
97 case GL_MIRROR_CLAMP_TO_EDGE_EXT:
98 t->pp_txfilter |= R200_CLAMP_S_MIRROR_CLAMP_LAST;
99 break;
100 case GL_MIRROR_CLAMP_TO_BORDER_EXT:
101 t->pp_txfilter |= R200_CLAMP_S_MIRROR_CLAMP_GL;
102 is_clamp_to_border = GL_TRUE;
103 break;
104 default:
105 _mesa_problem(NULL, "bad S wrap mode in %s", __func__);
106 }
107
108 if (tObj->Target != GL_TEXTURE_1D) {
109 switch ( twrap ) {
110 case GL_REPEAT:
111 t->pp_txfilter |= R200_CLAMP_T_WRAP;
112 break;
113 case GL_CLAMP:
114 t->pp_txfilter |= R200_CLAMP_T_CLAMP_GL;
115 is_clamp = GL_TRUE;
116 break;
117 case GL_CLAMP_TO_EDGE:
118 t->pp_txfilter |= R200_CLAMP_T_CLAMP_LAST;
119 break;
120 case GL_CLAMP_TO_BORDER:
121 t->pp_txfilter |= R200_CLAMP_T_CLAMP_GL;
122 is_clamp_to_border = GL_TRUE;
123 break;
124 case GL_MIRRORED_REPEAT:
125 t->pp_txfilter |= R200_CLAMP_T_MIRROR;
126 break;
127 case GL_MIRROR_CLAMP_EXT:
128 t->pp_txfilter |= R200_CLAMP_T_MIRROR_CLAMP_GL;
129 is_clamp = GL_TRUE;
130 break;
131 case GL_MIRROR_CLAMP_TO_EDGE_EXT:
132 t->pp_txfilter |= R200_CLAMP_T_MIRROR_CLAMP_LAST;
133 break;
134 case GL_MIRROR_CLAMP_TO_BORDER_EXT:
135 t->pp_txfilter |= R200_CLAMP_T_MIRROR_CLAMP_GL;
136 is_clamp_to_border = GL_TRUE;
137 break;
138 default:
139 _mesa_problem(NULL, "bad T wrap mode in %s", __func__);
140 }
141 }
142
143 t->pp_txformat_x &= ~R200_CLAMP_Q_MASK;
144
145 switch ( rwrap ) {
146 case GL_REPEAT:
147 t->pp_txformat_x |= R200_CLAMP_Q_WRAP;
148 break;
149 case GL_CLAMP:
150 t->pp_txformat_x |= R200_CLAMP_Q_CLAMP_GL;
151 is_clamp = GL_TRUE;
152 break;
153 case GL_CLAMP_TO_EDGE:
154 t->pp_txformat_x |= R200_CLAMP_Q_CLAMP_LAST;
155 break;
156 case GL_CLAMP_TO_BORDER:
157 t->pp_txformat_x |= R200_CLAMP_Q_CLAMP_GL;
158 is_clamp_to_border = GL_TRUE;
159 break;
160 case GL_MIRRORED_REPEAT:
161 t->pp_txformat_x |= R200_CLAMP_Q_MIRROR;
162 break;
163 case GL_MIRROR_CLAMP_EXT:
164 t->pp_txformat_x |= R200_CLAMP_Q_MIRROR_CLAMP_GL;
165 is_clamp = GL_TRUE;
166 break;
167 case GL_MIRROR_CLAMP_TO_EDGE_EXT:
168 t->pp_txformat_x |= R200_CLAMP_Q_MIRROR_CLAMP_LAST;
169 break;
170 case GL_MIRROR_CLAMP_TO_BORDER_EXT:
171 t->pp_txformat_x |= R200_CLAMP_Q_MIRROR_CLAMP_GL;
172 is_clamp_to_border = GL_TRUE;
173 break;
174 default:
175 _mesa_problem(NULL, "bad R wrap mode in %s", __func__);
176 }
177
178 if ( is_clamp_to_border ) {
179 t->pp_txfilter |= R200_BORDER_MODE_D3D;
180 }
181
182 t->border_fallback = (is_clamp && is_clamp_to_border);
183 }
184
185 static void r200SetTexMaxAnisotropy( radeonTexObjPtr t, GLfloat max )
186 {
187 t->pp_txfilter &= ~R200_MAX_ANISO_MASK;
188 radeon_print(RADEON_TEXTURE, RADEON_TRACE,
189 "%s(tex %p) max %f.\n",
190 __func__, t, max);
191
192 if ( max <= 1.0 ) {
193 t->pp_txfilter |= R200_MAX_ANISO_1_TO_1;
194 } else if ( max <= 2.0 ) {
195 t->pp_txfilter |= R200_MAX_ANISO_2_TO_1;
196 } else if ( max <= 4.0 ) {
197 t->pp_txfilter |= R200_MAX_ANISO_4_TO_1;
198 } else if ( max <= 8.0 ) {
199 t->pp_txfilter |= R200_MAX_ANISO_8_TO_1;
200 } else {
201 t->pp_txfilter |= R200_MAX_ANISO_16_TO_1;
202 }
203 }
204
205 /**
206 * Set the texture magnification and minification modes.
207 *
208 * \param t Texture whose filter modes are to be set
209 * \param minf Texture minification mode
210 * \param magf Texture magnification mode
211 */
212
213 static void r200SetTexFilter( radeonTexObjPtr t, GLenum minf, GLenum magf )
214 {
215 GLuint anisotropy = (t->pp_txfilter & R200_MAX_ANISO_MASK);
216
217 /* Force revalidation to account for switches from/to mipmapping. */
218 t->validated = GL_FALSE;
219
220 t->pp_txfilter &= ~(R200_MIN_FILTER_MASK | R200_MAG_FILTER_MASK);
221 t->pp_txformat_x &= ~R200_VOLUME_FILTER_MASK;
222
223 radeon_print(RADEON_TEXTURE, RADEON_TRACE,
224 "%s(tex %p) minf %s, maxf %s, anisotropy %d.\n",
225 __func__, t,
226 _mesa_enum_to_string(minf),
227 _mesa_enum_to_string(magf),
228 anisotropy);
229
230 if ( anisotropy == R200_MAX_ANISO_1_TO_1 ) {
231 switch ( minf ) {
232 case GL_NEAREST:
233 t->pp_txfilter |= R200_MIN_FILTER_NEAREST;
234 break;
235 case GL_LINEAR:
236 t->pp_txfilter |= R200_MIN_FILTER_LINEAR;
237 break;
238 case GL_NEAREST_MIPMAP_NEAREST:
239 t->pp_txfilter |= R200_MIN_FILTER_NEAREST_MIP_NEAREST;
240 break;
241 case GL_NEAREST_MIPMAP_LINEAR:
242 t->pp_txfilter |= R200_MIN_FILTER_LINEAR_MIP_NEAREST;
243 break;
244 case GL_LINEAR_MIPMAP_NEAREST:
245 t->pp_txfilter |= R200_MIN_FILTER_NEAREST_MIP_LINEAR;
246 break;
247 case GL_LINEAR_MIPMAP_LINEAR:
248 t->pp_txfilter |= R200_MIN_FILTER_LINEAR_MIP_LINEAR;
249 break;
250 }
251 } else {
252 switch ( minf ) {
253 case GL_NEAREST:
254 t->pp_txfilter |= R200_MIN_FILTER_ANISO_NEAREST;
255 break;
256 case GL_LINEAR:
257 t->pp_txfilter |= R200_MIN_FILTER_ANISO_LINEAR;
258 break;
259 case GL_NEAREST_MIPMAP_NEAREST:
260 case GL_LINEAR_MIPMAP_NEAREST:
261 t->pp_txfilter |= R200_MIN_FILTER_ANISO_NEAREST_MIP_NEAREST;
262 break;
263 case GL_NEAREST_MIPMAP_LINEAR:
264 case GL_LINEAR_MIPMAP_LINEAR:
265 t->pp_txfilter |= R200_MIN_FILTER_ANISO_NEAREST_MIP_LINEAR;
266 break;
267 }
268 }
269
270 /* Note we don't have 3D mipmaps so only use the mag filter setting
271 * to set the 3D texture filter mode.
272 */
273 switch ( magf ) {
274 case GL_NEAREST:
275 t->pp_txfilter |= R200_MAG_FILTER_NEAREST;
276 t->pp_txformat_x |= R200_VOLUME_FILTER_NEAREST;
277 break;
278 case GL_LINEAR:
279 t->pp_txfilter |= R200_MAG_FILTER_LINEAR;
280 t->pp_txformat_x |= R200_VOLUME_FILTER_LINEAR;
281 break;
282 }
283 }
284
285 static void r200SetTexBorderColor( radeonTexObjPtr t, const GLfloat color[4] )
286 {
287 GLubyte c[4];
288 CLAMPED_FLOAT_TO_UBYTE(c[0], color[0]);
289 CLAMPED_FLOAT_TO_UBYTE(c[1], color[1]);
290 CLAMPED_FLOAT_TO_UBYTE(c[2], color[2]);
291 CLAMPED_FLOAT_TO_UBYTE(c[3], color[3]);
292 t->pp_border_color = radeonPackColor( 4, c[0], c[1], c[2], c[3] );
293 }
294
295 static void r200TexEnv( struct gl_context *ctx, GLenum target,
296 GLenum pname, const GLfloat *param )
297 {
298 r200ContextPtr rmesa = R200_CONTEXT(ctx);
299 GLuint unit = ctx->Texture.CurrentUnit;
300 struct gl_fixedfunc_texture_unit *texUnit =
301 &ctx->Texture.FixedFuncUnit[unit];
302
303 radeon_print(RADEON_TEXTURE | RADEON_STATE, RADEON_VERBOSE, "%s( %s )\n",
304 __func__, _mesa_enum_to_string( pname ) );
305
306 /* This is incorrect: Need to maintain this data for each of
307 * GL_TEXTURE_{123}D, GL_TEXTURE_RECTANGLE_NV, etc, and switch
308 * between them according to _Current->Target.
309 */
310 switch ( pname ) {
311 case GL_TEXTURE_ENV_COLOR: {
312 GLubyte c[4];
313 GLuint envColor;
314 _mesa_unclamped_float_rgba_to_ubyte(c, texUnit->EnvColor);
315 envColor = radeonPackColor( 4, c[0], c[1], c[2], c[3] );
316 if ( rmesa->hw.tf.cmd[TF_TFACTOR_0 + unit] != envColor ) {
317 R200_STATECHANGE( rmesa, tf );
318 rmesa->hw.tf.cmd[TF_TFACTOR_0 + unit] = envColor;
319 }
320 break;
321 }
322
323 case GL_TEXTURE_LOD_BIAS_EXT: {
324 GLfloat bias, min;
325 GLuint b;
326 const int fixed_one = R200_LOD_BIAS_FIXED_ONE;
327
328 /* The R200's LOD bias is a signed 2's complement value with a
329 * range of -16.0 <= bias < 16.0.
330 *
331 * NOTE: Add a small bias to the bias for conform mipsel.c test.
332 */
333 bias = *param;
334 min = driQueryOptionb (&rmesa->radeon.optionCache, "no_neg_lod_bias") ?
335 0.0 : -16.0;
336 bias = CLAMP( bias, min, 16.0 );
337 b = ((int)(bias * fixed_one)
338 + R200_LOD_BIAS_CORRECTION) & R200_LOD_BIAS_MASK;
339
340 if ( (rmesa->hw.tex[unit].cmd[TEX_PP_TXFORMAT_X] & R200_LOD_BIAS_MASK) != b ) {
341 R200_STATECHANGE( rmesa, tex[unit] );
342 rmesa->hw.tex[unit].cmd[TEX_PP_TXFORMAT_X] &= ~R200_LOD_BIAS_MASK;
343 rmesa->hw.tex[unit].cmd[TEX_PP_TXFORMAT_X] |= b;
344 }
345 break;
346 }
347 case GL_COORD_REPLACE_ARB:
348 if (ctx->Point.PointSprite) {
349 R200_STATECHANGE( rmesa, spr );
350 if ((GLenum)param[0]) {
351 rmesa->hw.spr.cmd[SPR_POINT_SPRITE_CNTL] |= R200_PS_GEN_TEX_0 << unit;
352 } else {
353 rmesa->hw.spr.cmd[SPR_POINT_SPRITE_CNTL] &= ~(R200_PS_GEN_TEX_0 << unit);
354 }
355 }
356 break;
357 default:
358 return;
359 }
360 }
361
362 void r200TexUpdateParameters(struct gl_context *ctx, GLuint unit)
363 {
364 struct gl_sampler_object *samp = _mesa_get_samplerobj(ctx, unit);
365 radeonTexObj* t = radeon_tex_obj(ctx->Texture.Unit[unit]._Current);
366
367 r200SetTexMaxAnisotropy(t , samp->MaxAnisotropy);
368 r200SetTexFilter(t, samp->MinFilter, samp->MagFilter);
369 r200SetTexWrap(t, samp->WrapS, samp->WrapT, samp->WrapR);
370 r200SetTexBorderColor(t, samp->BorderColor.f);
371 }
372
373 /**
374 * Changes variables and flags for a state update, which will happen at the
375 * next UpdateTextureState
376 */
377 static void r200TexParameter(struct gl_context *ctx,
378 struct gl_texture_object *texObj,
379 GLenum pname)
380 {
381 radeonTexObj* t = radeon_tex_obj(texObj);
382
383 radeon_print(RADEON_TEXTURE | RADEON_STATE, RADEON_VERBOSE,
384 "%s(%p, tex %p) pname %s\n",
385 __func__, ctx, texObj,
386 _mesa_enum_to_string( pname ) );
387
388 switch ( pname ) {
389 case GL_TEXTURE_MIN_FILTER:
390 case GL_TEXTURE_MAG_FILTER:
391 case GL_TEXTURE_MAX_ANISOTROPY_EXT:
392 case GL_TEXTURE_WRAP_S:
393 case GL_TEXTURE_WRAP_T:
394 case GL_TEXTURE_WRAP_R:
395 case GL_TEXTURE_BORDER_COLOR:
396 case GL_TEXTURE_BASE_LEVEL:
397 case GL_TEXTURE_MAX_LEVEL:
398 case GL_TEXTURE_MIN_LOD:
399 case GL_TEXTURE_MAX_LOD:
400 t->validated = GL_FALSE;
401 break;
402
403 default:
404 return;
405 }
406 }
407
408
409 static void r200DeleteTexture(struct gl_context * ctx, struct gl_texture_object *texObj)
410 {
411 r200ContextPtr rmesa = R200_CONTEXT(ctx);
412 radeonTexObj* t = radeon_tex_obj(texObj);
413
414 radeon_print(RADEON_TEXTURE | RADEON_STATE, RADEON_NORMAL,
415 "%s( %p (target = %s) )\n", __func__,
416 (void *)texObj,
417 _mesa_enum_to_string(texObj->Target));
418
419 if (rmesa) {
420 int i;
421 radeon_firevertices(&rmesa->radeon);
422 for ( i = 0 ; i < rmesa->radeon.glCtx.Const.MaxTextureUnits ; i++ ) {
423 if ( t == rmesa->state.texture.unit[i].texobj ) {
424 rmesa->state.texture.unit[i].texobj = NULL;
425 rmesa->hw.tex[i].dirty = GL_FALSE;
426 rmesa->hw.cube[i].dirty = GL_FALSE;
427 }
428 }
429 }
430
431 radeon_miptree_unreference(&t->mt);
432
433 _mesa_delete_texture_object(ctx, texObj);
434 }
435
436 /* Need:
437 * - Same GEN_MODE for all active bits
438 * - Same EyePlane/ObjPlane for all active bits when using Eye/Obj
439 * - STRQ presumably all supported (matrix means incoming R values
440 * can end up in STQ, this has implications for vertex support,
441 * presumably ok if maos is used, though?)
442 *
443 * Basically impossible to do this on the fly - just collect some
444 * basic info & do the checks from ValidateState().
445 */
446 static void r200TexGen( struct gl_context *ctx,
447 GLenum coord,
448 GLenum pname,
449 const GLfloat *params )
450 {
451 r200ContextPtr rmesa = R200_CONTEXT(ctx);
452 GLuint unit = ctx->Texture.CurrentUnit;
453 rmesa->recheck_texgen[unit] = GL_TRUE;
454 }
455
456
457 /**
458 * Allocate a new texture object.
459 * Called via ctx->Driver.NewTextureObject.
460 * Note: this function will be called during context creation to
461 * allocate the default texture objects.
462 * Fixup MaxAnisotropy according to user preference.
463 */
464 static struct gl_texture_object *r200NewTextureObject(struct gl_context * ctx,
465 GLuint name,
466 GLenum target)
467 {
468 r200ContextPtr rmesa = R200_CONTEXT(ctx);
469 radeonTexObj* t = CALLOC_STRUCT(radeon_tex_obj);
470
471
472 radeon_print(RADEON_STATE | RADEON_TEXTURE, RADEON_NORMAL,
473 "%s(%p) target %s, new texture %p.\n",
474 __func__, ctx,
475 _mesa_enum_to_string(target), t);
476
477 _mesa_initialize_texture_object(ctx, &t->base, name, target);
478 t->base.Sampler.MaxAnisotropy = rmesa->radeon.initialMaxAnisotropy;
479
480 /* Initialize hardware state */
481 r200SetTexWrap( t, t->base.Sampler.WrapS, t->base.Sampler.WrapT, t->base.Sampler.WrapR );
482 r200SetTexMaxAnisotropy( t, t->base.Sampler.MaxAnisotropy );
483 r200SetTexFilter(t, t->base.Sampler.MinFilter, t->base.Sampler.MagFilter);
484 r200SetTexBorderColor(t, t->base.Sampler.BorderColor.f);
485
486 return &t->base;
487 }
488
489 static struct gl_sampler_object *
490 r200NewSamplerObject(struct gl_context *ctx, GLuint name)
491 {
492 r200ContextPtr rmesa = R200_CONTEXT(ctx);
493 struct gl_sampler_object *samp = _mesa_new_sampler_object(ctx, name);
494 if (samp)
495 samp->MaxAnisotropy = rmesa->radeon.initialMaxAnisotropy;
496 return samp;
497 }
498
499
500
501 void r200InitTextureFuncs( radeonContextPtr radeon, struct dd_function_table *functions )
502 {
503 /* Note: we only plug in the functions we implement in the driver
504 * since _mesa_init_driver_functions() was already called.
505 */
506
507 radeon_init_common_texture_funcs(radeon, functions);
508
509 functions->NewTextureObject = r200NewTextureObject;
510 // functions->BindTexture = r200BindTexture;
511 functions->DeleteTexture = r200DeleteTexture;
512
513 functions->TexEnv = r200TexEnv;
514 functions->TexParameter = r200TexParameter;
515 functions->TexGen = r200TexGen;
516 functions->NewSamplerObject = r200NewSamplerObject;
517 }