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Merge remote branch 'origin/mesa_7_7_branch'
[mesa.git] / src / mesa / drivers / dri / r200 / r200_texstate.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
3
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /*
31 * Authors:
32 * Keith Whitwell <keith@tungstengraphics.com>
33 */
34
35 #include "main/glheader.h"
36 #include "main/imports.h"
37 #include "main/context.h"
38 #include "main/macros.h"
39 #include "main/teximage.h"
40 #include "main/texobj.h"
41 #include "main/enums.h"
42
43 #include "radeon_common.h"
44 #include "radeon_mipmap_tree.h"
45 #include "r200_context.h"
46 #include "r200_state.h"
47 #include "r200_ioctl.h"
48 #include "r200_swtcl.h"
49 #include "r200_tex.h"
50 #include "r200_tcl.h"
51
52
53 #define R200_TXFORMAT_A8 R200_TXFORMAT_I8
54 #define R200_TXFORMAT_L8 R200_TXFORMAT_I8
55 #define R200_TXFORMAT_AL88 R200_TXFORMAT_AI88
56 #define R200_TXFORMAT_YCBCR R200_TXFORMAT_YVYU422
57 #define R200_TXFORMAT_YCBCR_REV R200_TXFORMAT_VYUY422
58 #define R200_TXFORMAT_RGB_DXT1 R200_TXFORMAT_DXT1
59 #define R200_TXFORMAT_RGBA_DXT1 R200_TXFORMAT_DXT1
60 #define R200_TXFORMAT_RGBA_DXT3 R200_TXFORMAT_DXT23
61 #define R200_TXFORMAT_RGBA_DXT5 R200_TXFORMAT_DXT45
62
63 #define _COLOR(f) \
64 [ MESA_FORMAT_ ## f ] = { R200_TXFORMAT_ ## f, 0 }
65 #define _COLOR_REV(f) \
66 [ MESA_FORMAT_ ## f ## _REV ] = { R200_TXFORMAT_ ## f, 0 }
67 #define _ALPHA(f) \
68 [ MESA_FORMAT_ ## f ] = { R200_TXFORMAT_ ## f | R200_TXFORMAT_ALPHA_IN_MAP, 0 }
69 #define _ALPHA_REV(f) \
70 [ MESA_FORMAT_ ## f ## _REV ] = { R200_TXFORMAT_ ## f | R200_TXFORMAT_ALPHA_IN_MAP, 0 }
71 #define _YUV(f) \
72 [ MESA_FORMAT_ ## f ] = { R200_TXFORMAT_ ## f, R200_YUV_TO_RGB }
73 #define _INVALID(f) \
74 [ MESA_FORMAT_ ## f ] = { 0xffffffff, 0 }
75 #define VALID_FORMAT(f) ( ((f) <= MESA_FORMAT_RGBA_DXT5) \
76 && (tx_table_be[f].format != 0xffffffff) )
77
78 struct tx_table {
79 GLuint format, filter;
80 };
81
82 static const struct tx_table tx_table_be[] =
83 {
84 [ MESA_FORMAT_RGBA8888 ] = { R200_TXFORMAT_ABGR8888 | R200_TXFORMAT_ALPHA_IN_MAP, 0 },
85 _ALPHA_REV(RGBA8888),
86 _ALPHA(ARGB8888),
87 _ALPHA_REV(ARGB8888),
88 _INVALID(RGB888),
89 _COLOR(RGB565),
90 _COLOR_REV(RGB565),
91 _ALPHA(ARGB4444),
92 _ALPHA_REV(ARGB4444),
93 _ALPHA(ARGB1555),
94 _ALPHA_REV(ARGB1555),
95 _ALPHA(AL88),
96 _ALPHA_REV(AL88),
97 _ALPHA(A8),
98 _COLOR(L8),
99 _ALPHA(I8),
100 _INVALID(CI8),
101 _YUV(YCBCR),
102 _YUV(YCBCR_REV),
103 _INVALID(RGB_FXT1),
104 _INVALID(RGBA_FXT1),
105 _COLOR(RGB_DXT1),
106 _ALPHA(RGBA_DXT1),
107 _ALPHA(RGBA_DXT3),
108 _ALPHA(RGBA_DXT5),
109 };
110
111 static const struct tx_table tx_table_le[] =
112 {
113 _ALPHA(RGBA8888),
114 [ MESA_FORMAT_RGBA8888_REV ] = { R200_TXFORMAT_ABGR8888 | R200_TXFORMAT_ALPHA_IN_MAP, 0 },
115 _ALPHA(ARGB8888),
116 _ALPHA_REV(ARGB8888),
117 [ MESA_FORMAT_RGB888 ] = { R200_TXFORMAT_ARGB8888, 0 },
118 _COLOR(RGB565),
119 _COLOR_REV(RGB565),
120 _ALPHA(ARGB4444),
121 _ALPHA_REV(ARGB4444),
122 _ALPHA(ARGB1555),
123 _ALPHA_REV(ARGB1555),
124 _ALPHA(AL88),
125 _ALPHA_REV(AL88),
126 _ALPHA(A8),
127 _COLOR(L8),
128 _ALPHA(I8),
129 _INVALID(CI8),
130 _YUV(YCBCR),
131 _YUV(YCBCR_REV),
132 _INVALID(RGB_FXT1),
133 _INVALID(RGBA_FXT1),
134 _COLOR(RGB_DXT1),
135 _ALPHA(RGBA_DXT1),
136 _ALPHA(RGBA_DXT3),
137 _ALPHA(RGBA_DXT5),
138 };
139
140 #undef _COLOR
141 #undef _ALPHA
142 #undef _INVALID
143
144 /* ================================================================
145 * Texture combine functions
146 */
147
148 /* GL_ARB_texture_env_combine support
149 */
150
151 /* The color tables have combine functions for GL_SRC_COLOR,
152 * GL_ONE_MINUS_SRC_COLOR, GL_SRC_ALPHA and GL_ONE_MINUS_SRC_ALPHA.
153 */
154 static GLuint r200_register_color[][R200_MAX_TEXTURE_UNITS] =
155 {
156 {
157 R200_TXC_ARG_A_R0_COLOR,
158 R200_TXC_ARG_A_R1_COLOR,
159 R200_TXC_ARG_A_R2_COLOR,
160 R200_TXC_ARG_A_R3_COLOR,
161 R200_TXC_ARG_A_R4_COLOR,
162 R200_TXC_ARG_A_R5_COLOR
163 },
164 {
165 R200_TXC_ARG_A_R0_COLOR | R200_TXC_COMP_ARG_A,
166 R200_TXC_ARG_A_R1_COLOR | R200_TXC_COMP_ARG_A,
167 R200_TXC_ARG_A_R2_COLOR | R200_TXC_COMP_ARG_A,
168 R200_TXC_ARG_A_R3_COLOR | R200_TXC_COMP_ARG_A,
169 R200_TXC_ARG_A_R4_COLOR | R200_TXC_COMP_ARG_A,
170 R200_TXC_ARG_A_R5_COLOR | R200_TXC_COMP_ARG_A
171 },
172 {
173 R200_TXC_ARG_A_R0_ALPHA,
174 R200_TXC_ARG_A_R1_ALPHA,
175 R200_TXC_ARG_A_R2_ALPHA,
176 R200_TXC_ARG_A_R3_ALPHA,
177 R200_TXC_ARG_A_R4_ALPHA,
178 R200_TXC_ARG_A_R5_ALPHA
179 },
180 {
181 R200_TXC_ARG_A_R0_ALPHA | R200_TXC_COMP_ARG_A,
182 R200_TXC_ARG_A_R1_ALPHA | R200_TXC_COMP_ARG_A,
183 R200_TXC_ARG_A_R2_ALPHA | R200_TXC_COMP_ARG_A,
184 R200_TXC_ARG_A_R3_ALPHA | R200_TXC_COMP_ARG_A,
185 R200_TXC_ARG_A_R4_ALPHA | R200_TXC_COMP_ARG_A,
186 R200_TXC_ARG_A_R5_ALPHA | R200_TXC_COMP_ARG_A
187 },
188 };
189
190 static GLuint r200_tfactor_color[] =
191 {
192 R200_TXC_ARG_A_TFACTOR_COLOR,
193 R200_TXC_ARG_A_TFACTOR_COLOR | R200_TXC_COMP_ARG_A,
194 R200_TXC_ARG_A_TFACTOR_ALPHA,
195 R200_TXC_ARG_A_TFACTOR_ALPHA | R200_TXC_COMP_ARG_A
196 };
197
198 static GLuint r200_tfactor1_color[] =
199 {
200 R200_TXC_ARG_A_TFACTOR1_COLOR,
201 R200_TXC_ARG_A_TFACTOR1_COLOR | R200_TXC_COMP_ARG_A,
202 R200_TXC_ARG_A_TFACTOR1_ALPHA,
203 R200_TXC_ARG_A_TFACTOR1_ALPHA | R200_TXC_COMP_ARG_A
204 };
205
206 static GLuint r200_primary_color[] =
207 {
208 R200_TXC_ARG_A_DIFFUSE_COLOR,
209 R200_TXC_ARG_A_DIFFUSE_COLOR | R200_TXC_COMP_ARG_A,
210 R200_TXC_ARG_A_DIFFUSE_ALPHA,
211 R200_TXC_ARG_A_DIFFUSE_ALPHA | R200_TXC_COMP_ARG_A
212 };
213
214 /* GL_ZERO table - indices 0-3
215 * GL_ONE table - indices 1-4
216 */
217 static GLuint r200_zero_color[] =
218 {
219 R200_TXC_ARG_A_ZERO,
220 R200_TXC_ARG_A_ZERO | R200_TXC_COMP_ARG_A,
221 R200_TXC_ARG_A_ZERO,
222 R200_TXC_ARG_A_ZERO | R200_TXC_COMP_ARG_A,
223 R200_TXC_ARG_A_ZERO
224 };
225
226 /* The alpha tables only have GL_SRC_ALPHA and GL_ONE_MINUS_SRC_ALPHA.
227 */
228 static GLuint r200_register_alpha[][R200_MAX_TEXTURE_UNITS] =
229 {
230 {
231 R200_TXA_ARG_A_R0_ALPHA,
232 R200_TXA_ARG_A_R1_ALPHA,
233 R200_TXA_ARG_A_R2_ALPHA,
234 R200_TXA_ARG_A_R3_ALPHA,
235 R200_TXA_ARG_A_R4_ALPHA,
236 R200_TXA_ARG_A_R5_ALPHA
237 },
238 {
239 R200_TXA_ARG_A_R0_ALPHA | R200_TXA_COMP_ARG_A,
240 R200_TXA_ARG_A_R1_ALPHA | R200_TXA_COMP_ARG_A,
241 R200_TXA_ARG_A_R2_ALPHA | R200_TXA_COMP_ARG_A,
242 R200_TXA_ARG_A_R3_ALPHA | R200_TXA_COMP_ARG_A,
243 R200_TXA_ARG_A_R4_ALPHA | R200_TXA_COMP_ARG_A,
244 R200_TXA_ARG_A_R5_ALPHA | R200_TXA_COMP_ARG_A
245 },
246 };
247
248 static GLuint r200_tfactor_alpha[] =
249 {
250 R200_TXA_ARG_A_TFACTOR_ALPHA,
251 R200_TXA_ARG_A_TFACTOR_ALPHA | R200_TXA_COMP_ARG_A
252 };
253
254 static GLuint r200_tfactor1_alpha[] =
255 {
256 R200_TXA_ARG_A_TFACTOR1_ALPHA,
257 R200_TXA_ARG_A_TFACTOR1_ALPHA | R200_TXA_COMP_ARG_A
258 };
259
260 static GLuint r200_primary_alpha[] =
261 {
262 R200_TXA_ARG_A_DIFFUSE_ALPHA,
263 R200_TXA_ARG_A_DIFFUSE_ALPHA | R200_TXA_COMP_ARG_A
264 };
265
266 /* GL_ZERO table - indices 0-1
267 * GL_ONE table - indices 1-2
268 */
269 static GLuint r200_zero_alpha[] =
270 {
271 R200_TXA_ARG_A_ZERO,
272 R200_TXA_ARG_A_ZERO | R200_TXA_COMP_ARG_A,
273 R200_TXA_ARG_A_ZERO,
274 };
275
276
277 /* Extract the arg from slot A, shift it into the correct argument slot
278 * and set the corresponding complement bit.
279 */
280 #define R200_COLOR_ARG( n, arg ) \
281 do { \
282 color_combine |= \
283 ((color_arg[n] & R200_TXC_ARG_A_MASK) \
284 << R200_TXC_ARG_##arg##_SHIFT); \
285 color_combine |= \
286 ((color_arg[n] >> R200_TXC_COMP_ARG_A_SHIFT) \
287 << R200_TXC_COMP_ARG_##arg##_SHIFT); \
288 } while (0)
289
290 #define R200_ALPHA_ARG( n, arg ) \
291 do { \
292 alpha_combine |= \
293 ((alpha_arg[n] & R200_TXA_ARG_A_MASK) \
294 << R200_TXA_ARG_##arg##_SHIFT); \
295 alpha_combine |= \
296 ((alpha_arg[n] >> R200_TXA_COMP_ARG_A_SHIFT) \
297 << R200_TXA_COMP_ARG_##arg##_SHIFT); \
298 } while (0)
299
300
301 /* ================================================================
302 * Texture unit state management
303 */
304
305 static GLboolean r200UpdateTextureEnv( GLcontext *ctx, int unit, int slot, GLuint replaceargs )
306 {
307 r200ContextPtr rmesa = R200_CONTEXT(ctx);
308 const struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
309 GLuint color_combine, alpha_combine;
310 GLuint color_scale = rmesa->hw.pix[slot].cmd[PIX_PP_TXCBLEND2] &
311 ~(R200_TXC_SCALE_MASK | R200_TXC_OUTPUT_REG_MASK | R200_TXC_TFACTOR_SEL_MASK |
312 R200_TXC_TFACTOR1_SEL_MASK);
313 GLuint alpha_scale = rmesa->hw.pix[slot].cmd[PIX_PP_TXABLEND2] &
314 ~(R200_TXA_DOT_ALPHA | R200_TXA_SCALE_MASK | R200_TXA_OUTPUT_REG_MASK |
315 R200_TXA_TFACTOR_SEL_MASK | R200_TXA_TFACTOR1_SEL_MASK);
316
317 /* texUnit->_Current can be NULL if and only if the texture unit is
318 * not actually enabled.
319 */
320 assert( (texUnit->_ReallyEnabled == 0)
321 || (texUnit->_Current != NULL) );
322
323 if ( R200_DEBUG & RADEON_TEXTURE ) {
324 fprintf( stderr, "%s( %p, %d )\n", __FUNCTION__, (void *)ctx, unit );
325 }
326
327 /* Set the texture environment state. Isn't this nice and clean?
328 * The chip will automagically set the texture alpha to 0xff when
329 * the texture format does not include an alpha component. This
330 * reduces the amount of special-casing we have to do, alpha-only
331 * textures being a notable exception.
332 */
333
334 color_scale |= ((rmesa->state.texture.unit[unit].outputreg + 1) << R200_TXC_OUTPUT_REG_SHIFT) |
335 (unit << R200_TXC_TFACTOR_SEL_SHIFT) |
336 (replaceargs << R200_TXC_TFACTOR1_SEL_SHIFT);
337 alpha_scale |= ((rmesa->state.texture.unit[unit].outputreg + 1) << R200_TXA_OUTPUT_REG_SHIFT) |
338 (unit << R200_TXA_TFACTOR_SEL_SHIFT) |
339 (replaceargs << R200_TXA_TFACTOR1_SEL_SHIFT);
340
341 if ( !texUnit->_ReallyEnabled ) {
342 assert( unit == 0);
343 color_combine = R200_TXC_ARG_A_ZERO | R200_TXC_ARG_B_ZERO
344 | R200_TXC_ARG_C_DIFFUSE_COLOR | R200_TXC_OP_MADD;
345 alpha_combine = R200_TXA_ARG_A_ZERO | R200_TXA_ARG_B_ZERO
346 | R200_TXA_ARG_C_DIFFUSE_ALPHA | R200_TXA_OP_MADD;
347 }
348 else {
349 GLuint color_arg[3], alpha_arg[3];
350 GLuint i;
351 const GLuint numColorArgs = texUnit->_CurrentCombine->_NumArgsRGB;
352 const GLuint numAlphaArgs = texUnit->_CurrentCombine->_NumArgsA;
353 GLuint RGBshift = texUnit->_CurrentCombine->ScaleShiftRGB;
354 GLuint Ashift = texUnit->_CurrentCombine->ScaleShiftA;
355
356
357 const GLint replaceoprgb =
358 ctx->Texture.Unit[replaceargs]._CurrentCombine->OperandRGB[0] - GL_SRC_COLOR;
359 const GLint replaceopa =
360 ctx->Texture.Unit[replaceargs]._CurrentCombine->OperandA[0] - GL_SRC_ALPHA;
361
362 /* Step 1:
363 * Extract the color and alpha combine function arguments.
364 */
365 for ( i = 0 ; i < numColorArgs ; i++ ) {
366 GLint op = texUnit->_CurrentCombine->OperandRGB[i] - GL_SRC_COLOR;
367 const GLint srcRGBi = texUnit->_CurrentCombine->SourceRGB[i];
368 assert(op >= 0);
369 assert(op <= 3);
370 switch ( srcRGBi ) {
371 case GL_TEXTURE:
372 color_arg[i] = r200_register_color[op][unit];
373 break;
374 case GL_CONSTANT:
375 color_arg[i] = r200_tfactor_color[op];
376 break;
377 case GL_PRIMARY_COLOR:
378 color_arg[i] = r200_primary_color[op];
379 break;
380 case GL_PREVIOUS:
381 if (replaceargs != unit) {
382 const GLint srcRGBreplace =
383 ctx->Texture.Unit[replaceargs]._CurrentCombine->SourceRGB[0];
384 if (op >= 2) {
385 op = op ^ replaceopa;
386 }
387 else {
388 op = op ^ replaceoprgb;
389 }
390 switch (srcRGBreplace) {
391 case GL_TEXTURE:
392 color_arg[i] = r200_register_color[op][replaceargs];
393 break;
394 case GL_CONSTANT:
395 color_arg[i] = r200_tfactor1_color[op];
396 break;
397 case GL_PRIMARY_COLOR:
398 color_arg[i] = r200_primary_color[op];
399 break;
400 case GL_PREVIOUS:
401 if (slot == 0)
402 color_arg[i] = r200_primary_color[op];
403 else
404 color_arg[i] = r200_register_color[op]
405 [rmesa->state.texture.unit[replaceargs - 1].outputreg];
406 break;
407 case GL_ZERO:
408 color_arg[i] = r200_zero_color[op];
409 break;
410 case GL_ONE:
411 color_arg[i] = r200_zero_color[op+1];
412 break;
413 case GL_TEXTURE0:
414 case GL_TEXTURE1:
415 case GL_TEXTURE2:
416 case GL_TEXTURE3:
417 case GL_TEXTURE4:
418 case GL_TEXTURE5:
419 color_arg[i] = r200_register_color[op][srcRGBreplace - GL_TEXTURE0];
420 break;
421 default:
422 return GL_FALSE;
423 }
424 }
425 else {
426 if (slot == 0)
427 color_arg[i] = r200_primary_color[op];
428 else
429 color_arg[i] = r200_register_color[op]
430 [rmesa->state.texture.unit[unit - 1].outputreg];
431 }
432 break;
433 case GL_ZERO:
434 color_arg[i] = r200_zero_color[op];
435 break;
436 case GL_ONE:
437 color_arg[i] = r200_zero_color[op+1];
438 break;
439 case GL_TEXTURE0:
440 case GL_TEXTURE1:
441 case GL_TEXTURE2:
442 case GL_TEXTURE3:
443 case GL_TEXTURE4:
444 case GL_TEXTURE5:
445 color_arg[i] = r200_register_color[op][srcRGBi - GL_TEXTURE0];
446 break;
447 default:
448 return GL_FALSE;
449 }
450 }
451
452 for ( i = 0 ; i < numAlphaArgs ; i++ ) {
453 GLint op = texUnit->_CurrentCombine->OperandA[i] - GL_SRC_ALPHA;
454 const GLint srcAi = texUnit->_CurrentCombine->SourceA[i];
455 assert(op >= 0);
456 assert(op <= 1);
457 switch ( srcAi ) {
458 case GL_TEXTURE:
459 alpha_arg[i] = r200_register_alpha[op][unit];
460 break;
461 case GL_CONSTANT:
462 alpha_arg[i] = r200_tfactor_alpha[op];
463 break;
464 case GL_PRIMARY_COLOR:
465 alpha_arg[i] = r200_primary_alpha[op];
466 break;
467 case GL_PREVIOUS:
468 if (replaceargs != unit) {
469 const GLint srcAreplace =
470 ctx->Texture.Unit[replaceargs]._CurrentCombine->SourceA[0];
471 op = op ^ replaceopa;
472 switch (srcAreplace) {
473 case GL_TEXTURE:
474 alpha_arg[i] = r200_register_alpha[op][replaceargs];
475 break;
476 case GL_CONSTANT:
477 alpha_arg[i] = r200_tfactor1_alpha[op];
478 break;
479 case GL_PRIMARY_COLOR:
480 alpha_arg[i] = r200_primary_alpha[op];
481 break;
482 case GL_PREVIOUS:
483 if (slot == 0)
484 alpha_arg[i] = r200_primary_alpha[op];
485 else
486 alpha_arg[i] = r200_register_alpha[op]
487 [rmesa->state.texture.unit[replaceargs - 1].outputreg];
488 break;
489 case GL_ZERO:
490 alpha_arg[i] = r200_zero_alpha[op];
491 break;
492 case GL_ONE:
493 alpha_arg[i] = r200_zero_alpha[op+1];
494 break;
495 case GL_TEXTURE0:
496 case GL_TEXTURE1:
497 case GL_TEXTURE2:
498 case GL_TEXTURE3:
499 case GL_TEXTURE4:
500 case GL_TEXTURE5:
501 alpha_arg[i] = r200_register_alpha[op][srcAreplace - GL_TEXTURE0];
502 break;
503 default:
504 return GL_FALSE;
505 }
506 }
507 else {
508 if (slot == 0)
509 alpha_arg[i] = r200_primary_alpha[op];
510 else
511 alpha_arg[i] = r200_register_alpha[op]
512 [rmesa->state.texture.unit[unit - 1].outputreg];
513 }
514 break;
515 case GL_ZERO:
516 alpha_arg[i] = r200_zero_alpha[op];
517 break;
518 case GL_ONE:
519 alpha_arg[i] = r200_zero_alpha[op+1];
520 break;
521 case GL_TEXTURE0:
522 case GL_TEXTURE1:
523 case GL_TEXTURE2:
524 case GL_TEXTURE3:
525 case GL_TEXTURE4:
526 case GL_TEXTURE5:
527 alpha_arg[i] = r200_register_alpha[op][srcAi - GL_TEXTURE0];
528 break;
529 default:
530 return GL_FALSE;
531 }
532 }
533
534 /* Step 2:
535 * Build up the color and alpha combine functions.
536 */
537 switch ( texUnit->_CurrentCombine->ModeRGB ) {
538 case GL_REPLACE:
539 color_combine = (R200_TXC_ARG_A_ZERO |
540 R200_TXC_ARG_B_ZERO |
541 R200_TXC_OP_MADD);
542 R200_COLOR_ARG( 0, C );
543 break;
544 case GL_MODULATE:
545 color_combine = (R200_TXC_ARG_C_ZERO |
546 R200_TXC_OP_MADD);
547 R200_COLOR_ARG( 0, A );
548 R200_COLOR_ARG( 1, B );
549 break;
550 case GL_ADD:
551 color_combine = (R200_TXC_ARG_B_ZERO |
552 R200_TXC_COMP_ARG_B |
553 R200_TXC_OP_MADD);
554 R200_COLOR_ARG( 0, A );
555 R200_COLOR_ARG( 1, C );
556 break;
557 case GL_ADD_SIGNED:
558 color_combine = (R200_TXC_ARG_B_ZERO |
559 R200_TXC_COMP_ARG_B |
560 R200_TXC_BIAS_ARG_C | /* new */
561 R200_TXC_OP_MADD); /* was ADDSIGNED */
562 R200_COLOR_ARG( 0, A );
563 R200_COLOR_ARG( 1, C );
564 break;
565 case GL_SUBTRACT:
566 color_combine = (R200_TXC_ARG_B_ZERO |
567 R200_TXC_COMP_ARG_B |
568 R200_TXC_NEG_ARG_C |
569 R200_TXC_OP_MADD);
570 R200_COLOR_ARG( 0, A );
571 R200_COLOR_ARG( 1, C );
572 break;
573 case GL_INTERPOLATE:
574 color_combine = (R200_TXC_OP_LERP);
575 R200_COLOR_ARG( 0, B );
576 R200_COLOR_ARG( 1, A );
577 R200_COLOR_ARG( 2, C );
578 break;
579
580 case GL_DOT3_RGB_EXT:
581 case GL_DOT3_RGBA_EXT:
582 /* The EXT version of the DOT3 extension does not support the
583 * scale factor, but the ARB version (and the version in OpenGL
584 * 1.3) does.
585 */
586 RGBshift = 0;
587 /* FALLTHROUGH */
588
589 case GL_DOT3_RGB:
590 case GL_DOT3_RGBA:
591 /* DOT3 works differently on R200 than on R100. On R100, just
592 * setting the DOT3 mode did everything for you. On R200, the
593 * driver has to enable the biasing and scale in the inputs to
594 * put them in the proper [-1,1] range. This is what the 4x and
595 * the -0.5 in the DOT3 spec do. The post-scale is then set
596 * normally.
597 */
598
599 color_combine = (R200_TXC_ARG_C_ZERO |
600 R200_TXC_OP_DOT3 |
601 R200_TXC_BIAS_ARG_A |
602 R200_TXC_BIAS_ARG_B |
603 R200_TXC_SCALE_ARG_A |
604 R200_TXC_SCALE_ARG_B);
605 R200_COLOR_ARG( 0, A );
606 R200_COLOR_ARG( 1, B );
607 break;
608
609 case GL_MODULATE_ADD_ATI:
610 color_combine = (R200_TXC_OP_MADD);
611 R200_COLOR_ARG( 0, A );
612 R200_COLOR_ARG( 1, C );
613 R200_COLOR_ARG( 2, B );
614 break;
615 case GL_MODULATE_SIGNED_ADD_ATI:
616 color_combine = (R200_TXC_BIAS_ARG_C | /* new */
617 R200_TXC_OP_MADD); /* was ADDSIGNED */
618 R200_COLOR_ARG( 0, A );
619 R200_COLOR_ARG( 1, C );
620 R200_COLOR_ARG( 2, B );
621 break;
622 case GL_MODULATE_SUBTRACT_ATI:
623 color_combine = (R200_TXC_NEG_ARG_C |
624 R200_TXC_OP_MADD);
625 R200_COLOR_ARG( 0, A );
626 R200_COLOR_ARG( 1, C );
627 R200_COLOR_ARG( 2, B );
628 break;
629 default:
630 return GL_FALSE;
631 }
632
633 switch ( texUnit->_CurrentCombine->ModeA ) {
634 case GL_REPLACE:
635 alpha_combine = (R200_TXA_ARG_A_ZERO |
636 R200_TXA_ARG_B_ZERO |
637 R200_TXA_OP_MADD);
638 R200_ALPHA_ARG( 0, C );
639 break;
640 case GL_MODULATE:
641 alpha_combine = (R200_TXA_ARG_C_ZERO |
642 R200_TXA_OP_MADD);
643 R200_ALPHA_ARG( 0, A );
644 R200_ALPHA_ARG( 1, B );
645 break;
646 case GL_ADD:
647 alpha_combine = (R200_TXA_ARG_B_ZERO |
648 R200_TXA_COMP_ARG_B |
649 R200_TXA_OP_MADD);
650 R200_ALPHA_ARG( 0, A );
651 R200_ALPHA_ARG( 1, C );
652 break;
653 case GL_ADD_SIGNED:
654 alpha_combine = (R200_TXA_ARG_B_ZERO |
655 R200_TXA_COMP_ARG_B |
656 R200_TXA_BIAS_ARG_C | /* new */
657 R200_TXA_OP_MADD); /* was ADDSIGNED */
658 R200_ALPHA_ARG( 0, A );
659 R200_ALPHA_ARG( 1, C );
660 break;
661 case GL_SUBTRACT:
662 alpha_combine = (R200_TXA_ARG_B_ZERO |
663 R200_TXA_COMP_ARG_B |
664 R200_TXA_NEG_ARG_C |
665 R200_TXA_OP_MADD);
666 R200_ALPHA_ARG( 0, A );
667 R200_ALPHA_ARG( 1, C );
668 break;
669 case GL_INTERPOLATE:
670 alpha_combine = (R200_TXA_OP_LERP);
671 R200_ALPHA_ARG( 0, B );
672 R200_ALPHA_ARG( 1, A );
673 R200_ALPHA_ARG( 2, C );
674 break;
675
676 case GL_MODULATE_ADD_ATI:
677 alpha_combine = (R200_TXA_OP_MADD);
678 R200_ALPHA_ARG( 0, A );
679 R200_ALPHA_ARG( 1, C );
680 R200_ALPHA_ARG( 2, B );
681 break;
682 case GL_MODULATE_SIGNED_ADD_ATI:
683 alpha_combine = (R200_TXA_BIAS_ARG_C | /* new */
684 R200_TXA_OP_MADD); /* was ADDSIGNED */
685 R200_ALPHA_ARG( 0, A );
686 R200_ALPHA_ARG( 1, C );
687 R200_ALPHA_ARG( 2, B );
688 break;
689 case GL_MODULATE_SUBTRACT_ATI:
690 alpha_combine = (R200_TXA_NEG_ARG_C |
691 R200_TXA_OP_MADD);
692 R200_ALPHA_ARG( 0, A );
693 R200_ALPHA_ARG( 1, C );
694 R200_ALPHA_ARG( 2, B );
695 break;
696 default:
697 return GL_FALSE;
698 }
699
700 if ( (texUnit->_CurrentCombine->ModeRGB == GL_DOT3_RGBA_EXT)
701 || (texUnit->_CurrentCombine->ModeRGB == GL_DOT3_RGBA) ) {
702 alpha_scale |= R200_TXA_DOT_ALPHA;
703 Ashift = RGBshift;
704 }
705
706 /* Step 3:
707 * Apply the scale factor.
708 */
709 color_scale |= (RGBshift << R200_TXC_SCALE_SHIFT);
710 alpha_scale |= (Ashift << R200_TXA_SCALE_SHIFT);
711
712 /* All done!
713 */
714 }
715
716 if ( rmesa->hw.pix[slot].cmd[PIX_PP_TXCBLEND] != color_combine ||
717 rmesa->hw.pix[slot].cmd[PIX_PP_TXABLEND] != alpha_combine ||
718 rmesa->hw.pix[slot].cmd[PIX_PP_TXCBLEND2] != color_scale ||
719 rmesa->hw.pix[slot].cmd[PIX_PP_TXABLEND2] != alpha_scale) {
720 R200_STATECHANGE( rmesa, pix[slot] );
721 rmesa->hw.pix[slot].cmd[PIX_PP_TXCBLEND] = color_combine;
722 rmesa->hw.pix[slot].cmd[PIX_PP_TXABLEND] = alpha_combine;
723 rmesa->hw.pix[slot].cmd[PIX_PP_TXCBLEND2] = color_scale;
724 rmesa->hw.pix[slot].cmd[PIX_PP_TXABLEND2] = alpha_scale;
725 }
726
727 return GL_TRUE;
728 }
729
730 void r200SetTexOffset(__DRIcontext * pDRICtx, GLint texname,
731 unsigned long long offset, GLint depth, GLuint pitch)
732 {
733 r200ContextPtr rmesa = pDRICtx->driverPrivate;
734 struct gl_texture_object *tObj =
735 _mesa_lookup_texture(rmesa->radeon.glCtx, texname);
736 radeonTexObjPtr t = radeon_tex_obj(tObj);
737
738 if (!tObj)
739 return;
740
741 t->image_override = GL_TRUE;
742
743 if (!offset)
744 return;
745
746 t->bo = NULL;
747 t->override_offset = offset;
748 t->pp_txpitch = pitch - 32;
749
750 switch (depth) {
751 case 32:
752 t->pp_txformat = tx_table_le[MESA_FORMAT_ARGB8888].format;
753 t->pp_txfilter |= tx_table_le[MESA_FORMAT_ARGB8888].filter;
754 break;
755 case 24:
756 default:
757 t->pp_txformat = tx_table_le[MESA_FORMAT_RGB888].format;
758 t->pp_txfilter |= tx_table_le[MESA_FORMAT_RGB888].filter;
759 break;
760 case 16:
761 t->pp_txformat = tx_table_le[MESA_FORMAT_RGB565].format;
762 t->pp_txfilter |= tx_table_le[MESA_FORMAT_RGB565].filter;
763 break;
764 }
765 }
766
767 void r200SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_format,
768 __DRIdrawable *dPriv)
769 {
770 struct gl_texture_unit *texUnit;
771 struct gl_texture_object *texObj;
772 struct gl_texture_image *texImage;
773 struct radeon_renderbuffer *rb;
774 radeon_texture_image *rImage;
775 radeonContextPtr radeon;
776 r200ContextPtr rmesa;
777 struct radeon_framebuffer *rfb;
778 radeonTexObjPtr t;
779 uint32_t pitch_val;
780 uint32_t internalFormat, type, format;
781
782 type = GL_BGRA;
783 format = GL_UNSIGNED_BYTE;
784 internalFormat = (glx_texture_format == GLX_TEXTURE_FORMAT_RGB_EXT ? 3 : 4);
785
786 radeon = pDRICtx->driverPrivate;
787 rmesa = pDRICtx->driverPrivate;
788
789 rfb = dPriv->driverPrivate;
790 texUnit = &radeon->glCtx->Texture.Unit[radeon->glCtx->Texture.CurrentUnit];
791 texObj = _mesa_select_tex_object(radeon->glCtx, texUnit, target);
792 texImage = _mesa_get_tex_image(radeon->glCtx, texObj, target, 0);
793
794 rImage = get_radeon_texture_image(texImage);
795 t = radeon_tex_obj(texObj);
796 if (t == NULL) {
797 return;
798 }
799
800 radeon_update_renderbuffers(pDRICtx, dPriv);
801 /* back & depth buffer are useless free them right away */
802 rb = (void*)rfb->base.Attachment[BUFFER_DEPTH].Renderbuffer;
803 if (rb && rb->bo) {
804 radeon_bo_unref(rb->bo);
805 rb->bo = NULL;
806 }
807 rb = (void*)rfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer;
808 if (rb && rb->bo) {
809 radeon_bo_unref(rb->bo);
810 rb->bo = NULL;
811 }
812 rb = rfb->color_rb[0];
813 if (rb->bo == NULL) {
814 /* Failed to BO for the buffer */
815 return;
816 }
817
818 _mesa_lock_texture(radeon->glCtx, texObj);
819 if (t->bo) {
820 radeon_bo_unref(t->bo);
821 t->bo = NULL;
822 }
823 if (rImage->bo) {
824 radeon_bo_unref(rImage->bo);
825 rImage->bo = NULL;
826 }
827
828 radeon_miptree_unreference(&t->mt);
829 radeon_miptree_unreference(&rImage->mt);
830
831 _mesa_init_teximage_fields(radeon->glCtx, target, texImage,
832 rb->base.Width, rb->base.Height, 1, 0, rb->cpp);
833 texImage->RowStride = rb->pitch / rb->cpp;
834
835 rImage->bo = rb->bo;
836 radeon_bo_ref(rImage->bo);
837 t->bo = rb->bo;
838 radeon_bo_ref(t->bo);
839 t->tile_bits = 0;
840 t->image_override = GL_TRUE;
841 t->override_offset = 0;
842 t->pp_txpitch &= (1 << 13) -1;
843 pitch_val = rb->pitch;
844 switch (rb->cpp) {
845 case 4:
846 if (glx_texture_format == GLX_TEXTURE_FORMAT_RGB_EXT)
847 t->pp_txformat = tx_table_le[MESA_FORMAT_RGB888].format;
848 else
849 t->pp_txformat = tx_table_le[MESA_FORMAT_ARGB8888].format;
850 t->pp_txfilter |= tx_table_le[MESA_FORMAT_ARGB8888].filter;
851 break;
852 case 3:
853 default:
854 t->pp_txformat = tx_table_le[MESA_FORMAT_RGB888].format;
855 t->pp_txfilter |= tx_table_le[MESA_FORMAT_RGB888].filter;
856 break;
857 case 2:
858 t->pp_txformat = tx_table_le[MESA_FORMAT_RGB565].format;
859 t->pp_txfilter |= tx_table_le[MESA_FORMAT_RGB565].filter;
860 break;
861 }
862 t->pp_txsize = ((rb->base.Width - 1) << RADEON_TEX_USIZE_SHIFT)
863 | ((rb->base.Height - 1) << RADEON_TEX_VSIZE_SHIFT);
864 t->pp_txformat |= R200_TXFORMAT_NON_POWER2;
865 t->pp_txpitch = pitch_val;
866 t->pp_txpitch -= 32;
867
868 t->validated = GL_TRUE;
869 _mesa_unlock_texture(radeon->glCtx, texObj);
870 return;
871 }
872
873
874 void r200SetTexBuffer(__DRIcontext *pDRICtx, GLint target, __DRIdrawable *dPriv)
875 {
876 r200SetTexBuffer2(pDRICtx, target, GLX_TEXTURE_FORMAT_RGBA_EXT, dPriv);
877 }
878
879
880 #define REF_COLOR 1
881 #define REF_ALPHA 2
882
883 static GLboolean r200UpdateAllTexEnv( GLcontext *ctx )
884 {
885 r200ContextPtr rmesa = R200_CONTEXT(ctx);
886 GLint i, j, currslot;
887 GLint maxunitused = -1;
888 GLboolean texregfree[6] = {GL_TRUE, GL_TRUE, GL_TRUE, GL_TRUE, GL_TRUE, GL_TRUE};
889 GLubyte stageref[7] = {0, 0, 0, 0, 0, 0, 0};
890 GLint nextunit[R200_MAX_TEXTURE_UNITS] = {0, 0, 0, 0, 0, 0};
891 GLint currentnext = -1;
892 GLboolean ok;
893
894 /* find highest used unit */
895 for ( j = 0; j < R200_MAX_TEXTURE_UNITS; j++) {
896 if (ctx->Texture.Unit[j]._ReallyEnabled) {
897 maxunitused = j;
898 }
899 }
900 stageref[maxunitused + 1] = REF_COLOR | REF_ALPHA;
901
902 for ( j = maxunitused; j >= 0; j-- ) {
903 const struct gl_texture_unit *texUnit = &ctx->Texture.Unit[j];
904
905 rmesa->state.texture.unit[j].outputreg = -1;
906
907 if (stageref[j + 1]) {
908
909 /* use the lowest available reg. That gets us automatically reg0 for the last stage.
910 need this even for disabled units, as it may get referenced due to the replace
911 optimization */
912 for ( i = 0 ; i < R200_MAX_TEXTURE_UNITS; i++ ) {
913 if (texregfree[i]) {
914 rmesa->state.texture.unit[j].outputreg = i;
915 break;
916 }
917 }
918 if (rmesa->state.texture.unit[j].outputreg == -1) {
919 /* no more free regs we can use. Need a fallback :-( */
920 return GL_FALSE;
921 }
922
923 nextunit[j] = currentnext;
924
925 if (!texUnit->_ReallyEnabled) {
926 /* the not enabled stages are referenced "indirectly",
927 must not cut off the lower stages */
928 stageref[j] = REF_COLOR | REF_ALPHA;
929 continue;
930 }
931 currentnext = j;
932
933 const GLuint numColorArgs = texUnit->_CurrentCombine->_NumArgsRGB;
934 const GLuint numAlphaArgs = texUnit->_CurrentCombine->_NumArgsA;
935 const GLboolean isdot3rgba = (texUnit->_CurrentCombine->ModeRGB == GL_DOT3_RGBA) ||
936 (texUnit->_CurrentCombine->ModeRGB == GL_DOT3_RGBA_EXT);
937
938
939 /* check if we need the color part, special case for dot3_rgba
940 as if only the alpha part is referenced later on it still is using the color part */
941 if ((stageref[j + 1] & REF_COLOR) || isdot3rgba) {
942 for ( i = 0 ; i < numColorArgs ; i++ ) {
943 const GLuint srcRGBi = texUnit->_CurrentCombine->SourceRGB[i];
944 const GLuint op = texUnit->_CurrentCombine->OperandRGB[i];
945 switch ( srcRGBi ) {
946 case GL_PREVIOUS:
947 /* op 0/1 are referencing color, op 2/3 alpha */
948 stageref[j] |= (op >> 1) + 1;
949 break;
950 case GL_TEXTURE:
951 texregfree[j] = GL_FALSE;
952 break;
953 case GL_TEXTURE0:
954 case GL_TEXTURE1:
955 case GL_TEXTURE2:
956 case GL_TEXTURE3:
957 case GL_TEXTURE4:
958 case GL_TEXTURE5:
959 texregfree[srcRGBi - GL_TEXTURE0] = GL_FALSE;
960 break;
961 default: /* don't care about other sources here */
962 break;
963 }
964 }
965 }
966
967 /* alpha args are ignored for dot3_rgba */
968 if ((stageref[j + 1] & REF_ALPHA) && !isdot3rgba) {
969
970 for ( i = 0 ; i < numAlphaArgs ; i++ ) {
971 const GLuint srcAi = texUnit->_CurrentCombine->SourceA[i];
972 switch ( srcAi ) {
973 case GL_PREVIOUS:
974 stageref[j] |= REF_ALPHA;
975 break;
976 case GL_TEXTURE:
977 texregfree[j] = GL_FALSE;
978 break;
979 case GL_TEXTURE0:
980 case GL_TEXTURE1:
981 case GL_TEXTURE2:
982 case GL_TEXTURE3:
983 case GL_TEXTURE4:
984 case GL_TEXTURE5:
985 texregfree[srcAi - GL_TEXTURE0] = GL_FALSE;
986 break;
987 default: /* don't care about other sources here */
988 break;
989 }
990 }
991 }
992 }
993 }
994
995 /* don't enable texture sampling for units if the result is not used */
996 for (i = 0; i < R200_MAX_TEXTURE_UNITS; i++) {
997 if (ctx->Texture.Unit[i]._ReallyEnabled && !texregfree[i])
998 rmesa->state.texture.unit[i].unitneeded = ctx->Texture.Unit[i]._ReallyEnabled;
999 else rmesa->state.texture.unit[i].unitneeded = 0;
1000 }
1001
1002 ok = GL_TRUE;
1003 currslot = 0;
1004 rmesa->state.envneeded = 1;
1005
1006 i = 0;
1007 while ((i <= maxunitused) && (i >= 0)) {
1008 /* only output instruction if the results are referenced */
1009 if (ctx->Texture.Unit[i]._ReallyEnabled && stageref[i+1]) {
1010 GLuint replaceunit = i;
1011 /* try to optimize GL_REPLACE away (only one level deep though) */
1012 if ( (ctx->Texture.Unit[i]._CurrentCombine->ModeRGB == GL_REPLACE) &&
1013 (ctx->Texture.Unit[i]._CurrentCombine->ModeA == GL_REPLACE) &&
1014 (ctx->Texture.Unit[i]._CurrentCombine->ScaleShiftRGB == 0) &&
1015 (ctx->Texture.Unit[i]._CurrentCombine->ScaleShiftA == 0) &&
1016 (nextunit[i] > 0) ) {
1017 /* yippie! can optimize it away! */
1018 replaceunit = i;
1019 i = nextunit[i];
1020 }
1021
1022 /* need env instruction slot */
1023 rmesa->state.envneeded |= 1 << currslot;
1024 ok = r200UpdateTextureEnv( ctx, i, currslot, replaceunit );
1025 if (!ok) return GL_FALSE;
1026 currslot++;
1027 }
1028 i = i + 1;
1029 }
1030
1031 if (currslot == 0) {
1032 /* need one stage at least */
1033 rmesa->state.texture.unit[0].outputreg = 0;
1034 ok = r200UpdateTextureEnv( ctx, 0, 0, 0 );
1035 }
1036
1037 R200_STATECHANGE( rmesa, ctx );
1038 rmesa->hw.ctx.cmd[CTX_PP_CNTL] &= ~(R200_TEX_BLEND_ENABLE_MASK | R200_MULTI_PASS_ENABLE);
1039 rmesa->hw.ctx.cmd[CTX_PP_CNTL] |= rmesa->state.envneeded << R200_TEX_BLEND_0_ENABLE_SHIFT;
1040
1041 return ok;
1042 }
1043
1044 #undef REF_COLOR
1045 #undef REF_ALPHA
1046
1047
1048 #define TEXOBJ_TXFILTER_MASK (R200_MAX_MIP_LEVEL_MASK | \
1049 R200_MIN_FILTER_MASK | \
1050 R200_MAG_FILTER_MASK | \
1051 R200_MAX_ANISO_MASK | \
1052 R200_YUV_TO_RGB | \
1053 R200_YUV_TEMPERATURE_MASK | \
1054 R200_CLAMP_S_MASK | \
1055 R200_CLAMP_T_MASK | \
1056 R200_BORDER_MODE_D3D )
1057
1058 #define TEXOBJ_TXFORMAT_MASK (R200_TXFORMAT_WIDTH_MASK | \
1059 R200_TXFORMAT_HEIGHT_MASK | \
1060 R200_TXFORMAT_FORMAT_MASK | \
1061 R200_TXFORMAT_F5_WIDTH_MASK | \
1062 R200_TXFORMAT_F5_HEIGHT_MASK | \
1063 R200_TXFORMAT_ALPHA_IN_MAP | \
1064 R200_TXFORMAT_CUBIC_MAP_ENABLE | \
1065 R200_TXFORMAT_NON_POWER2)
1066
1067 #define TEXOBJ_TXFORMAT_X_MASK (R200_DEPTH_LOG2_MASK | \
1068 R200_TEXCOORD_MASK | \
1069 R200_CLAMP_Q_MASK | \
1070 R200_VOLUME_FILTER_MASK)
1071
1072
1073 static void disable_tex_obj_state( r200ContextPtr rmesa,
1074 int unit )
1075 {
1076
1077 R200_STATECHANGE( rmesa, vtx );
1078 rmesa->hw.vtx.cmd[VTX_TCL_OUTPUT_VTXFMT_1] &= ~(7 << (unit * 3));
1079
1080 R200_STATECHANGE( rmesa, ctx );
1081 rmesa->hw.ctx.cmd[CTX_PP_CNTL] &= ~(R200_TEX_0_ENABLE << unit);
1082 if (rmesa->radeon.TclFallback & (R200_TCL_FALLBACK_TEXGEN_0<<unit)) {
1083 TCL_FALLBACK( rmesa->radeon.glCtx, (R200_TCL_FALLBACK_TEXGEN_0<<unit), GL_FALSE);
1084 }
1085
1086 /* Actually want to keep all units less than max active texture
1087 * enabled, right? Fix this for >2 texunits.
1088 */
1089
1090 {
1091 GLuint tmp = rmesa->TexGenEnabled;
1092
1093 rmesa->TexGenEnabled &= ~(R200_TEXGEN_TEXMAT_0_ENABLE<<unit);
1094 rmesa->TexGenEnabled &= ~(R200_TEXMAT_0_ENABLE<<unit);
1095 rmesa->TexGenNeedNormals[unit] = GL_FALSE;
1096 rmesa->TexGenCompSel &= ~(R200_OUTPUT_TEX_0 << unit);
1097
1098 if (tmp != rmesa->TexGenEnabled) {
1099 rmesa->recheck_texgen[unit] = GL_TRUE;
1100 rmesa->radeon.NewGLState |= _NEW_TEXTURE_MATRIX;
1101 }
1102 }
1103 }
1104 static void import_tex_obj_state( r200ContextPtr rmesa,
1105 int unit,
1106 radeonTexObjPtr texobj )
1107 {
1108 /* do not use RADEON_DB_STATE to avoid stale texture caches */
1109 GLuint *cmd = &rmesa->hw.tex[unit].cmd[TEX_CMD_0];
1110
1111 R200_STATECHANGE( rmesa, tex[unit] );
1112
1113 cmd[TEX_PP_TXFILTER] &= ~TEXOBJ_TXFILTER_MASK;
1114 cmd[TEX_PP_TXFILTER] |= texobj->pp_txfilter & TEXOBJ_TXFILTER_MASK;
1115 cmd[TEX_PP_TXFORMAT] &= ~TEXOBJ_TXFORMAT_MASK;
1116 cmd[TEX_PP_TXFORMAT] |= texobj->pp_txformat & TEXOBJ_TXFORMAT_MASK;
1117 cmd[TEX_PP_TXFORMAT_X] &= ~TEXOBJ_TXFORMAT_X_MASK;
1118 cmd[TEX_PP_TXFORMAT_X] |= texobj->pp_txformat_x & TEXOBJ_TXFORMAT_X_MASK;
1119 cmd[TEX_PP_TXSIZE] = texobj->pp_txsize; /* NPOT only! */
1120 cmd[TEX_PP_TXPITCH] = texobj->pp_txpitch; /* NPOT only! */
1121 cmd[TEX_PP_BORDER_COLOR] = texobj->pp_border_color;
1122
1123 if (texobj->base.Target == GL_TEXTURE_CUBE_MAP) {
1124 GLuint *cube_cmd = &rmesa->hw.cube[unit].cmd[CUBE_CMD_0];
1125
1126 R200_STATECHANGE( rmesa, cube[unit] );
1127 cube_cmd[CUBE_PP_CUBIC_FACES] = texobj->pp_cubic_faces;
1128 if (rmesa->radeon.radeonScreen->drmSupportsFragShader) {
1129 /* that value is submitted twice. could change cube atom
1130 to not include that command when new drm is used */
1131 cmd[TEX_PP_CUBIC_FACES] = texobj->pp_cubic_faces;
1132 }
1133 }
1134
1135 }
1136
1137 static void set_texgen_matrix( r200ContextPtr rmesa,
1138 GLuint unit,
1139 const GLfloat *s_plane,
1140 const GLfloat *t_plane,
1141 const GLfloat *r_plane,
1142 const GLfloat *q_plane )
1143 {
1144 GLfloat m[16];
1145
1146 m[0] = s_plane[0];
1147 m[4] = s_plane[1];
1148 m[8] = s_plane[2];
1149 m[12] = s_plane[3];
1150
1151 m[1] = t_plane[0];
1152 m[5] = t_plane[1];
1153 m[9] = t_plane[2];
1154 m[13] = t_plane[3];
1155
1156 m[2] = r_plane[0];
1157 m[6] = r_plane[1];
1158 m[10] = r_plane[2];
1159 m[14] = r_plane[3];
1160
1161 m[3] = q_plane[0];
1162 m[7] = q_plane[1];
1163 m[11] = q_plane[2];
1164 m[15] = q_plane[3];
1165
1166 _math_matrix_loadf( &(rmesa->TexGenMatrix[unit]), m);
1167 _math_matrix_analyse( &(rmesa->TexGenMatrix[unit]) );
1168 rmesa->TexGenEnabled |= R200_TEXMAT_0_ENABLE<<unit;
1169 }
1170
1171
1172 static GLuint r200_need_dis_texgen(const GLbitfield texGenEnabled,
1173 const GLfloat *planeS,
1174 const GLfloat *planeT,
1175 const GLfloat *planeR,
1176 const GLfloat *planeQ)
1177 {
1178 GLuint needtgenable = 0;
1179
1180 if (!(texGenEnabled & S_BIT)) {
1181 if (((texGenEnabled & T_BIT) && planeT[0] != 0.0) ||
1182 ((texGenEnabled & R_BIT) && planeR[0] != 0.0) ||
1183 ((texGenEnabled & Q_BIT) && planeQ[0] != 0.0)) {
1184 needtgenable |= S_BIT;
1185 }
1186 }
1187 if (!(texGenEnabled & T_BIT)) {
1188 if (((texGenEnabled & S_BIT) && planeS[1] != 0.0) ||
1189 ((texGenEnabled & R_BIT) && planeR[1] != 0.0) ||
1190 ((texGenEnabled & Q_BIT) && planeQ[1] != 0.0)) {
1191 needtgenable |= T_BIT;
1192 }
1193 }
1194 if (!(texGenEnabled & R_BIT)) {
1195 if (((texGenEnabled & S_BIT) && planeS[2] != 0.0) ||
1196 ((texGenEnabled & T_BIT) && planeT[2] != 0.0) ||
1197 ((texGenEnabled & Q_BIT) && planeQ[2] != 0.0)) {
1198 needtgenable |= R_BIT;
1199 }
1200 }
1201 if (!(texGenEnabled & Q_BIT)) {
1202 if (((texGenEnabled & S_BIT) && planeS[3] != 0.0) ||
1203 ((texGenEnabled & T_BIT) && planeT[3] != 0.0) ||
1204 ((texGenEnabled & R_BIT) && planeR[3] != 0.0)) {
1205 needtgenable |= Q_BIT;
1206 }
1207 }
1208
1209 return needtgenable;
1210 }
1211
1212
1213 /*
1214 * Returns GL_FALSE if fallback required.
1215 */
1216 static GLboolean r200_validate_texgen( GLcontext *ctx, GLuint unit )
1217 {
1218 r200ContextPtr rmesa = R200_CONTEXT(ctx);
1219 const struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
1220 GLuint inputshift = R200_TEXGEN_0_INPUT_SHIFT + unit*4;
1221 GLuint tgi, tgcm;
1222 GLuint mode = 0;
1223 GLboolean mixed_fallback = GL_FALSE;
1224 static const GLfloat I[16] = {
1225 1, 0, 0, 0,
1226 0, 1, 0, 0,
1227 0, 0, 1, 0,
1228 0, 0, 0, 1 };
1229 static const GLfloat reflect[16] = {
1230 -1, 0, 0, 0,
1231 0, -1, 0, 0,
1232 0, 0, -1, 0,
1233 0, 0, 0, 1 };
1234
1235 rmesa->TexGenCompSel &= ~(R200_OUTPUT_TEX_0 << unit);
1236 rmesa->TexGenEnabled &= ~(R200_TEXGEN_TEXMAT_0_ENABLE<<unit);
1237 rmesa->TexGenEnabled &= ~(R200_TEXMAT_0_ENABLE<<unit);
1238 rmesa->TexGenNeedNormals[unit] = GL_FALSE;
1239 tgi = rmesa->hw.tcg.cmd[TCG_TEX_PROC_CTL_1] & ~(R200_TEXGEN_INPUT_MASK <<
1240 inputshift);
1241 tgcm = rmesa->hw.tcg.cmd[TCG_TEX_PROC_CTL_2] & ~(R200_TEXGEN_COMP_MASK <<
1242 (unit * 4));
1243
1244 if (0)
1245 fprintf(stderr, "%s unit %d\n", __FUNCTION__, unit);
1246
1247 if (texUnit->TexGenEnabled & S_BIT) {
1248 mode = texUnit->GenS.Mode;
1249 } else {
1250 tgcm |= R200_TEXGEN_COMP_S << (unit * 4);
1251 }
1252
1253 if (texUnit->TexGenEnabled & T_BIT) {
1254 if (texUnit->GenT.Mode != mode)
1255 mixed_fallback = GL_TRUE;
1256 } else {
1257 tgcm |= R200_TEXGEN_COMP_T << (unit * 4);
1258 }
1259 if (texUnit->TexGenEnabled & R_BIT) {
1260 if (texUnit->GenR.Mode != mode)
1261 mixed_fallback = GL_TRUE;
1262 } else {
1263 tgcm |= R200_TEXGEN_COMP_R << (unit * 4);
1264 }
1265
1266 if (texUnit->TexGenEnabled & Q_BIT) {
1267 if (texUnit->GenQ.Mode != mode)
1268 mixed_fallback = GL_TRUE;
1269 } else {
1270 tgcm |= R200_TEXGEN_COMP_Q << (unit * 4);
1271 }
1272
1273 if (mixed_fallback) {
1274 if (R200_DEBUG & RADEON_FALLBACKS)
1275 fprintf(stderr, "fallback mixed texgen, 0x%x (0x%x 0x%x 0x%x 0x%x)\n",
1276 texUnit->TexGenEnabled, texUnit->GenS.Mode, texUnit->GenT.Mode,
1277 texUnit->GenR.Mode, texUnit->GenQ.Mode);
1278 return GL_FALSE;
1279 }
1280
1281 /* we CANNOT do mixed mode if the texgen mode requires a plane where the input
1282 is not enabled for texgen, since the planes are concatenated into texmat,
1283 and thus the input will come from texcoord rather than tex gen equation!
1284 Either fallback or just hope that those texcoords aren't really needed...
1285 Assuming the former will cause lots of unnecessary fallbacks, the latter will
1286 generate bogus results sometimes - it's pretty much impossible to really know
1287 when a fallback is needed, depends on texmat and what sort of texture is bound
1288 etc, - for now fallback if we're missing either S or T bits, there's a high
1289 probability we need the texcoords in that case.
1290 That's a lot of work for some obscure texgen mixed mode fixup - why oh why
1291 doesn't the chip just directly accept the plane parameters :-(. */
1292 switch (mode) {
1293 case GL_OBJECT_LINEAR: {
1294 GLuint needtgenable = r200_need_dis_texgen( texUnit->TexGenEnabled,
1295 texUnit->GenS.ObjectPlane,
1296 texUnit->GenT.ObjectPlane,
1297 texUnit->GenR.ObjectPlane,
1298 texUnit->GenQ.ObjectPlane );
1299 if (needtgenable & (S_BIT | T_BIT)) {
1300 if (R200_DEBUG & RADEON_FALLBACKS)
1301 fprintf(stderr, "fallback mixed texgen / obj plane, 0x%x\n",
1302 texUnit->TexGenEnabled);
1303 return GL_FALSE;
1304 }
1305 if (needtgenable & (R_BIT)) {
1306 tgcm &= ~(R200_TEXGEN_COMP_R << (unit * 4));
1307 }
1308 if (needtgenable & (Q_BIT)) {
1309 tgcm &= ~(R200_TEXGEN_COMP_Q << (unit * 4));
1310 }
1311
1312 tgi |= R200_TEXGEN_INPUT_OBJ << inputshift;
1313 set_texgen_matrix( rmesa, unit,
1314 (texUnit->TexGenEnabled & S_BIT) ? texUnit->GenS.ObjectPlane : I,
1315 (texUnit->TexGenEnabled & T_BIT) ? texUnit->GenT.ObjectPlane : I + 4,
1316 (texUnit->TexGenEnabled & R_BIT) ? texUnit->GenR.ObjectPlane : I + 8,
1317 (texUnit->TexGenEnabled & Q_BIT) ? texUnit->GenQ.ObjectPlane : I + 12);
1318 }
1319 break;
1320
1321 case GL_EYE_LINEAR: {
1322 GLuint needtgenable = r200_need_dis_texgen( texUnit->TexGenEnabled,
1323 texUnit->GenS.EyePlane,
1324 texUnit->GenT.EyePlane,
1325 texUnit->GenR.EyePlane,
1326 texUnit->GenQ.EyePlane );
1327 if (needtgenable & (S_BIT | T_BIT)) {
1328 if (R200_DEBUG & RADEON_FALLBACKS)
1329 fprintf(stderr, "fallback mixed texgen / eye plane, 0x%x\n",
1330 texUnit->TexGenEnabled);
1331 return GL_FALSE;
1332 }
1333 if (needtgenable & (R_BIT)) {
1334 tgcm &= ~(R200_TEXGEN_COMP_R << (unit * 4));
1335 }
1336 if (needtgenable & (Q_BIT)) {
1337 tgcm &= ~(R200_TEXGEN_COMP_Q << (unit * 4));
1338 }
1339 tgi |= R200_TEXGEN_INPUT_EYE << inputshift;
1340 set_texgen_matrix( rmesa, unit,
1341 (texUnit->TexGenEnabled & S_BIT) ? texUnit->GenS.EyePlane : I,
1342 (texUnit->TexGenEnabled & T_BIT) ? texUnit->GenT.EyePlane : I + 4,
1343 (texUnit->TexGenEnabled & R_BIT) ? texUnit->GenR.EyePlane : I + 8,
1344 (texUnit->TexGenEnabled & Q_BIT) ? texUnit->GenQ.EyePlane : I + 12);
1345 }
1346 break;
1347
1348 case GL_REFLECTION_MAP_NV:
1349 rmesa->TexGenNeedNormals[unit] = GL_TRUE;
1350 tgi |= R200_TEXGEN_INPUT_EYE_REFLECT << inputshift;
1351 /* pretty weird, must only negate when lighting is enabled? */
1352 if (ctx->Light.Enabled)
1353 set_texgen_matrix( rmesa, unit,
1354 (texUnit->TexGenEnabled & S_BIT) ? reflect : I,
1355 (texUnit->TexGenEnabled & T_BIT) ? reflect + 4 : I + 4,
1356 (texUnit->TexGenEnabled & R_BIT) ? reflect + 8 : I + 8,
1357 I + 12);
1358 break;
1359
1360 case GL_NORMAL_MAP_NV:
1361 rmesa->TexGenNeedNormals[unit] = GL_TRUE;
1362 tgi |= R200_TEXGEN_INPUT_EYE_NORMAL<<inputshift;
1363 break;
1364
1365 case GL_SPHERE_MAP:
1366 rmesa->TexGenNeedNormals[unit] = GL_TRUE;
1367 tgi |= R200_TEXGEN_INPUT_SPHERE<<inputshift;
1368 break;
1369
1370 case 0:
1371 /* All texgen units were disabled, so just pass coords through. */
1372 tgi |= unit << inputshift;
1373 break;
1374
1375 default:
1376 /* Unsupported mode, fallback:
1377 */
1378 if (R200_DEBUG & RADEON_FALLBACKS)
1379 fprintf(stderr, "fallback unsupported texgen, %d\n",
1380 texUnit->GenS.Mode);
1381 return GL_FALSE;
1382 }
1383
1384 rmesa->TexGenEnabled |= R200_TEXGEN_TEXMAT_0_ENABLE << unit;
1385 rmesa->TexGenCompSel |= R200_OUTPUT_TEX_0 << unit;
1386
1387 if (tgi != rmesa->hw.tcg.cmd[TCG_TEX_PROC_CTL_1] ||
1388 tgcm != rmesa->hw.tcg.cmd[TCG_TEX_PROC_CTL_2])
1389 {
1390 R200_STATECHANGE(rmesa, tcg);
1391 rmesa->hw.tcg.cmd[TCG_TEX_PROC_CTL_1] = tgi;
1392 rmesa->hw.tcg.cmd[TCG_TEX_PROC_CTL_2] = tgcm;
1393 }
1394
1395 return GL_TRUE;
1396 }
1397
1398 void set_re_cntl_d3d( GLcontext *ctx, int unit, GLboolean use_d3d )
1399 {
1400 r200ContextPtr rmesa = R200_CONTEXT(ctx);
1401
1402 GLuint re_cntl;
1403
1404 re_cntl = rmesa->hw.set.cmd[SET_RE_CNTL] & ~(R200_VTX_STQ0_D3D << (2 * unit));
1405 if (use_d3d)
1406 re_cntl |= R200_VTX_STQ0_D3D << (2 * unit);
1407
1408 if ( re_cntl != rmesa->hw.set.cmd[SET_RE_CNTL] ) {
1409 R200_STATECHANGE( rmesa, set );
1410 rmesa->hw.set.cmd[SET_RE_CNTL] = re_cntl;
1411 }
1412 }
1413
1414 /**
1415 * Compute the cached hardware register values for the given texture object.
1416 *
1417 * \param rmesa Context pointer
1418 * \param t the r300 texture object
1419 */
1420 static void setup_hardware_state(r200ContextPtr rmesa, radeonTexObj *t)
1421 {
1422 const struct gl_texture_image *firstImage = t->base.Image[0][t->minLod];
1423 GLint log2Width, log2Height, log2Depth, texelBytes;
1424
1425 if ( t->bo ) {
1426 return;
1427 }
1428
1429 log2Width = firstImage->WidthLog2;
1430 log2Height = firstImage->HeightLog2;
1431 log2Depth = firstImage->DepthLog2;
1432 texelBytes = _mesa_get_format_bytes(firstImage->TexFormat);
1433
1434
1435 if (!t->image_override) {
1436 if (VALID_FORMAT(firstImage->TexFormat)) {
1437 const struct tx_table *table = _mesa_little_endian() ? tx_table_le :
1438 tx_table_be;
1439
1440 t->pp_txformat &= ~(R200_TXFORMAT_FORMAT_MASK |
1441 R200_TXFORMAT_ALPHA_IN_MAP);
1442 t->pp_txfilter &= ~R200_YUV_TO_RGB;
1443
1444 t->pp_txformat |= table[ firstImage->TexFormat ].format;
1445 t->pp_txfilter |= table[ firstImage->TexFormat ].filter;
1446 } else {
1447 _mesa_problem(NULL, "unexpected texture format in %s",
1448 __FUNCTION__);
1449 return;
1450 }
1451 }
1452
1453 t->pp_txfilter &= ~R200_MAX_MIP_LEVEL_MASK;
1454 t->pp_txfilter |= (t->maxLod - t->minLod) << R200_MAX_MIP_LEVEL_SHIFT;
1455
1456 t->pp_txformat &= ~(R200_TXFORMAT_WIDTH_MASK |
1457 R200_TXFORMAT_HEIGHT_MASK |
1458 R200_TXFORMAT_CUBIC_MAP_ENABLE |
1459 R200_TXFORMAT_F5_WIDTH_MASK |
1460 R200_TXFORMAT_F5_HEIGHT_MASK);
1461 t->pp_txformat |= ((log2Width << R200_TXFORMAT_WIDTH_SHIFT) |
1462 (log2Height << R200_TXFORMAT_HEIGHT_SHIFT));
1463
1464 t->tile_bits = 0;
1465
1466 t->pp_txformat_x &= ~(R200_DEPTH_LOG2_MASK | R200_TEXCOORD_MASK);
1467 if (t->base.Target == GL_TEXTURE_3D) {
1468 t->pp_txformat_x |= (log2Depth << R200_DEPTH_LOG2_SHIFT);
1469 t->pp_txformat_x |= R200_TEXCOORD_VOLUME;
1470
1471 }
1472 else if (t->base.Target == GL_TEXTURE_CUBE_MAP) {
1473 ASSERT(log2Width == log2Height);
1474 t->pp_txformat |= ((log2Width << R200_TXFORMAT_F5_WIDTH_SHIFT) |
1475 (log2Height << R200_TXFORMAT_F5_HEIGHT_SHIFT) |
1476 /* don't think we need this bit, if it exists at all - fglrx does not set it */
1477 (R200_TXFORMAT_CUBIC_MAP_ENABLE));
1478 t->pp_txformat_x |= R200_TEXCOORD_CUBIC_ENV;
1479 t->pp_cubic_faces = ((log2Width << R200_FACE_WIDTH_1_SHIFT) |
1480 (log2Height << R200_FACE_HEIGHT_1_SHIFT) |
1481 (log2Width << R200_FACE_WIDTH_2_SHIFT) |
1482 (log2Height << R200_FACE_HEIGHT_2_SHIFT) |
1483 (log2Width << R200_FACE_WIDTH_3_SHIFT) |
1484 (log2Height << R200_FACE_HEIGHT_3_SHIFT) |
1485 (log2Width << R200_FACE_WIDTH_4_SHIFT) |
1486 (log2Height << R200_FACE_HEIGHT_4_SHIFT));
1487 }
1488 else {
1489 /* If we don't in fact send enough texture coordinates, q will be 1,
1490 * making TEXCOORD_PROJ act like TEXCOORD_NONPROJ (Right?)
1491 */
1492 t->pp_txformat_x |= R200_TEXCOORD_PROJ;
1493 }
1494
1495 t->pp_txsize = (((firstImage->Width - 1) << R200_PP_TX_WIDTHMASK_SHIFT)
1496 | ((firstImage->Height - 1) << R200_PP_TX_HEIGHTMASK_SHIFT));
1497
1498 if ( !t->image_override ) {
1499 if (_mesa_is_format_compressed(firstImage->TexFormat))
1500 t->pp_txpitch = (firstImage->Width + 63) & ~(63);
1501 else
1502 t->pp_txpitch = ((firstImage->Width * texelBytes) + 63) & ~(63);
1503 t->pp_txpitch -= 32;
1504 }
1505
1506 if (t->base.Target == GL_TEXTURE_RECTANGLE_NV) {
1507 t->pp_txformat |= R200_TXFORMAT_NON_POWER2;
1508 }
1509
1510 }
1511
1512 static GLboolean r200_validate_texture(GLcontext *ctx, struct gl_texture_object *texObj, int unit)
1513 {
1514 r200ContextPtr rmesa = R200_CONTEXT(ctx);
1515 radeonTexObj *t = radeon_tex_obj(texObj);
1516
1517 if (!radeon_validate_texture_miptree(ctx, texObj))
1518 return GL_FALSE;
1519
1520 r200_validate_texgen(ctx, unit);
1521 /* Configure the hardware registers (more precisely, the cached version
1522 * of the hardware registers). */
1523 setup_hardware_state(rmesa, t);
1524
1525 if (texObj->Target == GL_TEXTURE_RECTANGLE_NV ||
1526 texObj->Target == GL_TEXTURE_2D ||
1527 texObj->Target == GL_TEXTURE_1D)
1528 set_re_cntl_d3d( ctx, unit, GL_FALSE );
1529 else
1530 set_re_cntl_d3d( ctx, unit, GL_TRUE );
1531 R200_STATECHANGE( rmesa, ctx );
1532 rmesa->hw.ctx.cmd[CTX_PP_CNTL] |= R200_TEX_0_ENABLE << unit;
1533
1534 R200_STATECHANGE( rmesa, vtx );
1535 rmesa->hw.vtx.cmd[VTX_TCL_OUTPUT_VTXFMT_1] &= ~(7 << (unit * 3));
1536 rmesa->hw.vtx.cmd[VTX_TCL_OUTPUT_VTXFMT_1] |= 4 << (unit * 3);
1537
1538 rmesa->recheck_texgen[unit] = GL_TRUE;
1539 import_tex_obj_state( rmesa, unit, t );
1540
1541 if (rmesa->recheck_texgen[unit]) {
1542 GLboolean fallback = !r200_validate_texgen( ctx, unit );
1543 TCL_FALLBACK( ctx, (R200_TCL_FALLBACK_TEXGEN_0<<unit), fallback);
1544 rmesa->recheck_texgen[unit] = 0;
1545 rmesa->radeon.NewGLState |= _NEW_TEXTURE_MATRIX;
1546 }
1547
1548 t->validated = GL_TRUE;
1549
1550 FALLBACK( rmesa, RADEON_FALLBACK_BORDER_MODE, t->border_fallback );
1551
1552 return !t->border_fallback;
1553 }
1554
1555 static GLboolean r200UpdateTextureUnit(GLcontext *ctx, int unit)
1556 {
1557 r200ContextPtr rmesa = R200_CONTEXT(ctx);
1558 GLuint unitneeded = rmesa->state.texture.unit[unit].unitneeded;
1559
1560 if (!unitneeded) {
1561 /* disable the unit */
1562 disable_tex_obj_state(rmesa, unit);
1563 return GL_TRUE;
1564 }
1565
1566 if (!r200_validate_texture(ctx, ctx->Texture.Unit[unit]._Current, unit)) {
1567 _mesa_warning(ctx,
1568 "failed to validate texture for unit %d.\n",
1569 unit);
1570 rmesa->state.texture.unit[unit].texobj = NULL;
1571 return GL_FALSE;
1572 }
1573
1574 rmesa->state.texture.unit[unit].texobj = radeon_tex_obj(ctx->Texture.Unit[unit]._Current);
1575 return GL_TRUE;
1576 }
1577
1578
1579 void r200UpdateTextureState( GLcontext *ctx )
1580 {
1581 r200ContextPtr rmesa = R200_CONTEXT(ctx);
1582 GLboolean ok;
1583 GLuint dbg;
1584
1585 /* NOTE: must not manipulate rmesa->state.texture.unit[].unitneeded or
1586 rmesa->state.envneeded before a R200_STATECHANGE (or R200_NEWPRIM) since
1587 we use these to determine if we want to emit the corresponding state
1588 atoms. */
1589 R200_NEWPRIM( rmesa );
1590
1591 if (ctx->ATIFragmentShader._Enabled) {
1592 GLuint i;
1593 for (i = 0; i < R200_MAX_TEXTURE_UNITS; i++) {
1594 rmesa->state.texture.unit[i].unitneeded = ctx->Texture.Unit[i]._ReallyEnabled;
1595 }
1596 ok = GL_TRUE;
1597 }
1598 else {
1599 ok = r200UpdateAllTexEnv( ctx );
1600 }
1601 if (ok) {
1602 ok = (r200UpdateTextureUnit( ctx, 0 ) &&
1603 r200UpdateTextureUnit( ctx, 1 ) &&
1604 r200UpdateTextureUnit( ctx, 2 ) &&
1605 r200UpdateTextureUnit( ctx, 3 ) &&
1606 r200UpdateTextureUnit( ctx, 4 ) &&
1607 r200UpdateTextureUnit( ctx, 5 ));
1608 }
1609
1610 if (ok && ctx->ATIFragmentShader._Enabled) {
1611 r200UpdateFragmentShader(ctx);
1612 }
1613
1614 FALLBACK( rmesa, R200_FALLBACK_TEXTURE, !ok );
1615
1616 if (rmesa->radeon.TclFallback)
1617 r200ChooseVertexState( ctx );
1618
1619
1620 if (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R200) {
1621
1622 /*
1623 * T0 hang workaround -------------
1624 * not needed for r200 derivatives
1625 */
1626 if ((rmesa->hw.ctx.cmd[CTX_PP_CNTL] & R200_TEX_ENABLE_MASK) == R200_TEX_0_ENABLE &&
1627 (rmesa->hw.tex[0].cmd[TEX_PP_TXFILTER] & R200_MIN_FILTER_MASK) > R200_MIN_FILTER_LINEAR) {
1628
1629 R200_STATECHANGE(rmesa, ctx);
1630 R200_STATECHANGE(rmesa, tex[1]);
1631 rmesa->hw.ctx.cmd[CTX_PP_CNTL] |= R200_TEX_1_ENABLE;
1632 if (!(rmesa->hw.cst.cmd[CST_PP_CNTL_X] & R200_PPX_TEX_1_ENABLE))
1633 rmesa->hw.tex[1].cmd[TEX_PP_TXFORMAT] &= ~TEXOBJ_TXFORMAT_MASK;
1634 rmesa->hw.tex[1].cmd[TEX_PP_TXFORMAT] |= R200_TXFORMAT_LOOKUP_DISABLE;
1635 }
1636 else if (!ctx->ATIFragmentShader._Enabled) {
1637 if ((rmesa->hw.ctx.cmd[CTX_PP_CNTL] & R200_TEX_1_ENABLE) &&
1638 (rmesa->hw.tex[1].cmd[TEX_PP_TXFORMAT] & R200_TXFORMAT_LOOKUP_DISABLE)) {
1639 R200_STATECHANGE(rmesa, tex[1]);
1640 rmesa->hw.tex[1].cmd[TEX_PP_TXFORMAT] &= ~R200_TXFORMAT_LOOKUP_DISABLE;
1641 }
1642 }
1643 /* do the same workaround for the first pass of a fragment shader.
1644 * completely unknown if necessary / sufficient.
1645 */
1646 if ((rmesa->hw.cst.cmd[CST_PP_CNTL_X] & R200_PPX_TEX_ENABLE_MASK) == R200_PPX_TEX_0_ENABLE &&
1647 (rmesa->hw.tex[0].cmd[TEX_PP_TXFILTER] & R200_MIN_FILTER_MASK) > R200_MIN_FILTER_LINEAR) {
1648
1649 R200_STATECHANGE(rmesa, cst);
1650 R200_STATECHANGE(rmesa, tex[1]);
1651 rmesa->hw.cst.cmd[CST_PP_CNTL_X] |= R200_PPX_TEX_1_ENABLE;
1652 if (!(rmesa->hw.ctx.cmd[CTX_PP_CNTL] & R200_TEX_1_ENABLE))
1653 rmesa->hw.tex[1].cmd[TEX_PP_TXFORMAT] &= ~TEXOBJ_TXFORMAT_MASK;
1654 rmesa->hw.tex[1].cmd[TEX_PP_TXMULTI_CTL] |= R200_PASS1_TXFORMAT_LOOKUP_DISABLE;
1655 }
1656
1657 /* maybe needs to be done pairwise due to 2 parallel (physical) tex units ?
1658 looks like that's not the case, if 8500/9100 owners don't complain remove this...
1659 for ( i = 0; i < ctx->Const.MaxTextureUnits; i += 2) {
1660 if (((rmesa->hw.ctx.cmd[CTX_PP_CNTL] & ((R200_TEX_0_ENABLE |
1661 R200_TEX_1_ENABLE ) << i)) == (R200_TEX_0_ENABLE << i)) &&
1662 ((rmesa->hw.tex[i].cmd[TEX_PP_TXFILTER] & R200_MIN_FILTER_MASK) >
1663 R200_MIN_FILTER_LINEAR)) {
1664 R200_STATECHANGE(rmesa, ctx);
1665 R200_STATECHANGE(rmesa, tex[i+1]);
1666 rmesa->hw.ctx.cmd[CTX_PP_CNTL] |= (R200_TEX_1_ENABLE << i);
1667 rmesa->hw.tex[i+1].cmd[TEX_PP_TXFORMAT] &= ~TEXOBJ_TXFORMAT_MASK;
1668 rmesa->hw.tex[i+1].cmd[TEX_PP_TXFORMAT] |= 0x08000000;
1669 }
1670 else {
1671 if ((rmesa->hw.ctx.cmd[CTX_PP_CNTL] & (R200_TEX_1_ENABLE << i)) &&
1672 (rmesa->hw.tex[i+1].cmd[TEX_PP_TXFORMAT] & 0x08000000)) {
1673 R200_STATECHANGE(rmesa, tex[i+1]);
1674 rmesa->hw.tex[i+1].cmd[TEX_PP_TXFORMAT] &= ~0x08000000;
1675 }
1676 }
1677 } */
1678
1679 /*
1680 * Texture cache LRU hang workaround -------------
1681 * not needed for r200 derivatives
1682 * hopefully this covers first pass of a shader as well
1683 */
1684
1685 /* While the cases below attempt to only enable the workaround in the
1686 * specific cases necessary, they were insufficient. See bugzilla #1519,
1687 * #729, #814. Tests with quake3 showed no impact on performance.
1688 */
1689 dbg = 0x6;
1690
1691 /*
1692 if (((rmesa->hw.ctx.cmd[CTX_PP_CNTL] & (R200_TEX_0_ENABLE )) &&
1693 ((((rmesa->hw.tex[0].cmd[TEX_PP_TXFILTER] & R200_MIN_FILTER_MASK)) &
1694 0x04) == 0)) ||
1695 ((rmesa->hw.ctx.cmd[CTX_PP_CNTL] & R200_TEX_2_ENABLE) &&
1696 ((((rmesa->hw.tex[2].cmd[TEX_PP_TXFILTER] & R200_MIN_FILTER_MASK)) &
1697 0x04) == 0)) ||
1698 ((rmesa->hw.ctx.cmd[CTX_PP_CNTL] & R200_TEX_4_ENABLE) &&
1699 ((((rmesa->hw.tex[4].cmd[TEX_PP_TXFILTER] & R200_MIN_FILTER_MASK)) &
1700 0x04) == 0)))
1701 {
1702 dbg |= 0x02;
1703 }
1704
1705 if (((rmesa->hw.ctx.cmd[CTX_PP_CNTL] & (R200_TEX_1_ENABLE )) &&
1706 ((((rmesa->hw.tex[1].cmd[TEX_PP_TXFILTER] & R200_MIN_FILTER_MASK)) &
1707 0x04) == 0)) ||
1708 ((rmesa->hw.ctx.cmd[CTX_PP_CNTL] & R200_TEX_3_ENABLE) &&
1709 ((((rmesa->hw.tex[3].cmd[TEX_PP_TXFILTER] & R200_MIN_FILTER_MASK)) &
1710 0x04) == 0)) ||
1711 ((rmesa->hw.ctx.cmd[CTX_PP_CNTL] & R200_TEX_5_ENABLE) &&
1712 ((((rmesa->hw.tex[5].cmd[TEX_PP_TXFILTER] & R200_MIN_FILTER_MASK)) &
1713 0x04) == 0)))
1714 {
1715 dbg |= 0x04;
1716 }*/
1717
1718 if (dbg != rmesa->hw.tam.cmd[TAM_DEBUG3]) {
1719 R200_STATECHANGE( rmesa, tam );
1720 rmesa->hw.tam.cmd[TAM_DEBUG3] = dbg;
1721 if (0) printf("TEXCACHE LRU HANG WORKAROUND %x\n", dbg);
1722 }
1723 }
1724 }