r300/compiler: Implement hardware assisted loops for vertex shaders.
[mesa.git] / src / mesa / drivers / dri / r300 / compiler / r3xx_fragprog.c
1 /*
2 * Copyright 2009 Nicolai Hähnle <nhaehnle@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 #include "radeon_compiler.h"
24
25 #include <stdio.h>
26
27 #include "radeon_dataflow.h"
28 #include "radeon_emulate_branches.h"
29 #include "radeon_emulate_loops.h"
30 #include "radeon_program_alu.h"
31 #include "radeon_program_tex.h"
32 #include "radeon_rename_regs.h"
33 #include "r300_fragprog.h"
34 #include "r300_fragprog_swizzle.h"
35 #include "r500_fragprog.h"
36
37
38 static void dataflow_outputs_mark_use(void * userdata, void * data,
39 void (*callback)(void *, unsigned int, unsigned int))
40 {
41 struct r300_fragment_program_compiler * c = userdata;
42 callback(data, c->OutputColor[0], RC_MASK_XYZW);
43 callback(data, c->OutputColor[1], RC_MASK_XYZW);
44 callback(data, c->OutputColor[2], RC_MASK_XYZW);
45 callback(data, c->OutputColor[3], RC_MASK_XYZW);
46 callback(data, c->OutputDepth, RC_MASK_W);
47 }
48
49 static void rewrite_depth_out(struct r300_fragment_program_compiler * c)
50 {
51 struct rc_instruction *rci;
52
53 for (rci = c->Base.Program.Instructions.Next; rci != &c->Base.Program.Instructions; rci = rci->Next) {
54 struct rc_sub_instruction * inst = &rci->U.I;
55
56 if (inst->DstReg.File != RC_FILE_OUTPUT || inst->DstReg.Index != c->OutputDepth)
57 continue;
58
59 if (inst->DstReg.WriteMask & RC_MASK_Z) {
60 inst->DstReg.WriteMask = RC_MASK_W;
61 } else {
62 inst->DstReg.WriteMask = 0;
63 continue;
64 }
65
66 switch (inst->Opcode) {
67 case RC_OPCODE_FRC:
68 case RC_OPCODE_MOV:
69 inst->SrcReg[0] = lmul_swizzle(RC_SWIZZLE_ZZZZ, inst->SrcReg[0]);
70 break;
71 case RC_OPCODE_ADD:
72 case RC_OPCODE_MAX:
73 case RC_OPCODE_MIN:
74 case RC_OPCODE_MUL:
75 inst->SrcReg[0] = lmul_swizzle(RC_SWIZZLE_ZZZZ, inst->SrcReg[0]);
76 inst->SrcReg[1] = lmul_swizzle(RC_SWIZZLE_ZZZZ, inst->SrcReg[1]);
77 break;
78 case RC_OPCODE_CMP:
79 case RC_OPCODE_MAD:
80 inst->SrcReg[0] = lmul_swizzle(RC_SWIZZLE_ZZZZ, inst->SrcReg[0]);
81 inst->SrcReg[1] = lmul_swizzle(RC_SWIZZLE_ZZZZ, inst->SrcReg[1]);
82 inst->SrcReg[2] = lmul_swizzle(RC_SWIZZLE_ZZZZ, inst->SrcReg[2]);
83 break;
84 default:
85 // Scalar instructions needn't be reswizzled
86 break;
87 }
88 }
89 }
90
91 static void debug_program_log(struct r300_fragment_program_compiler* c, const char * where)
92 {
93 if (c->Base.Debug) {
94 fprintf(stderr, "Fragment Program: %s\n", where);
95 rc_print_program(&c->Base.Program);
96 }
97 }
98
99 void r3xx_compile_fragment_program(struct r300_fragment_program_compiler* c)
100 {
101 struct emulate_loop_state loop_state;
102
103 rewrite_depth_out(c);
104
105 /* This transformation needs to be done before any of the IF
106 * instructions are modified. */
107 radeonTransformKILP(&c->Base);
108
109 debug_program_log(c, "before compilation");
110
111 if (c->Base.is_r500){
112 rc_unroll_loops(&c->Base, R500_PFS_MAX_INST);
113 debug_program_log(c, "after unroll loops");
114 }
115 else{
116 rc_transform_loops(&c->Base, &loop_state, -1);
117 debug_program_log(c, "after transform loops");
118
119 rc_emulate_branches(&c->Base);
120 debug_program_log(c, "after emulate branches");
121 }
122
123 if (c->Base.is_r500) {
124 struct radeon_program_transformation transformations[] = {
125 { &r500_transform_IF, 0 },
126 { &radeonTransformALU, 0 },
127 { &radeonTransformDeriv, 0 },
128 { &radeonTransformTrigScale, 0 }
129 };
130 radeonLocalTransform(&c->Base, 4, transformations);
131
132 debug_program_log(c, "after native rewrite part 1");
133
134 c->Base.SwizzleCaps = &r500_swizzle_caps;
135 } else {
136 struct radeon_program_transformation transformations[] = {
137 { &radeonTransformALU, 0 },
138 { &radeonTransformTrigSimple, 0 }
139 };
140 radeonLocalTransform(&c->Base, 2, transformations);
141
142 debug_program_log(c, "after native rewrite part 1");
143
144 c->Base.SwizzleCaps = &r300_swizzle_caps;
145 }
146
147 /* Run the common transformations too.
148 * Remember, lowering comes last! */
149 struct radeon_program_transformation common_transformations[] = {
150 { &radeonTransformTEX, c },
151 };
152 radeonLocalTransform(&c->Base, 1, common_transformations);
153
154 common_transformations[0].function = &radeonTransformALU;
155 radeonLocalTransform(&c->Base, 1, common_transformations);
156
157 if (c->Base.Error)
158 return;
159
160 debug_program_log(c, "after native rewrite part 2");
161
162 rc_dataflow_deadcode(&c->Base, &dataflow_outputs_mark_use, c);
163 if (c->Base.Error)
164 return;
165
166 debug_program_log(c, "after deadcode");
167
168 if(!c->Base.is_r500){
169 rc_emulate_loops(&loop_state, R300_PFS_MAX_ALU_INST);
170 debug_program_log(c, "after emulate loops");
171 }
172
173 rc_optimize(&c->Base);
174
175 debug_program_log(c, "after dataflow optimize");
176
177 rc_dataflow_swizzles(&c->Base);
178 if (c->Base.Error)
179 return;
180
181 debug_program_log(c, "after dataflow passes");
182
183 if(!c->Base.is_r500) {
184 /* This pass makes it easier for the scheduler to group TEX
185 * instructions and reduces the chances of creating too
186 * many texture indirections.*/
187 rc_rename_regs(&c->Base);
188 if (c->Base.Error)
189 return;
190 debug_program_log(c, "after register rename");
191 }
192
193 rc_pair_translate(c);
194 if (c->Base.Error)
195 return;
196
197 debug_program_log(c, "after pair translate");
198
199 rc_pair_schedule(c);
200 if (c->Base.Error)
201 return;
202
203 debug_program_log(c, "after pair scheduling");
204
205 rc_pair_regalloc(c, c->Base.max_temp_regs);
206
207 if (c->Base.Error)
208 return;
209
210 debug_program_log(c, "after register allocation");
211
212 if (c->Base.is_r500) {
213 r500BuildFragmentProgramHwCode(c);
214 } else {
215 r300BuildFragmentProgramHwCode(c);
216 }
217
218 rc_constants_copy(&c->code->constants, &c->Base.Program.Constants);
219
220 if (c->Base.Debug) {
221 if (c->Base.is_r500) {
222 r500FragmentProgramDump(c->code);
223 } else {
224 r300FragmentProgramDump(c->code);
225 }
226 }
227 }