src/mesa/drivers/dri/r300/compiler/r500_fragprog.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining
   7  * a copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sublicense, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial
  16  * portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  */
  27
  28 #include "r500_fragprog.h"
  29
  30 #include <stdio.h>
  31
  32 #include "../r300_reg.h"
  33
  34 static struct rc_src_register shadow_ambient(struct radeon_compiler * c, int tmu)
  35 {
  36         struct rc_src_register reg = { 0, };
  37
  38         reg.File = RC_FILE_CONSTANT;
  39         reg.Index = rc_constants_add_state(&c->Program.Constants, RC_STATE_SHADOW_AMBIENT, tmu);
  40         reg.Swizzle = RC_SWIZZLE_WWWW;
  41         return reg;
  42 }
  43
  44 /**
  45  * Transform TEX, TXP, TXB, and KIL instructions in the following way:
  46  *  - implement texture compare (shadow extensions)
  47  *  - extract non-native source / destination operands
  48  */
  49 int r500_transform_TEX(
  50         struct radeon_compiler * c,
  51         struct rc_instruction * inst,
  52         void* data)
  53 {
  54         struct r300_fragment_program_compiler *compiler =
  55                 (struct r300_fragment_program_compiler*)data;
  56
  57         if (inst->I.Opcode != RC_OPCODE_TEX &&
  58             inst->I.Opcode != RC_OPCODE_TXB &&
  59             inst->I.Opcode != RC_OPCODE_TXP &&
  60             inst->I.Opcode != RC_OPCODE_KIL)
  61                 return 0;
  62
  63         /* ARB_shadow & EXT_shadow_funcs */
  64         if (inst->I.Opcode != RC_OPCODE_KIL &&
  65             c->Program.ShadowSamplers & (1 << inst->I.TexSrcUnit)) {
  66                 rc_compare_func comparefunc = compiler->state.unit[inst->I.TexSrcUnit].texture_compare_func;
  67
  68                 if (comparefunc == RC_COMPARE_FUNC_NEVER || comparefunc == RC_COMPARE_FUNC_ALWAYS) {
  69                         inst->I.Opcode = RC_OPCODE_MOV;
  70
  71                         if (comparefunc == RC_COMPARE_FUNC_ALWAYS) {
  72                                 inst->I.SrcReg[0].File = RC_FILE_NONE;
  73                                 inst->I.SrcReg[0].Swizzle = RC_SWIZZLE_1111;
  74                         } else {
  75                                 inst->I.SrcReg[0] = shadow_ambient(c, inst->I.TexSrcUnit);
  76                         }
  77
  78                         return 1;
  79                 } else {
  80                         rc_compare_func comparefunc = compiler->state.unit[inst->I.TexSrcUnit].texture_compare_func;
  81                         unsigned int depthmode = compiler->state.unit[inst->I.TexSrcUnit].depth_texture_mode;
  82                         struct rc_instruction * inst_rcp = rc_insert_new_instruction(c, inst);
  83                         struct rc_instruction * inst_mad = rc_insert_new_instruction(c, inst_rcp);
  84                         struct rc_instruction * inst_cmp = rc_insert_new_instruction(c, inst_mad);
  85                         int pass, fail;
  86
  87                         inst_rcp->I.Opcode = RC_OPCODE_RCP;
  88                         inst_rcp->I.DstReg.File = RC_FILE_TEMPORARY;
  89                         inst_rcp->I.DstReg.Index = rc_find_free_temporary(c);
  90                         inst_rcp->I.DstReg.WriteMask = RC_MASK_W;
  91                         inst_rcp->I.SrcReg[0] = inst->I.SrcReg[0];
  92                         inst_rcp->I.SrcReg[0].Swizzle = RC_SWIZZLE_WWWW;
  93
  94                         inst_cmp->I.DstReg = inst->I.DstReg;
  95                         inst->I.DstReg.File = RC_FILE_TEMPORARY;
  96                         inst->I.DstReg.Index = rc_find_free_temporary(c);
  97                         inst->I.DstReg.WriteMask = RC_MASK_XYZW;
  98
  99                         inst_mad->I.Opcode = RC_OPCODE_MAD;
 100                         inst_mad->I.DstReg.File = RC_FILE_TEMPORARY;
 101                         inst_mad->I.DstReg.Index = rc_find_free_temporary(c);
 102                         inst_mad->I.SrcReg[0] = inst->I.SrcReg[0];
 103                         inst_mad->I.SrcReg[0].Swizzle = RC_SWIZZLE_ZZZZ;
 104                         inst_mad->I.SrcReg[1].File = RC_FILE_TEMPORARY;
 105                         inst_mad->I.SrcReg[1].Index = inst_rcp->I.DstReg.Index;
 106                         inst_mad->I.SrcReg[1].Swizzle = RC_SWIZZLE_WWWW;
 107                         inst_mad->I.SrcReg[2].File = RC_FILE_TEMPORARY;
 108                         inst_mad->I.SrcReg[2].Index = inst->I.DstReg.Index;
 109                         if (depthmode == 0) /* GL_LUMINANCE */
 110                                 inst_mad->I.SrcReg[2].Swizzle = RC_MAKE_SWIZZLE(RC_SWIZZLE_X, RC_SWIZZLE_Y, RC_SWIZZLE_Z, RC_SWIZZLE_Z);
 111                         else if (depthmode == 2) /* GL_ALPHA */
 112                                 inst_mad->I.SrcReg[2].Swizzle = RC_SWIZZLE_WWWW;
 113
 114                         /* Recall that SrcReg[0] is tex, SrcReg[2] is r and:
 115                          *   r  < tex  <=>      -tex+r < 0
 116                          *   r >= tex  <=> not (-tex+r < 0 */
 117                         if (comparefunc == RC_COMPARE_FUNC_LESS || comparefunc == RC_COMPARE_FUNC_GEQUAL)
 118                                 inst_mad->I.SrcReg[2].Negate = inst_mad->I.SrcReg[2].Negate ^ RC_MASK_XYZW;
 119                         else
 120                                 inst_mad->I.SrcReg[0].Negate = inst_mad->I.SrcReg[0].Negate ^ RC_MASK_XYZW;
 121
 122                         inst_cmp->I.Opcode = RC_OPCODE_CMP;
 123                         /* DstReg has been filled out above */
 124                         inst_cmp->I.SrcReg[0].File = RC_FILE_TEMPORARY;
 125                         inst_cmp->I.SrcReg[0].Index = inst_mad->I.DstReg.Index;
 126
 127                         if (comparefunc == RC_COMPARE_FUNC_LESS || comparefunc == RC_COMPARE_FUNC_GREATER) {
 128                                 pass = 1;
 129                                 fail = 2;
 130                         } else {
 131                                 pass = 2;
 132                                 fail = 1;
 133                         }
 134
 135                         inst_cmp->I.SrcReg[pass].File = RC_FILE_NONE;
 136                         inst_cmp->I.SrcReg[pass].Swizzle = RC_SWIZZLE_1111;
 137                         inst_cmp->I.SrcReg[fail] = shadow_ambient(c, inst->I.TexSrcUnit);
 138                 }
 139         }
 140
 141         /* Cannot write texture to output registers */
 142         if (inst->I.Opcode != RC_OPCODE_KIL && inst->I.DstReg.File != RC_FILE_TEMPORARY) {
 143                 struct rc_instruction * inst_mov = rc_insert_new_instruction(c, inst);
 144
 145                 inst_mov->I.Opcode = RC_OPCODE_MOV;
 146                 inst_mov->I.DstReg = inst->I.DstReg;
 147                 inst_mov->I.SrcReg[0].File = RC_FILE_TEMPORARY;
 148                 inst_mov->I.SrcReg[0].Index = rc_find_free_temporary(c);
 149
 150                 inst->I.DstReg.File = RC_FILE_TEMPORARY;
 151                 inst->I.DstReg.Index = inst_mov->I.SrcReg[0].Index;
 152                 inst->I.DstReg.WriteMask = RC_MASK_XYZW;
 153         }
 154
 155         /* Cannot read texture coordinate from constants file */
 156         if (inst->I.SrcReg[0].File != RC_FILE_TEMPORARY && inst->I.SrcReg[0].File != RC_FILE_INPUT) {
 157                 struct rc_instruction * inst_mov = rc_insert_new_instruction(c, inst->Prev);
 158
 159                 inst_mov->I.Opcode = RC_OPCODE_MOV;
 160                 inst_mov->I.DstReg.File = RC_FILE_TEMPORARY;
 161                 inst_mov->I.DstReg.Index = rc_find_free_temporary(c);
 162                 inst_mov->I.SrcReg[0] = inst->I.SrcReg[0];
 163
 164                 reset_srcreg(&inst->I.SrcReg[0]);
 165                 inst->I.SrcReg[0].File = RC_FILE_TEMPORARY;
 166                 inst->I.SrcReg[0].Index = inst_mov->I.DstReg.Index;
 167         }
 168
 169         return 1;
 170 }
 171
 172 int r500FPIsNativeSwizzle(rc_opcode opcode, struct rc_src_register reg)
 173 {
 174         unsigned int relevant;
 175         int i;
 176
 177         if (opcode == RC_OPCODE_TEX ||
 178             opcode == RC_OPCODE_TXB ||
 179             opcode == RC_OPCODE_TXP ||
 180             opcode == RC_OPCODE_KIL) {
 181                 if (reg.Abs)
 182                         return 0;
 183
 184                 if (opcode == RC_OPCODE_KIL && (reg.Swizzle != RC_SWIZZLE_XYZW || reg.Negate != RC_MASK_NONE))
 185                         return 0;
 186
 187                 if (reg.Negate)
 188                         reg.Negate ^= RC_MASK_XYZW;
 189
 190                 for(i = 0; i < 4; ++i) {
 191                         unsigned int swz = GET_SWZ(reg.Swizzle, i);
 192                         if (swz == RC_SWIZZLE_UNUSED) {
 193                                 reg.Negate &= ~(1 << i);
 194                                 continue;
 195                         }
 196                         if (swz >= 4)
 197                                 return 0;
 198                 }
 199
 200                 if (reg.Negate)
 201                         return 0;
 202
 203                 return 1;
 204         } else if (opcode == RC_OPCODE_DDX || opcode == RC_OPCODE_DDY) {
 205                 /* DDX/MDH and DDY/MDV explicitly ignore incoming swizzles;
 206                  * if it doesn't fit perfectly into a .xyzw case... */
 207                 if (reg.Swizzle == RC_SWIZZLE_XYZW && !reg.Abs && !reg.Negate)
 208                         return 1;
 209
 210                 return 0;
 211         } else {
 212                 /* ALU instructions support almost everything */
 213                 if (reg.Abs)
 214                         return 1;
 215
 216                 relevant = 0;
 217                 for(i = 0; i < 3; ++i) {
 218                         unsigned int swz = GET_SWZ(reg.Swizzle, i);
 219                         if (swz != RC_SWIZZLE_UNUSED && swz != RC_SWIZZLE_ZERO)
 220                                 relevant |= 1 << i;
 221                 }
 222                 if ((reg.Negate & relevant) && ((reg.Negate & relevant) != relevant))
 223                         return 0;
 224
 225                 return 1;
 226         }
 227 }
 228
 229 /**
 230  * Implement a MOV with a potentially non-native swizzle.
 231  *
 232  * The only thing we *cannot* do in an ALU instruction is per-component
 233  * negation. Therefore, we split the MOV into two instructions when necessary.
 234  */
 235 void r500FPBuildSwizzle(struct nqssadce_state *s, struct rc_dst_register dst, struct rc_src_register src)
 236 {
 237         unsigned int negatebase[2] = { 0, 0 };
 238         int i;
 239
 240         for(i = 0; i < 4; ++i) {
 241                 unsigned int swz = GET_SWZ(src.Swizzle, i);
 242                 if (swz == RC_SWIZZLE_UNUSED)
 243                         continue;
 244                 negatebase[GET_BIT(src.Negate, i)] |= 1 << i;
 245         }
 246
 247         for(i = 0; i <= 1; ++i) {
 248                 if (!negatebase[i])
 249                         continue;
 250
 251                 struct rc_instruction *inst = rc_insert_new_instruction(s->Compiler, s->IP->Prev);
 252                 inst->I.Opcode = RC_OPCODE_MOV;
 253                 inst->I.DstReg = dst;
 254                 inst->I.DstReg.WriteMask = negatebase[i];
 255                 inst->I.SrcReg[0] = src;
 256                 inst->I.SrcReg[0].Negate = (i == 0) ? RC_MASK_NONE : RC_MASK_XYZW;
 257         }
 258 }
 259
 260
 261 static char *toswiz(int swiz_val) {
 262   switch(swiz_val) {
 263   case 0: return "R";
 264   case 1: return "G";
 265   case 2: return "B";
 266   case 3: return "A";
 267   case 4: return "0";
 268   case 5: return "1/2";
 269   case 6: return "1";
 270   case 7: return "U";
 271   }
 272   return NULL;
 273 }
 274
 275 static char *toop(int op_val)
 276 {
 277   char *str = NULL;
 278   switch (op_val) {
 279   case 0: str = "MAD"; break;
 280   case 1: str = "DP3"; break;
 281   case 2: str = "DP4"; break;
 282   case 3: str = "D2A"; break;
 283   case 4: str = "MIN"; break;
 284   case 5: str = "MAX"; break;
 285   case 6: str = "Reserved"; break;
 286   case 7: str = "CND"; break;
 287   case 8: str = "CMP"; break;
 288   case 9: str = "FRC"; break;
 289   case 10: str = "SOP"; break;
 290   case 11: str = "MDH"; break;
 291   case 12: str = "MDV"; break;
 292   }
 293   return str;
 294 }
 295
 296 static char *to_alpha_op(int op_val)
 297 {
 298   char *str = NULL;
 299   switch (op_val) {
 300   case 0: str = "MAD"; break;
 301   case 1: str = "DP"; break;
 302   case 2: str = "MIN"; break;
 303   case 3: str = "MAX"; break;
 304   case 4: str = "Reserved"; break;
 305   case 5: str = "CND"; break;
 306   case 6: str = "CMP"; break;
 307   case 7: str = "FRC"; break;
 308   case 8: str = "EX2"; break;
 309   case 9: str = "LN2"; break;
 310   case 10: str = "RCP"; break;
 311   case 11: str = "RSQ"; break;
 312   case 12: str = "SIN"; break;
 313   case 13: str = "COS"; break;
 314   case 14: str = "MDH"; break;
 315   case 15: str = "MDV"; break;
 316   }
 317   return str;
 318 }
 319
 320 static char *to_mask(int val)
 321 {
 322   char *str = NULL;
 323   switch(val) {
 324   case 0: str = "NONE"; break;
 325   case 1: str = "R"; break;
 326   case 2: str = "G"; break;
 327   case 3: str = "RG"; break;
 328   case 4: str = "B"; break;
 329   case 5: str = "RB"; break;
 330   case 6: str = "GB"; break;
 331   case 7: str = "RGB"; break;
 332   case 8: str = "A"; break;
 333   case 9: str = "AR"; break;
 334   case 10: str = "AG"; break;
 335   case 11: str = "ARG"; break;
 336   case 12: str = "AB"; break;
 337   case 13: str = "ARB"; break;
 338   case 14: str = "AGB"; break;
 339   case 15: str = "ARGB"; break;
 340   }
 341   return str;
 342 }
 343
 344 static char *to_texop(int val)
 345 {
 346   switch(val) {
 347   case 0: return "NOP";
 348   case 1: return "LD";
 349   case 2: return "TEXKILL";
 350   case 3: return "PROJ";
 351   case 4: return "LODBIAS";
 352   case 5: return "LOD";
 353   case 6: return "DXDY";
 354   }
 355   return NULL;
 356 }
 357
 358 void r500FragmentProgramDump(struct rX00_fragment_program_code *c)
 359 {
 360   struct r500_fragment_program_code *code = &c->code.r500;
 361   fprintf(stderr, "R500 Fragment Program:\n--------\n");
 362
 363   int n;
 364   uint32_t inst;
 365   uint32_t inst0;
 366   char *str = NULL;
 367
 368   for (n = 0; n < code->inst_end+1; n++) {
 369     inst0 = inst = code->inst[n].inst0;
 370     fprintf(stderr,"%d\t0:CMN_INST   0x%08x:", n, inst);
 371     switch(inst & 0x3) {
 372     case R500_INST_TYPE_ALU: str = "ALU"; break;
 373     case R500_INST_TYPE_OUT: str = "OUT"; break;
 374     case R500_INST_TYPE_FC: str = "FC"; break;
 375     case R500_INST_TYPE_TEX: str = "TEX"; break;
 376     };
 377     fprintf(stderr,"%s %s %s %s %s ", str,
 378             inst & R500_INST_TEX_SEM_WAIT ? "TEX_WAIT" : "",
 379             inst & R500_INST_LAST ? "LAST" : "",
 380             inst & R500_INST_NOP ? "NOP" : "",
 381             inst & R500_INST_ALU_WAIT ? "ALU WAIT" : "");
 382     fprintf(stderr,"wmask: %s omask: %s\n", to_mask((inst >> 11) & 0xf),
 383             to_mask((inst >> 15) & 0xf));
 384
 385     switch(inst0 & 0x3) {
 386     case 0:
 387     case 1:
 388       fprintf(stderr,"\t1:RGB_ADDR   0x%08x:", code->inst[n].inst1);
 389       inst = code->inst[n].inst1;
 390
 391       fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
 392               inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
 393               (inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't',
 394               (inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
 395               (inst >> 30));
 396
 397       fprintf(stderr,"\t2:ALPHA_ADDR 0x%08x:", code->inst[n].inst2);
 398       inst = code->inst[n].inst2;
 399       fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
 400               inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
 401               (inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't',
 402               (inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
 403               (inst >> 30));
 404       fprintf(stderr,"\t3 RGB_INST:  0x%08x:", code->inst[n].inst3);
 405       inst = code->inst[n].inst3;
 406       fprintf(stderr,"rgb_A_src:%d %s/%s/%s %d rgb_B_src:%d %s/%s/%s %d\n",
 407               (inst) & 0x3, toswiz((inst >> 2) & 0x7), toswiz((inst >> 5) & 0x7), toswiz((inst >> 8) & 0x7),
 408               (inst >> 11) & 0x3,
 409               (inst >> 13) & 0x3, toswiz((inst >> 15) & 0x7), toswiz((inst >> 18) & 0x7), toswiz((inst >> 21) & 0x7),
 410               (inst >> 24) & 0x3);
 411
 412
 413       fprintf(stderr,"\t4 ALPHA_INST:0x%08x:", code->inst[n].inst4);
 414       inst = code->inst[n].inst4;
 415       fprintf(stderr,"%s dest:%d%s alp_A_src:%d %s %d alp_B_src:%d %s %d w:%d\n", to_alpha_op(inst & 0xf),
 416               (inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
 417               (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), (inst >> 17) & 0x3,
 418               (inst >> 19) & 0x3, toswiz((inst >> 21) & 0x7), (inst >> 24) & 0x3,
 419               (inst >> 31) & 0x1);
 420
 421       fprintf(stderr,"\t5 RGBA_INST: 0x%08x:", code->inst[n].inst5);
 422       inst = code->inst[n].inst5;
 423       fprintf(stderr,"%s dest:%d%s rgb_C_src:%d %s/%s/%s %d alp_C_src:%d %s %d\n", toop(inst & 0xf),
 424               (inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
 425               (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), toswiz((inst >> 17) & 0x7), toswiz((inst >> 20) & 0x7),
 426               (inst >> 23) & 0x3,
 427               (inst >> 25) & 0x3, toswiz((inst >> 27) & 0x7), (inst >> 30) & 0x3);
 428       break;
 429     case 2:
 430       break;
 431     case 3:
 432       inst = code->inst[n].inst1;
 433       fprintf(stderr,"\t1:TEX_INST:  0x%08x: id: %d op:%s, %s, %s %s\n", inst, (inst >> 16) & 0xf,
 434               to_texop((inst >> 22) & 0x7), (inst & (1<<25)) ? "ACQ" : "",
 435               (inst & (1<<26)) ? "IGNUNC" : "", (inst & (1<<27)) ? "UNSCALED" : "SCALED");
 436       inst = code->inst[n].inst2;
 437       fprintf(stderr,"\t2:TEX_ADDR:  0x%08x: src: %d%s %s/%s/%s/%s dst: %d%s %s/%s/%s/%s\n", inst,
 438               inst & 127, inst & (1<<7) ? "(rel)" : "",
 439               toswiz((inst >> 8) & 0x3), toswiz((inst >> 10) & 0x3),
 440               toswiz((inst >> 12) & 0x3), toswiz((inst >> 14) & 0x3),
 441               (inst >> 16) & 127, inst & (1<<23) ? "(rel)" : "",
 442               toswiz((inst >> 24) & 0x3), toswiz((inst >> 26) & 0x3),
 443               toswiz((inst >> 28) & 0x3), toswiz((inst >> 30) & 0x3));
 444
 445       fprintf(stderr,"\t3:TEX_DXDY:  0x%08x\n", code->inst[n].inst3);
 446       break;
 447     }
 448     fprintf(stderr,"\n");
 449   }
 450
 451 }