r300g: mask out the mirrored bit correctly in the registers
[mesa.git] / src / mesa / drivers / dri / r300 / compiler / r500_fragprog.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 */
27
28 #include "r500_fragprog.h"
29
30 #include <stdio.h>
31
32 #include "../r300_reg.h"
33
34 static struct rc_src_register shadow_ambient(struct radeon_compiler * c, int tmu)
35 {
36 struct rc_src_register reg = { 0, };
37
38 reg.File = RC_FILE_CONSTANT;
39 reg.Index = rc_constants_add_state(&c->Program.Constants, RC_STATE_SHADOW_AMBIENT, tmu);
40 reg.Swizzle = RC_SWIZZLE_WWWW;
41 return reg;
42 }
43
44 /**
45 * Transform TEX, TXP, TXB, and KIL instructions in the following way:
46 * - implement texture compare (shadow extensions)
47 * - extract non-native source / destination operands
48 */
49 int r500_transform_TEX(
50 struct radeon_compiler * c,
51 struct rc_instruction * inst,
52 void* data)
53 {
54 struct r300_fragment_program_compiler *compiler =
55 (struct r300_fragment_program_compiler*)data;
56
57 if (inst->U.I.Opcode != RC_OPCODE_TEX &&
58 inst->U.I.Opcode != RC_OPCODE_TXB &&
59 inst->U.I.Opcode != RC_OPCODE_TXP &&
60 inst->U.I.Opcode != RC_OPCODE_KIL)
61 return 0;
62
63 /* ARB_shadow & EXT_shadow_funcs */
64 if (inst->U.I.Opcode != RC_OPCODE_KIL &&
65 c->Program.ShadowSamplers & (1 << inst->U.I.TexSrcUnit)) {
66 rc_compare_func comparefunc = compiler->state.unit[inst->U.I.TexSrcUnit].texture_compare_func;
67
68 if (comparefunc == RC_COMPARE_FUNC_NEVER || comparefunc == RC_COMPARE_FUNC_ALWAYS) {
69 inst->U.I.Opcode = RC_OPCODE_MOV;
70
71 if (comparefunc == RC_COMPARE_FUNC_ALWAYS) {
72 inst->U.I.SrcReg[0].File = RC_FILE_NONE;
73 inst->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_1111;
74 } else {
75 inst->U.I.SrcReg[0] = shadow_ambient(c, inst->U.I.TexSrcUnit);
76 }
77
78 return 1;
79 } else {
80 rc_compare_func comparefunc = compiler->state.unit[inst->U.I.TexSrcUnit].texture_compare_func;
81 unsigned int depthmode = compiler->state.unit[inst->U.I.TexSrcUnit].depth_texture_mode;
82 struct rc_instruction * inst_rcp = rc_insert_new_instruction(c, inst);
83 struct rc_instruction * inst_mad = rc_insert_new_instruction(c, inst_rcp);
84 struct rc_instruction * inst_cmp = rc_insert_new_instruction(c, inst_mad);
85 int pass, fail;
86
87 inst_rcp->U.I.Opcode = RC_OPCODE_RCP;
88 inst_rcp->U.I.DstReg.File = RC_FILE_TEMPORARY;
89 inst_rcp->U.I.DstReg.Index = rc_find_free_temporary(c);
90 inst_rcp->U.I.DstReg.WriteMask = RC_MASK_W;
91 inst_rcp->U.I.SrcReg[0] = inst->U.I.SrcReg[0];
92 inst_rcp->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_WWWW;
93
94 inst_cmp->U.I.DstReg = inst->U.I.DstReg;
95 inst->U.I.DstReg.File = RC_FILE_TEMPORARY;
96 inst->U.I.DstReg.Index = rc_find_free_temporary(c);
97 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW;
98
99 inst_mad->U.I.Opcode = RC_OPCODE_MAD;
100 inst_mad->U.I.DstReg.File = RC_FILE_TEMPORARY;
101 inst_mad->U.I.DstReg.Index = rc_find_free_temporary(c);
102 inst_mad->U.I.SrcReg[0] = inst->U.I.SrcReg[0];
103 inst_mad->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_ZZZZ;
104 inst_mad->U.I.SrcReg[1].File = RC_FILE_TEMPORARY;
105 inst_mad->U.I.SrcReg[1].Index = inst_rcp->U.I.DstReg.Index;
106 inst_mad->U.I.SrcReg[1].Swizzle = RC_SWIZZLE_WWWW;
107 inst_mad->U.I.SrcReg[2].File = RC_FILE_TEMPORARY;
108 inst_mad->U.I.SrcReg[2].Index = inst->U.I.DstReg.Index;
109 if (depthmode == 0) /* GL_LUMINANCE */
110 inst_mad->U.I.SrcReg[2].Swizzle = RC_MAKE_SWIZZLE(RC_SWIZZLE_X, RC_SWIZZLE_Y, RC_SWIZZLE_Z, RC_SWIZZLE_Z);
111 else if (depthmode == 2) /* GL_ALPHA */
112 inst_mad->U.I.SrcReg[2].Swizzle = RC_SWIZZLE_WWWW;
113
114 /* Recall that SrcReg[0] is tex, SrcReg[2] is r and:
115 * r < tex <=> -tex+r < 0
116 * r >= tex <=> not (-tex+r < 0 */
117 if (comparefunc == RC_COMPARE_FUNC_LESS || comparefunc == RC_COMPARE_FUNC_GEQUAL)
118 inst_mad->U.I.SrcReg[2].Negate = inst_mad->U.I.SrcReg[2].Negate ^ RC_MASK_XYZW;
119 else
120 inst_mad->U.I.SrcReg[0].Negate = inst_mad->U.I.SrcReg[0].Negate ^ RC_MASK_XYZW;
121
122 inst_cmp->U.I.Opcode = RC_OPCODE_CMP;
123 /* DstReg has been filled out above */
124 inst_cmp->U.I.SrcReg[0].File = RC_FILE_TEMPORARY;
125 inst_cmp->U.I.SrcReg[0].Index = inst_mad->U.I.DstReg.Index;
126
127 if (comparefunc == RC_COMPARE_FUNC_LESS || comparefunc == RC_COMPARE_FUNC_GREATER) {
128 pass = 1;
129 fail = 2;
130 } else {
131 pass = 2;
132 fail = 1;
133 }
134
135 inst_cmp->U.I.SrcReg[pass].File = RC_FILE_NONE;
136 inst_cmp->U.I.SrcReg[pass].Swizzle = RC_SWIZZLE_1111;
137 inst_cmp->U.I.SrcReg[fail] = shadow_ambient(c, inst->U.I.TexSrcUnit);
138 }
139 }
140
141 /* Texture wrap modes don't work on NPOT textures or texrects.
142 *
143 * The game plan is simple. We have two flags, fake_npot and
144 * non_normalized_coords, as well as a tex target. The RECT tex target
145 * will make the emitted code use non-scaled texcoords.
146 *
147 * Non-wrapped/clamped texcoords with NPOT are free in HW. Repeat and
148 * mirroring are not. If we need to repeat, we do:
149 *
150 * MUL temp, texcoord, <scaling factor constant>
151 * FRC temp, temp ; Discard integer portion of coords
152 *
153 * This gives us coords in [0, 1].
154 *
155 * Mirroring is trickier. We're going to start out like repeat:
156 *
157 * MUL temp0, texcoord, <scaling factor constant> ; De-mirror across axes
158 * MUL temp0, abs(temp0), 0.5 ; Pattern repeats in [0, 2]
159 * ; so scale to [0, 1]
160 * FRC temp0, temp0 ; Make the pattern repeat
161 * SGE temp1, temp0, 0.5 ; Select components that need to be "reflected"
162 * ; across the mirror
163 * MAD temp0, neg(0.5), temp1, temp0 ; Add -0.5 to the
164 * ; selected components
165 * ADD temp0, temp0, temp0 ; Poor man's 2x to undo earlier MUL
166 *
167 * This gives us coords in [0, 1].
168 *
169 * ~ C.
170 */
171 if (inst->U.I.Opcode != RC_OPCODE_KIL &&
172 (inst->U.I.TexSrcTarget == RC_TEXTURE_RECT ||
173 compiler->state.unit[inst->U.I.TexSrcUnit].fake_npot ||
174 compiler->state.unit[inst->U.I.TexSrcUnit].non_normalized_coords)) {
175 rc_wrap_mode wrapmode = compiler->state.unit[inst->U.I.TexSrcUnit].wrap_mode;
176 struct rc_instruction *inst_rect = NULL;
177 unsigned temp = rc_find_free_temporary(c);
178
179 if (compiler->state.unit[inst->U.I.TexSrcUnit].fake_npot &&
180 wrapmode != RC_WRAP_NONE && wrapmode != RC_WRAP_CLAMP) {
181
182 if ((inst->U.I.TexSrcTarget == RC_TEXTURE_RECT ||
183 compiler->state.unit[inst->U.I.TexSrcUnit].non_normalized_coords)) {
184 inst_rect = rc_insert_new_instruction(c, inst->Prev);
185
186 inst_rect->U.I.Opcode = RC_OPCODE_MUL;
187 inst_rect->U.I.DstReg.File = RC_FILE_TEMPORARY;
188 inst_rect->U.I.DstReg.Index = temp;
189 inst_rect->U.I.SrcReg[0] = inst->U.I.SrcReg[0];
190 inst_rect->U.I.SrcReg[1].File = RC_FILE_CONSTANT;
191 inst_rect->U.I.SrcReg[1].Index =
192 rc_constants_add_state(&c->Program.Constants,
193 RC_STATE_R300_TEXRECT_FACTOR, inst->U.I.TexSrcUnit);
194
195 reset_srcreg(&inst->U.I.SrcReg[0]);
196 inst->U.I.SrcReg[0].File = RC_FILE_TEMPORARY;
197 inst->U.I.SrcReg[0].Index = temp;
198
199 inst->U.I.TexSrcTarget = RC_TEXTURE_2D;
200 }
201
202 if (wrapmode == RC_WRAP_REPEAT) {
203 inst_rect = rc_insert_new_instruction(c, inst->Prev);
204
205 inst_rect->U.I.Opcode = RC_OPCODE_FRC;
206 inst_rect->U.I.DstReg.File = RC_FILE_TEMPORARY;
207 inst_rect->U.I.DstReg.Index = temp;
208 inst_rect->U.I.SrcReg[0] = inst->U.I.SrcReg[0];
209
210 reset_srcreg(&inst->U.I.SrcReg[0]);
211 inst->U.I.SrcReg[0].File = RC_FILE_TEMPORARY;
212 inst->U.I.SrcReg[0].Index = temp;
213 } else if (wrapmode == RC_WRAP_MIRROR) {
214 unsigned temp1;
215 /*
216 * MUL temp0, abs(temp0), 0.5
217 * FRC temp0, temp0
218 * SGE temp1, temp0, 0.5
219 * MAD temp0, neg(0.5), temp1, temp0
220 * ADD temp0, temp0, temp0
221 */
222 inst_rect = rc_insert_new_instruction(c, inst->Prev);
223
224 inst_rect->U.I.Opcode = RC_OPCODE_MUL;
225 inst_rect->U.I.DstReg.File = RC_FILE_TEMPORARY;
226 inst_rect->U.I.DstReg.Index = temp;
227 inst_rect->U.I.SrcReg[0] = inst->U.I.SrcReg[0];
228 inst_rect->U.I.SrcReg[1].Swizzle = RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_HALF);
229
230 inst_rect = rc_insert_new_instruction(c, inst->Prev);
231
232 inst_rect->U.I.Opcode = RC_OPCODE_FRC;
233 inst_rect->U.I.DstReg.File = RC_FILE_TEMPORARY;
234 inst_rect->U.I.DstReg.Index = temp;
235 inst_rect->U.I.SrcReg[0].File = RC_FILE_TEMPORARY;
236 inst_rect->U.I.SrcReg[0].Index = temp;
237
238 temp1 = rc_find_free_temporary(c);
239 inst_rect = rc_insert_new_instruction(c, inst->Prev);
240
241 inst_rect->U.I.Opcode = RC_OPCODE_SGE;
242 inst_rect->U.I.DstReg.File = RC_FILE_TEMPORARY;
243 inst_rect->U.I.DstReg.Index = temp1;
244 inst_rect->U.I.SrcReg[0].File = RC_FILE_TEMPORARY;
245 inst_rect->U.I.SrcReg[0].Index = temp;
246 inst_rect->U.I.SrcReg[1].Swizzle = RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_HALF);
247
248 inst_rect = rc_insert_new_instruction(c, inst->Prev);
249
250 inst_rect->U.I.Opcode = RC_OPCODE_MAD;
251 inst_rect->U.I.DstReg.File = RC_FILE_TEMPORARY;
252 inst_rect->U.I.DstReg.Index = temp;
253 inst_rect->U.I.SrcReg[0].File = RC_FILE_TEMPORARY;
254 inst_rect->U.I.SrcReg[0].Index = temp1;
255 inst_rect->U.I.SrcReg[1].Swizzle = RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_HALF);
256 inst_rect->U.I.SrcReg[1].Negate = 1;
257 inst_rect->U.I.SrcReg[2].File = RC_FILE_TEMPORARY;
258 inst_rect->U.I.SrcReg[2].Index = temp;
259
260 inst_rect = rc_insert_new_instruction(c, inst->Prev);
261
262 inst_rect->U.I.Opcode = RC_OPCODE_ADD;
263 inst_rect->U.I.DstReg.File = RC_FILE_TEMPORARY;
264 inst_rect->U.I.DstReg.Index = temp;
265 inst_rect->U.I.SrcReg[0].File = RC_FILE_TEMPORARY;
266 inst_rect->U.I.SrcReg[0].Index = temp;
267 inst_rect->U.I.SrcReg[1].File = RC_FILE_TEMPORARY;
268 inst_rect->U.I.SrcReg[1].Index = temp;
269
270 reset_srcreg(&inst->U.I.SrcReg[0]);
271 inst->U.I.SrcReg[0].File = RC_FILE_TEMPORARY;
272 inst->U.I.SrcReg[0].Index = temp;
273 }
274 }
275 }
276
277 /* Cannot write texture to output registers */
278 if (inst->U.I.Opcode != RC_OPCODE_KIL && inst->U.I.DstReg.File != RC_FILE_TEMPORARY) {
279 struct rc_instruction * inst_mov = rc_insert_new_instruction(c, inst);
280
281 inst_mov->U.I.Opcode = RC_OPCODE_MOV;
282 inst_mov->U.I.DstReg = inst->U.I.DstReg;
283 inst_mov->U.I.SrcReg[0].File = RC_FILE_TEMPORARY;
284 inst_mov->U.I.SrcReg[0].Index = rc_find_free_temporary(c);
285
286 inst->U.I.DstReg.File = RC_FILE_TEMPORARY;
287 inst->U.I.DstReg.Index = inst_mov->U.I.SrcReg[0].Index;
288 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW;
289 }
290
291 /* Cannot read texture coordinate from constants file */
292 if (inst->U.I.SrcReg[0].File != RC_FILE_TEMPORARY && inst->U.I.SrcReg[0].File != RC_FILE_INPUT) {
293 struct rc_instruction * inst_mov = rc_insert_new_instruction(c, inst->Prev);
294
295 inst_mov->U.I.Opcode = RC_OPCODE_MOV;
296 inst_mov->U.I.DstReg.File = RC_FILE_TEMPORARY;
297 inst_mov->U.I.DstReg.Index = rc_find_free_temporary(c);
298 inst_mov->U.I.SrcReg[0] = inst->U.I.SrcReg[0];
299
300 reset_srcreg(&inst->U.I.SrcReg[0]);
301 inst->U.I.SrcReg[0].File = RC_FILE_TEMPORARY;
302 inst->U.I.SrcReg[0].Index = inst_mov->U.I.DstReg.Index;
303 }
304
305 return 1;
306 }
307
308 /**
309 * Rewrite IF instructions to use the ALU result special register.
310 */
311 int r500_transform_IF(
312 struct radeon_compiler * c,
313 struct rc_instruction * inst,
314 void* data)
315 {
316 if (inst->U.I.Opcode != RC_OPCODE_IF)
317 return 0;
318
319 struct rc_instruction * inst_mov = rc_insert_new_instruction(c, inst->Prev);
320 inst_mov->U.I.Opcode = RC_OPCODE_MOV;
321 inst_mov->U.I.DstReg.WriteMask = 0;
322 inst_mov->U.I.WriteALUResult = RC_ALURESULT_W;
323 inst_mov->U.I.ALUResultCompare = RC_COMPARE_FUNC_NOTEQUAL;
324 inst_mov->U.I.SrcReg[0] = inst->U.I.SrcReg[0];
325 inst_mov->U.I.SrcReg[0].Swizzle = combine_swizzles4(inst_mov->U.I.SrcReg[0].Swizzle,
326 RC_SWIZZLE_UNUSED, RC_SWIZZLE_UNUSED, RC_SWIZZLE_UNUSED, RC_SWIZZLE_X);
327
328 inst->U.I.SrcReg[0].File = RC_FILE_SPECIAL;
329 inst->U.I.SrcReg[0].Index = RC_SPECIAL_ALU_RESULT;
330 inst->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_XYZW;
331 inst->U.I.SrcReg[0].Negate = 0;
332
333 return 1;
334 }
335
336 static int r500_swizzle_is_native(rc_opcode opcode, struct rc_src_register reg)
337 {
338 unsigned int relevant;
339 int i;
340
341 if (opcode == RC_OPCODE_TEX ||
342 opcode == RC_OPCODE_TXB ||
343 opcode == RC_OPCODE_TXP ||
344 opcode == RC_OPCODE_KIL) {
345 if (reg.Abs)
346 return 0;
347
348 if (opcode == RC_OPCODE_KIL && (reg.Swizzle != RC_SWIZZLE_XYZW || reg.Negate != RC_MASK_NONE))
349 return 0;
350
351 if (reg.Negate)
352 reg.Negate ^= RC_MASK_XYZW;
353
354 for(i = 0; i < 4; ++i) {
355 unsigned int swz = GET_SWZ(reg.Swizzle, i);
356 if (swz == RC_SWIZZLE_UNUSED) {
357 reg.Negate &= ~(1 << i);
358 continue;
359 }
360 if (swz >= 4)
361 return 0;
362 }
363
364 if (reg.Negate)
365 return 0;
366
367 return 1;
368 } else if (opcode == RC_OPCODE_DDX || opcode == RC_OPCODE_DDY) {
369 /* DDX/MDH and DDY/MDV explicitly ignore incoming swizzles;
370 * if it doesn't fit perfectly into a .xyzw case... */
371 if (reg.Swizzle == RC_SWIZZLE_XYZW && !reg.Abs && !reg.Negate)
372 return 1;
373
374 return 0;
375 } else {
376 /* ALU instructions support almost everything */
377 if (reg.Abs)
378 return 1;
379
380 relevant = 0;
381 for(i = 0; i < 3; ++i) {
382 unsigned int swz = GET_SWZ(reg.Swizzle, i);
383 if (swz != RC_SWIZZLE_UNUSED && swz != RC_SWIZZLE_ZERO)
384 relevant |= 1 << i;
385 }
386 if ((reg.Negate & relevant) && ((reg.Negate & relevant) != relevant))
387 return 0;
388
389 return 1;
390 }
391 }
392
393 /**
394 * Split source register access.
395 *
396 * The only thing we *cannot* do in an ALU instruction is per-component
397 * negation.
398 */
399 static void r500_swizzle_split(struct rc_src_register src, unsigned int usemask,
400 struct rc_swizzle_split * split)
401 {
402 unsigned int negatebase[2] = { 0, 0 };
403 int i;
404
405 for(i = 0; i < 4; ++i) {
406 unsigned int swz = GET_SWZ(src.Swizzle, i);
407 if (swz == RC_SWIZZLE_UNUSED || !GET_BIT(usemask, i))
408 continue;
409 negatebase[GET_BIT(src.Negate, i)] |= 1 << i;
410 }
411
412 split->NumPhases = 0;
413
414 for(i = 0; i <= 1; ++i) {
415 if (!negatebase[i])
416 continue;
417
418 split->Phase[split->NumPhases++] = negatebase[i];
419 }
420 }
421
422 struct rc_swizzle_caps r500_swizzle_caps = {
423 .IsNative = r500_swizzle_is_native,
424 .Split = r500_swizzle_split
425 };
426
427 static char *toswiz(int swiz_val) {
428 switch(swiz_val) {
429 case 0: return "R";
430 case 1: return "G";
431 case 2: return "B";
432 case 3: return "A";
433 case 4: return "0";
434 case 5: return "H";
435 case 6: return "1";
436 case 7: return "U";
437 }
438 return NULL;
439 }
440
441 static char *toop(int op_val)
442 {
443 char *str = NULL;
444 switch (op_val) {
445 case 0: str = "MAD"; break;
446 case 1: str = "DP3"; break;
447 case 2: str = "DP4"; break;
448 case 3: str = "D2A"; break;
449 case 4: str = "MIN"; break;
450 case 5: str = "MAX"; break;
451 case 6: str = "Reserved"; break;
452 case 7: str = "CND"; break;
453 case 8: str = "CMP"; break;
454 case 9: str = "FRC"; break;
455 case 10: str = "SOP"; break;
456 case 11: str = "MDH"; break;
457 case 12: str = "MDV"; break;
458 }
459 return str;
460 }
461
462 static char *to_alpha_op(int op_val)
463 {
464 char *str = NULL;
465 switch (op_val) {
466 case 0: str = "MAD"; break;
467 case 1: str = "DP"; break;
468 case 2: str = "MIN"; break;
469 case 3: str = "MAX"; break;
470 case 4: str = "Reserved"; break;
471 case 5: str = "CND"; break;
472 case 6: str = "CMP"; break;
473 case 7: str = "FRC"; break;
474 case 8: str = "EX2"; break;
475 case 9: str = "LN2"; break;
476 case 10: str = "RCP"; break;
477 case 11: str = "RSQ"; break;
478 case 12: str = "SIN"; break;
479 case 13: str = "COS"; break;
480 case 14: str = "MDH"; break;
481 case 15: str = "MDV"; break;
482 }
483 return str;
484 }
485
486 static char *to_mask(int val)
487 {
488 char *str = NULL;
489 switch(val) {
490 case 0: str = "NONE"; break;
491 case 1: str = "R"; break;
492 case 2: str = "G"; break;
493 case 3: str = "RG"; break;
494 case 4: str = "B"; break;
495 case 5: str = "RB"; break;
496 case 6: str = "GB"; break;
497 case 7: str = "RGB"; break;
498 case 8: str = "A"; break;
499 case 9: str = "AR"; break;
500 case 10: str = "AG"; break;
501 case 11: str = "ARG"; break;
502 case 12: str = "AB"; break;
503 case 13: str = "ARB"; break;
504 case 14: str = "AGB"; break;
505 case 15: str = "ARGB"; break;
506 }
507 return str;
508 }
509
510 static char *to_texop(int val)
511 {
512 switch(val) {
513 case 0: return "NOP";
514 case 1: return "LD";
515 case 2: return "TEXKILL";
516 case 3: return "PROJ";
517 case 4: return "LODBIAS";
518 case 5: return "LOD";
519 case 6: return "DXDY";
520 }
521 return NULL;
522 }
523
524 void r500FragmentProgramDump(struct rX00_fragment_program_code *c)
525 {
526 struct r500_fragment_program_code *code = &c->code.r500;
527 fprintf(stderr, "R500 Fragment Program:\n--------\n");
528
529 int n;
530 uint32_t inst;
531 uint32_t inst0;
532 char *str = NULL;
533
534 for (n = 0; n < code->inst_end+1; n++) {
535 inst0 = inst = code->inst[n].inst0;
536 fprintf(stderr,"%d\t0:CMN_INST 0x%08x:", n, inst);
537 switch(inst & 0x3) {
538 case R500_INST_TYPE_ALU: str = "ALU"; break;
539 case R500_INST_TYPE_OUT: str = "OUT"; break;
540 case R500_INST_TYPE_FC: str = "FC"; break;
541 case R500_INST_TYPE_TEX: str = "TEX"; break;
542 };
543 fprintf(stderr,"%s %s %s %s %s ", str,
544 inst & R500_INST_TEX_SEM_WAIT ? "TEX_WAIT" : "",
545 inst & R500_INST_LAST ? "LAST" : "",
546 inst & R500_INST_NOP ? "NOP" : "",
547 inst & R500_INST_ALU_WAIT ? "ALU WAIT" : "");
548 fprintf(stderr,"wmask: %s omask: %s\n", to_mask((inst >> 11) & 0xf),
549 to_mask((inst >> 15) & 0xf));
550
551 switch(inst0 & 0x3) {
552 case 0:
553 case 1:
554 fprintf(stderr,"\t1:RGB_ADDR 0x%08x:", code->inst[n].inst1);
555 inst = code->inst[n].inst1;
556
557 fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
558 inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
559 (inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't',
560 (inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
561 (inst >> 30));
562
563 fprintf(stderr,"\t2:ALPHA_ADDR 0x%08x:", code->inst[n].inst2);
564 inst = code->inst[n].inst2;
565 fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
566 inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
567 (inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't',
568 (inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
569 (inst >> 30));
570 fprintf(stderr,"\t3 RGB_INST: 0x%08x:", code->inst[n].inst3);
571 inst = code->inst[n].inst3;
572 fprintf(stderr,"rgb_A_src:%d %s/%s/%s %d rgb_B_src:%d %s/%s/%s %d targ: %d\n",
573 (inst) & 0x3, toswiz((inst >> 2) & 0x7), toswiz((inst >> 5) & 0x7), toswiz((inst >> 8) & 0x7),
574 (inst >> 11) & 0x3,
575 (inst >> 13) & 0x3, toswiz((inst >> 15) & 0x7), toswiz((inst >> 18) & 0x7), toswiz((inst >> 21) & 0x7),
576 (inst >> 24) & 0x3, (inst >> 29) & 0x3);
577
578
579 fprintf(stderr,"\t4 ALPHA_INST:0x%08x:", code->inst[n].inst4);
580 inst = code->inst[n].inst4;
581 fprintf(stderr,"%s dest:%d%s alp_A_src:%d %s %d alp_B_src:%d %s %d targ %d w:%d\n", to_alpha_op(inst & 0xf),
582 (inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
583 (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), (inst >> 17) & 0x3,
584 (inst >> 19) & 0x3, toswiz((inst >> 21) & 0x7), (inst >> 24) & 0x3,
585 (inst >> 29) & 0x3,
586 (inst >> 31) & 0x1);
587
588 fprintf(stderr,"\t5 RGBA_INST: 0x%08x:", code->inst[n].inst5);
589 inst = code->inst[n].inst5;
590 fprintf(stderr,"%s dest:%d%s rgb_C_src:%d %s/%s/%s %d alp_C_src:%d %s %d\n", toop(inst & 0xf),
591 (inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
592 (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), toswiz((inst >> 17) & 0x7), toswiz((inst >> 20) & 0x7),
593 (inst >> 23) & 0x3,
594 (inst >> 25) & 0x3, toswiz((inst >> 27) & 0x7), (inst >> 30) & 0x3);
595 break;
596 case 2:
597 break;
598 case 3:
599 inst = code->inst[n].inst1;
600 fprintf(stderr,"\t1:TEX_INST: 0x%08x: id: %d op:%s, %s, %s %s\n", inst, (inst >> 16) & 0xf,
601 to_texop((inst >> 22) & 0x7), (inst & (1<<25)) ? "ACQ" : "",
602 (inst & (1<<26)) ? "IGNUNC" : "", (inst & (1<<27)) ? "UNSCALED" : "SCALED");
603 inst = code->inst[n].inst2;
604 fprintf(stderr,"\t2:TEX_ADDR: 0x%08x: src: %d%s %s/%s/%s/%s dst: %d%s %s/%s/%s/%s\n", inst,
605 inst & 127, inst & (1<<7) ? "(rel)" : "",
606 toswiz((inst >> 8) & 0x3), toswiz((inst >> 10) & 0x3),
607 toswiz((inst >> 12) & 0x3), toswiz((inst >> 14) & 0x3),
608 (inst >> 16) & 127, inst & (1<<23) ? "(rel)" : "",
609 toswiz((inst >> 24) & 0x3), toswiz((inst >> 26) & 0x3),
610 toswiz((inst >> 28) & 0x3), toswiz((inst >> 30) & 0x3));
611
612 fprintf(stderr,"\t3:TEX_DXDY: 0x%08x\n", code->inst[n].inst3);
613 break;
614 }
615 fprintf(stderr,"\n");
616 }
617
618 }