2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 #include "r500_fragprog.h"
32 #include "../r300_reg.h"
35 * Rewrite IF instructions to use the ALU result special register.
37 int r500_transform_IF(
38 struct radeon_compiler
* c
,
39 struct rc_instruction
* inst
,
42 if (inst
->U
.I
.Opcode
!= RC_OPCODE_IF
)
45 struct rc_instruction
* inst_mov
= rc_insert_new_instruction(c
, inst
->Prev
);
46 inst_mov
->U
.I
.Opcode
= RC_OPCODE_MOV
;
47 inst_mov
->U
.I
.DstReg
.WriteMask
= 0;
48 inst_mov
->U
.I
.WriteALUResult
= RC_ALURESULT_W
;
49 inst_mov
->U
.I
.ALUResultCompare
= RC_COMPARE_FUNC_NOTEQUAL
;
50 inst_mov
->U
.I
.SrcReg
[0] = inst
->U
.I
.SrcReg
[0];
51 inst_mov
->U
.I
.SrcReg
[0].Swizzle
= combine_swizzles4(inst_mov
->U
.I
.SrcReg
[0].Swizzle
,
52 RC_SWIZZLE_UNUSED
, RC_SWIZZLE_UNUSED
, RC_SWIZZLE_UNUSED
, RC_SWIZZLE_X
);
54 inst
->U
.I
.SrcReg
[0].File
= RC_FILE_SPECIAL
;
55 inst
->U
.I
.SrcReg
[0].Index
= RC_SPECIAL_ALU_RESULT
;
56 inst
->U
.I
.SrcReg
[0].Swizzle
= RC_SWIZZLE_XYZW
;
57 inst
->U
.I
.SrcReg
[0].Negate
= 0;
62 static int r500_swizzle_is_native(rc_opcode opcode
, struct rc_src_register reg
)
64 unsigned int relevant
;
67 if (opcode
== RC_OPCODE_TEX
||
68 opcode
== RC_OPCODE_TXB
||
69 opcode
== RC_OPCODE_TXP
||
70 opcode
== RC_OPCODE_KIL
) {
74 if (opcode
== RC_OPCODE_KIL
&& (reg
.Swizzle
!= RC_SWIZZLE_XYZW
|| reg
.Negate
!= RC_MASK_NONE
))
78 reg
.Negate
^= RC_MASK_XYZW
;
80 for(i
= 0; i
< 4; ++i
) {
81 unsigned int swz
= GET_SWZ(reg
.Swizzle
, i
);
82 if (swz
== RC_SWIZZLE_UNUSED
) {
83 reg
.Negate
&= ~(1 << i
);
94 } else if (opcode
== RC_OPCODE_DDX
|| opcode
== RC_OPCODE_DDY
) {
95 /* DDX/MDH and DDY/MDV explicitly ignore incoming swizzles;
96 * if it doesn't fit perfectly into a .xyzw case... */
97 if (reg
.Swizzle
== RC_SWIZZLE_XYZW
&& !reg
.Abs
&& !reg
.Negate
)
102 /* ALU instructions support almost everything */
107 for(i
= 0; i
< 3; ++i
) {
108 unsigned int swz
= GET_SWZ(reg
.Swizzle
, i
);
109 if (swz
!= RC_SWIZZLE_UNUSED
&& swz
!= RC_SWIZZLE_ZERO
)
112 if ((reg
.Negate
& relevant
) && ((reg
.Negate
& relevant
) != relevant
))
120 * Split source register access.
122 * The only thing we *cannot* do in an ALU instruction is per-component
125 static void r500_swizzle_split(struct rc_src_register src
, unsigned int usemask
,
126 struct rc_swizzle_split
* split
)
128 unsigned int negatebase
[2] = { 0, 0 };
131 for(i
= 0; i
< 4; ++i
) {
132 unsigned int swz
= GET_SWZ(src
.Swizzle
, i
);
133 if (swz
== RC_SWIZZLE_UNUSED
|| !GET_BIT(usemask
, i
))
135 negatebase
[GET_BIT(src
.Negate
, i
)] |= 1 << i
;
138 split
->NumPhases
= 0;
140 for(i
= 0; i
<= 1; ++i
) {
144 split
->Phase
[split
->NumPhases
++] = negatebase
[i
];
148 struct rc_swizzle_caps r500_swizzle_caps
= {
149 .IsNative
= r500_swizzle_is_native
,
150 .Split
= r500_swizzle_split
153 static char *toswiz(int swiz_val
) {
167 static char *toop(int op_val
)
171 case 0: str
= "MAD"; break;
172 case 1: str
= "DP3"; break;
173 case 2: str
= "DP4"; break;
174 case 3: str
= "D2A"; break;
175 case 4: str
= "MIN"; break;
176 case 5: str
= "MAX"; break;
177 case 6: str
= "Reserved"; break;
178 case 7: str
= "CND"; break;
179 case 8: str
= "CMP"; break;
180 case 9: str
= "FRC"; break;
181 case 10: str
= "SOP"; break;
182 case 11: str
= "MDH"; break;
183 case 12: str
= "MDV"; break;
188 static char *to_alpha_op(int op_val
)
192 case 0: str
= "MAD"; break;
193 case 1: str
= "DP"; break;
194 case 2: str
= "MIN"; break;
195 case 3: str
= "MAX"; break;
196 case 4: str
= "Reserved"; break;
197 case 5: str
= "CND"; break;
198 case 6: str
= "CMP"; break;
199 case 7: str
= "FRC"; break;
200 case 8: str
= "EX2"; break;
201 case 9: str
= "LN2"; break;
202 case 10: str
= "RCP"; break;
203 case 11: str
= "RSQ"; break;
204 case 12: str
= "SIN"; break;
205 case 13: str
= "COS"; break;
206 case 14: str
= "MDH"; break;
207 case 15: str
= "MDV"; break;
212 static char *to_mask(int val
)
216 case 0: str
= "NONE"; break;
217 case 1: str
= "R"; break;
218 case 2: str
= "G"; break;
219 case 3: str
= "RG"; break;
220 case 4: str
= "B"; break;
221 case 5: str
= "RB"; break;
222 case 6: str
= "GB"; break;
223 case 7: str
= "RGB"; break;
224 case 8: str
= "A"; break;
225 case 9: str
= "AR"; break;
226 case 10: str
= "AG"; break;
227 case 11: str
= "ARG"; break;
228 case 12: str
= "AB"; break;
229 case 13: str
= "ARB"; break;
230 case 14: str
= "AGB"; break;
231 case 15: str
= "ARGB"; break;
236 static char *to_texop(int val
)
239 case 0: return "NOP";
241 case 2: return "TEXKILL";
242 case 3: return "PROJ";
243 case 4: return "LODBIAS";
244 case 5: return "LOD";
245 case 6: return "DXDY";
250 void r500FragmentProgramDump(struct rX00_fragment_program_code
*c
)
252 struct r500_fragment_program_code
*code
= &c
->code
.r500
;
253 fprintf(stderr
, "R500 Fragment Program:\n--------\n");
260 for (n
= 0; n
< code
->inst_end
+1; n
++) {
261 inst0
= inst
= code
->inst
[n
].inst0
;
262 fprintf(stderr
,"%d\t0:CMN_INST 0x%08x:", n
, inst
);
264 case R500_INST_TYPE_ALU
: str
= "ALU"; break;
265 case R500_INST_TYPE_OUT
: str
= "OUT"; break;
266 case R500_INST_TYPE_FC
: str
= "FC"; break;
267 case R500_INST_TYPE_TEX
: str
= "TEX"; break;
269 fprintf(stderr
,"%s %s %s %s %s ", str
,
270 inst
& R500_INST_TEX_SEM_WAIT
? "TEX_WAIT" : "",
271 inst
& R500_INST_LAST
? "LAST" : "",
272 inst
& R500_INST_NOP
? "NOP" : "",
273 inst
& R500_INST_ALU_WAIT
? "ALU WAIT" : "");
274 fprintf(stderr
,"wmask: %s omask: %s\n", to_mask((inst
>> 11) & 0xf),
275 to_mask((inst
>> 15) & 0xf));
277 switch(inst0
& 0x3) {
278 case R500_INST_TYPE_ALU
:
279 case R500_INST_TYPE_OUT
:
280 fprintf(stderr
,"\t1:RGB_ADDR 0x%08x:", code
->inst
[n
].inst1
);
281 inst
= code
->inst
[n
].inst1
;
283 fprintf(stderr
,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
284 inst
& 0xff, (inst
& (1<<8)) ? 'c' : 't',
285 (inst
>> 10) & 0xff, (inst
& (1<<18)) ? 'c' : 't',
286 (inst
>> 20) & 0xff, (inst
& (1<<28)) ? 'c' : 't',
289 fprintf(stderr
,"\t2:ALPHA_ADDR 0x%08x:", code
->inst
[n
].inst2
);
290 inst
= code
->inst
[n
].inst2
;
291 fprintf(stderr
,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
292 inst
& 0xff, (inst
& (1<<8)) ? 'c' : 't',
293 (inst
>> 10) & 0xff, (inst
& (1<<18)) ? 'c' : 't',
294 (inst
>> 20) & 0xff, (inst
& (1<<28)) ? 'c' : 't',
296 fprintf(stderr
,"\t3 RGB_INST: 0x%08x:", code
->inst
[n
].inst3
);
297 inst
= code
->inst
[n
].inst3
;
298 fprintf(stderr
,"rgb_A_src:%d %s/%s/%s %d rgb_B_src:%d %s/%s/%s %d targ: %d\n",
299 (inst
) & 0x3, toswiz((inst
>> 2) & 0x7), toswiz((inst
>> 5) & 0x7), toswiz((inst
>> 8) & 0x7),
301 (inst
>> 13) & 0x3, toswiz((inst
>> 15) & 0x7), toswiz((inst
>> 18) & 0x7), toswiz((inst
>> 21) & 0x7),
302 (inst
>> 24) & 0x3, (inst
>> 29) & 0x3);
305 fprintf(stderr
,"\t4 ALPHA_INST:0x%08x:", code
->inst
[n
].inst4
);
306 inst
= code
->inst
[n
].inst4
;
307 fprintf(stderr
,"%s dest:%d%s alp_A_src:%d %s %d alp_B_src:%d %s %d targ %d w:%d\n", to_alpha_op(inst
& 0xf),
308 (inst
>> 4) & 0x7f, inst
& (1<<11) ? "(rel)":"",
309 (inst
>> 12) & 0x3, toswiz((inst
>> 14) & 0x7), (inst
>> 17) & 0x3,
310 (inst
>> 19) & 0x3, toswiz((inst
>> 21) & 0x7), (inst
>> 24) & 0x3,
314 fprintf(stderr
,"\t5 RGBA_INST: 0x%08x:", code
->inst
[n
].inst5
);
315 inst
= code
->inst
[n
].inst5
;
316 fprintf(stderr
,"%s dest:%d%s rgb_C_src:%d %s/%s/%s %d alp_C_src:%d %s %d\n", toop(inst
& 0xf),
317 (inst
>> 4) & 0x7f, inst
& (1<<11) ? "(rel)":"",
318 (inst
>> 12) & 0x3, toswiz((inst
>> 14) & 0x7), toswiz((inst
>> 17) & 0x7), toswiz((inst
>> 20) & 0x7),
320 (inst
>> 25) & 0x3, toswiz((inst
>> 27) & 0x7), (inst
>> 30) & 0x3);
322 case R500_INST_TYPE_FC
:
323 fprintf(stderr
, "\t2:FC_INST 0x%08x:", code
->inst
[n
].inst2
);
324 inst
= code
->inst
[n
].inst2
;
325 /* JUMP_FUNC JUMP_ANY*/
326 fprintf(stderr
, "0x%02x %1x ", inst
>> 8 & 0xff,
327 (inst
& R500_FC_JUMP_ANY
) >> 5);
331 case R500_FC_OP_JUMP
:
332 fprintf(stderr
, "JUMP");
334 case R500_FC_OP_LOOP
:
335 fprintf(stderr
, "LOOP");
337 case R500_FC_OP_ENDLOOP
:
338 fprintf(stderr
, "ENDLOOP");
341 fprintf(stderr
, "REP");
343 case R500_FC_OP_ENDREP
:
344 fprintf(stderr
, "ENDREP");
346 case R500_FC_OP_BREAKLOOP
:
347 fprintf(stderr
, "BREAKLOOP");
349 case R500_FC_OP_BREAKREP
:
350 fprintf(stderr
, "BREAKREP");
352 case R500_FC_OP_CONTINUE
:
353 fprintf(stderr
, "CONTINUE");
358 switch(inst
& (0x3 << 6)){
359 case R500_FC_A_OP_NONE
:
360 fprintf(stderr
, "NONE");
362 case R500_FC_A_OP_POP
:
363 fprintf(stderr
, "POP");
365 case R500_FC_A_OP_PUSH
:
366 fprintf(stderr
, "PUSH");
371 fprintf(stderr
, " ");
372 switch(inst
& (0x3 << (24 + (i
* 2)))){
373 /* R500_FC_B_OP0_NONE
374 * R500_FC_B_OP1_NONE */
376 fprintf(stderr
, "NONE");
378 case R500_FC_B_OP0_DECR
:
379 case R500_FC_B_OP1_DECR
:
380 fprintf(stderr
, "DECR");
382 case R500_FC_B_OP0_INCR
:
383 case R500_FC_B_OP1_INCR
:
384 fprintf(stderr
, "INCR");
389 fprintf(stderr
, " %d %1x", (inst
>> 16) & 0x1f, (inst
& R500_FC_B_ELSE
) >> 4);
390 inst
= code
->inst
[n
].inst3
;
392 fprintf(stderr
, " %d", inst
>> 16);
394 if(code
->inst
[n
].inst2
& R500_FC_IGNORE_UNCOVERED
){
395 fprintf(stderr
, " IGN_UNC");
397 inst
= code
->inst
[n
].inst3
;
398 fprintf(stderr
, "\n\t3:FC_ADDR 0x%08x:", inst
);
399 fprintf(stderr
, "BOOL: 0x%02x, INT: 0x%02x, JUMP_ADDR: %d, JMP_GLBL: %1x\n",
400 inst
& 0x1f, (inst
>> 8) & 0x1f, (inst
>> 16) & 0x1ff, inst
>> 31);
402 case R500_INST_TYPE_TEX
:
403 inst
= code
->inst
[n
].inst1
;
404 fprintf(stderr
,"\t1:TEX_INST: 0x%08x: id: %d op:%s, %s, %s %s\n", inst
, (inst
>> 16) & 0xf,
405 to_texop((inst
>> 22) & 0x7), (inst
& (1<<25)) ? "ACQ" : "",
406 (inst
& (1<<26)) ? "IGNUNC" : "", (inst
& (1<<27)) ? "UNSCALED" : "SCALED");
407 inst
= code
->inst
[n
].inst2
;
408 fprintf(stderr
,"\t2:TEX_ADDR: 0x%08x: src: %d%s %s/%s/%s/%s dst: %d%s %s/%s/%s/%s\n", inst
,
409 inst
& 127, inst
& (1<<7) ? "(rel)" : "",
410 toswiz((inst
>> 8) & 0x3), toswiz((inst
>> 10) & 0x3),
411 toswiz((inst
>> 12) & 0x3), toswiz((inst
>> 14) & 0x3),
412 (inst
>> 16) & 127, inst
& (1<<23) ? "(rel)" : "",
413 toswiz((inst
>> 24) & 0x3), toswiz((inst
>> 26) & 0x3),
414 toswiz((inst
>> 28) & 0x3), toswiz((inst
>> 30) & 0x3));
416 fprintf(stderr
,"\t3:TEX_DXDY: 0x%08x\n", code
->inst
[n
].inst3
);
419 fprintf(stderr
,"\n");