src/mesa/drivers/dri/r300/compiler/r500_fragprog.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining
   7  * a copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sublicense, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial
  16  * portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  */
  27
  28 #include "r500_fragprog.h"
  29
  30 #include "../r300_reg.h"
  31
  32 static struct prog_src_register shadow_ambient(struct gl_program *program, int tmu)
  33 {
  34         gl_state_index fail_value_tokens[STATE_LENGTH] = {
  35                 STATE_INTERNAL, STATE_SHADOW_AMBIENT, 0, 0, 0
  36         };
  37         struct prog_src_register reg = { 0, };
  38
  39         fail_value_tokens[2] = tmu;
  40         reg.File = PROGRAM_STATE_VAR;
  41         reg.Index = _mesa_add_state_reference(program->Parameters, fail_value_tokens);
  42         reg.Swizzle = SWIZZLE_WWWW;
  43         return reg;
  44 }
  45
  46 /**
  47  * Transform TEX, TXP, TXB, and KIL instructions in the following way:
  48  *  - premultiply texture coordinates for RECT
  49  *  - extract operand swizzles
  50  *  - introduce a temporary register when write masks are needed
  51  *
  52  */
  53 GLboolean r500_transform_TEX(
  54         struct radeon_transform_context *t,
  55         struct prog_instruction* orig_inst, void* data)
  56 {
  57         struct r300_fragment_program_compiler *compiler =
  58                 (struct r300_fragment_program_compiler*)data;
  59         struct prog_instruction inst = *orig_inst;
  60         struct prog_instruction* tgt;
  61         GLboolean destredirect = GL_FALSE;
  62
  63         if (inst.Opcode != OPCODE_TEX &&
  64             inst.Opcode != OPCODE_TXB &&
  65             inst.Opcode != OPCODE_TXP &&
  66             inst.Opcode != OPCODE_KIL)
  67                 return GL_FALSE;
  68
  69         /* ARB_shadow & EXT_shadow_funcs */
  70         if (inst.Opcode != OPCODE_KIL &&
  71             t->Program->ShadowSamplers & (1 << inst.TexSrcUnit)) {
  72                 GLuint comparefunc = GL_NEVER + compiler->state.unit[inst.TexSrcUnit].texture_compare_func;
  73
  74                 if (comparefunc == GL_NEVER || comparefunc == GL_ALWAYS) {
  75                         tgt = radeonAppendInstructions(t->Program, 1);
  76
  77                         tgt->Opcode = OPCODE_MOV;
  78                         tgt->DstReg = inst.DstReg;
  79                         if (comparefunc == GL_ALWAYS) {
  80                                 tgt->SrcReg[0].File = PROGRAM_BUILTIN;
  81                                 tgt->SrcReg[0].Swizzle = SWIZZLE_1111;
  82                         } else {
  83                                 tgt->SrcReg[0] = shadow_ambient(t->Program, inst.TexSrcUnit);
  84                         }
  85                         return GL_TRUE;
  86                 }
  87
  88                 inst.DstReg.File = PROGRAM_TEMPORARY;
  89                 inst.DstReg.Index = radeonFindFreeTemporary(t);
  90                 inst.DstReg.WriteMask = WRITEMASK_XYZW;
  91         } else if (inst.Opcode != OPCODE_KIL && inst.DstReg.File != PROGRAM_TEMPORARY) {
  92                 int tempreg = radeonFindFreeTemporary(t);
  93
  94                 inst.DstReg.File = PROGRAM_TEMPORARY;
  95                 inst.DstReg.Index = tempreg;
  96                 inst.DstReg.WriteMask = WRITEMASK_XYZW;
  97                 destredirect = GL_TRUE;
  98         }
  99
 100         if (inst.SrcReg[0].File != PROGRAM_TEMPORARY && inst.SrcReg[0].File != PROGRAM_INPUT) {
 101                 int tmpreg = radeonFindFreeTemporary(t);
 102                 tgt = radeonAppendInstructions(t->Program, 1);
 103                 tgt->Opcode = OPCODE_MOV;
 104                 tgt->DstReg.File = PROGRAM_TEMPORARY;
 105                 tgt->DstReg.Index = tmpreg;
 106                 tgt->SrcReg[0] = inst.SrcReg[0];
 107
 108                 reset_srcreg(&inst.SrcReg[0]);
 109                 inst.SrcReg[0].File = PROGRAM_TEMPORARY;
 110                 inst.SrcReg[0].Index = tmpreg;
 111         }
 112
 113         tgt = radeonAppendInstructions(t->Program, 1);
 114         _mesa_copy_instructions(tgt, &inst, 1);
 115
 116         if (inst.Opcode != OPCODE_KIL &&
 117             t->Program->ShadowSamplers & (1 << inst.TexSrcUnit)) {
 118                 GLuint comparefunc = GL_NEVER + compiler->state.unit[inst.TexSrcUnit].texture_compare_func;
 119                 GLuint depthmode = compiler->state.unit[inst.TexSrcUnit].depth_texture_mode;
 120                 int rcptemp = radeonFindFreeTemporary(t);
 121                 int pass, fail;
 122
 123                 tgt = radeonAppendInstructions(t->Program, 3);
 124
 125                 tgt[0].Opcode = OPCODE_RCP;
 126                 tgt[0].DstReg.File = PROGRAM_TEMPORARY;
 127                 tgt[0].DstReg.Index = rcptemp;
 128                 tgt[0].DstReg.WriteMask = WRITEMASK_W;
 129                 tgt[0].SrcReg[0] = inst.SrcReg[0];
 130                 tgt[0].SrcReg[0].Swizzle = SWIZZLE_WWWW;
 131
 132                 tgt[1].Opcode = OPCODE_MAD;
 133                 tgt[1].DstReg = inst.DstReg;
 134                 tgt[1].DstReg.WriteMask = orig_inst->DstReg.WriteMask;
 135                 tgt[1].SrcReg[0] = inst.SrcReg[0];
 136                 tgt[1].SrcReg[0].Swizzle = SWIZZLE_ZZZZ;
 137                 tgt[1].SrcReg[1].File = PROGRAM_TEMPORARY;
 138                 tgt[1].SrcReg[1].Index = rcptemp;
 139                 tgt[1].SrcReg[1].Swizzle = SWIZZLE_WWWW;
 140                 tgt[1].SrcReg[2].File = PROGRAM_TEMPORARY;
 141                 tgt[1].SrcReg[2].Index = inst.DstReg.Index;
 142                 if (depthmode == 0) /* GL_LUMINANCE */
 143                         tgt[1].SrcReg[2].Swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z);
 144                 else if (depthmode == 2) /* GL_ALPHA */
 145                         tgt[1].SrcReg[2].Swizzle = SWIZZLE_WWWW;
 146
 147                 /* Recall that SrcReg[0] is tex, SrcReg[2] is r and:
 148                  *   r  < tex  <=>      -tex+r < 0
 149                  *   r >= tex  <=> not (-tex+r < 0 */
 150                 if (comparefunc == GL_LESS || comparefunc == GL_GEQUAL)
 151                         tgt[1].SrcReg[2].Negate = tgt[0].SrcReg[2].Negate ^ NEGATE_XYZW;
 152                 else
 153                         tgt[1].SrcReg[0].Negate = tgt[0].SrcReg[0].Negate ^ NEGATE_XYZW;
 154
 155                 tgt[2].Opcode = OPCODE_CMP;
 156                 tgt[2].DstReg = orig_inst->DstReg;
 157                 tgt[2].SrcReg[0].File = PROGRAM_TEMPORARY;
 158                 tgt[2].SrcReg[0].Index = tgt[1].DstReg.Index;
 159
 160                 if (comparefunc == GL_LESS || comparefunc == GL_GREATER) {
 161                         pass = 1;
 162                         fail = 2;
 163                 } else {
 164                         pass = 2;
 165                         fail = 1;
 166                 }
 167
 168                 tgt[2].SrcReg[pass].File = PROGRAM_BUILTIN;
 169                 tgt[2].SrcReg[pass].Swizzle = SWIZZLE_1111;
 170                 tgt[2].SrcReg[fail] = shadow_ambient(t->Program, inst.TexSrcUnit);
 171         } else if (destredirect) {
 172                 tgt = radeonAppendInstructions(t->Program, 1);
 173
 174                 tgt->Opcode = OPCODE_MOV;
 175                 tgt->DstReg = orig_inst->DstReg;
 176                 tgt->SrcReg[0].File = PROGRAM_TEMPORARY;
 177                 tgt->SrcReg[0].Index = inst.DstReg.Index;
 178         }
 179
 180         return GL_TRUE;
 181 }
 182
 183 GLboolean r500FPIsNativeSwizzle(GLuint opcode, struct prog_src_register reg)
 184 {
 185         GLuint relevant;
 186         int i;
 187
 188         if (opcode == OPCODE_TEX ||
 189             opcode == OPCODE_TXB ||
 190             opcode == OPCODE_TXP ||
 191             opcode == OPCODE_KIL) {
 192                 if (reg.Abs)
 193                         return GL_FALSE;
 194
 195                 if (opcode == OPCODE_KIL && (reg.Swizzle != SWIZZLE_NOOP || reg.Negate != NEGATE_NONE))
 196                         return GL_FALSE;
 197
 198                 if (reg.Negate)
 199                         reg.Negate ^= NEGATE_XYZW;
 200
 201                 for(i = 0; i < 4; ++i) {
 202                         GLuint swz = GET_SWZ(reg.Swizzle, i);
 203                         if (swz == SWIZZLE_NIL) {
 204                                 reg.Negate &= ~(1 << i);
 205                                 continue;
 206                         }
 207                         if (swz >= 4)
 208                                 return GL_FALSE;
 209                 }
 210
 211                 if (reg.Negate)
 212                         return GL_FALSE;
 213
 214                 return GL_TRUE;
 215         } else if (opcode == OPCODE_DDX || opcode == OPCODE_DDY) {
 216                 /* DDX/MDH and DDY/MDV explicitly ignore incoming swizzles;
 217                  * if it doesn't fit perfectly into a .xyzw case... */
 218                 if (reg.Swizzle == SWIZZLE_NOOP && !reg.Abs && !reg.Negate)
 219                         return GL_TRUE;
 220
 221                 return GL_FALSE;
 222         } else {
 223                 /* ALU instructions support almost everything */
 224                 if (reg.Abs)
 225                         return GL_TRUE;
 226
 227                 relevant = 0;
 228                 for(i = 0; i < 3; ++i) {
 229                         GLuint swz = GET_SWZ(reg.Swizzle, i);
 230                         if (swz != SWIZZLE_NIL && swz != SWIZZLE_ZERO)
 231                                 relevant |= 1 << i;
 232                 }
 233                 if ((reg.Negate & relevant) && ((reg.Negate & relevant) != relevant))
 234                         return GL_FALSE;
 235
 236                 return GL_TRUE;
 237         }
 238 }
 239
 240 /**
 241  * Implement a MOV with a potentially non-native swizzle.
 242  *
 243  * The only thing we *cannot* do in an ALU instruction is per-component
 244  * negation. Therefore, we split the MOV into two instructions when necessary.
 245  */
 246 void r500FPBuildSwizzle(struct nqssadce_state *s, struct prog_dst_register dst, struct prog_src_register src)
 247 {
 248         GLuint negatebase[2] = { 0, 0 };
 249         int i;
 250
 251         for(i = 0; i < 4; ++i) {
 252                 GLuint swz = GET_SWZ(src.Swizzle, i);
 253                 if (swz == SWIZZLE_NIL)
 254                         continue;
 255                 negatebase[GET_BIT(src.Negate, i)] |= 1 << i;
 256         }
 257
 258         for(i = 0; i <= 1; ++i) {
 259                 if (!negatebase[i])
 260                         continue;
 261
 262                 struct rc_instruction *inst = rc_insert_new_instruction(s->Compiler, s->IP->Prev);
 263                 inst->I.Opcode = OPCODE_MOV;
 264                 inst->I.DstReg = dst;
 265                 inst->I.DstReg.WriteMask = negatebase[i];
 266                 inst->I.SrcReg[0] = src;
 267                 inst->I.SrcReg[0].Negate = (i == 0) ? NEGATE_NONE : NEGATE_XYZW;
 268         }
 269 }
 270
 271
 272 static char *toswiz(int swiz_val) {
 273   switch(swiz_val) {
 274   case 0: return "R";
 275   case 1: return "G";
 276   case 2: return "B";
 277   case 3: return "A";
 278   case 4: return "0";
 279   case 5: return "1/2";
 280   case 6: return "1";
 281   case 7: return "U";
 282   }
 283   return NULL;
 284 }
 285
 286 static char *toop(int op_val)
 287 {
 288   char *str = NULL;
 289   switch (op_val) {
 290   case 0: str = "MAD"; break;
 291   case 1: str = "DP3"; break;
 292   case 2: str = "DP4"; break;
 293   case 3: str = "D2A"; break;
 294   case 4: str = "MIN"; break;
 295   case 5: str = "MAX"; break;
 296   case 6: str = "Reserved"; break;
 297   case 7: str = "CND"; break;
 298   case 8: str = "CMP"; break;
 299   case 9: str = "FRC"; break;
 300   case 10: str = "SOP"; break;
 301   case 11: str = "MDH"; break;
 302   case 12: str = "MDV"; break;
 303   }
 304   return str;
 305 }
 306
 307 static char *to_alpha_op(int op_val)
 308 {
 309   char *str = NULL;
 310   switch (op_val) {
 311   case 0: str = "MAD"; break;
 312   case 1: str = "DP"; break;
 313   case 2: str = "MIN"; break;
 314   case 3: str = "MAX"; break;
 315   case 4: str = "Reserved"; break;
 316   case 5: str = "CND"; break;
 317   case 6: str = "CMP"; break;
 318   case 7: str = "FRC"; break;
 319   case 8: str = "EX2"; break;
 320   case 9: str = "LN2"; break;
 321   case 10: str = "RCP"; break;
 322   case 11: str = "RSQ"; break;
 323   case 12: str = "SIN"; break;
 324   case 13: str = "COS"; break;
 325   case 14: str = "MDH"; break;
 326   case 15: str = "MDV"; break;
 327   }
 328   return str;
 329 }
 330
 331 static char *to_mask(int val)
 332 {
 333   char *str = NULL;
 334   switch(val) {
 335   case 0: str = "NONE"; break;
 336   case 1: str = "R"; break;
 337   case 2: str = "G"; break;
 338   case 3: str = "RG"; break;
 339   case 4: str = "B"; break;
 340   case 5: str = "RB"; break;
 341   case 6: str = "GB"; break;
 342   case 7: str = "RGB"; break;
 343   case 8: str = "A"; break;
 344   case 9: str = "AR"; break;
 345   case 10: str = "AG"; break;
 346   case 11: str = "ARG"; break;
 347   case 12: str = "AB"; break;
 348   case 13: str = "ARB"; break;
 349   case 14: str = "AGB"; break;
 350   case 15: str = "ARGB"; break;
 351   }
 352   return str;
 353 }
 354
 355 static char *to_texop(int val)
 356 {
 357   switch(val) {
 358   case 0: return "NOP";
 359   case 1: return "LD";
 360   case 2: return "TEXKILL";
 361   case 3: return "PROJ";
 362   case 4: return "LODBIAS";
 363   case 5: return "LOD";
 364   case 6: return "DXDY";
 365   }
 366   return NULL;
 367 }
 368
 369 void r500FragmentProgramDump(struct rX00_fragment_program_code *c)
 370 {
 371   struct r500_fragment_program_code *code = &c->code.r500;
 372   fprintf(stderr, "R500 Fragment Program:\n--------\n");
 373
 374   int n;
 375   uint32_t inst;
 376   uint32_t inst0;
 377   char *str = NULL;
 378
 379   for (n = 0; n < code->inst_end+1; n++) {
 380     inst0 = inst = code->inst[n].inst0;
 381     fprintf(stderr,"%d\t0:CMN_INST   0x%08x:", n, inst);
 382     switch(inst & 0x3) {
 383     case R500_INST_TYPE_ALU: str = "ALU"; break;
 384     case R500_INST_TYPE_OUT: str = "OUT"; break;
 385     case R500_INST_TYPE_FC: str = "FC"; break;
 386     case R500_INST_TYPE_TEX: str = "TEX"; break;
 387     };
 388     fprintf(stderr,"%s %s %s %s %s ", str,
 389             inst & R500_INST_TEX_SEM_WAIT ? "TEX_WAIT" : "",
 390             inst & R500_INST_LAST ? "LAST" : "",
 391             inst & R500_INST_NOP ? "NOP" : "",
 392             inst & R500_INST_ALU_WAIT ? "ALU WAIT" : "");
 393     fprintf(stderr,"wmask: %s omask: %s\n", to_mask((inst >> 11) & 0xf),
 394             to_mask((inst >> 15) & 0xf));
 395
 396     switch(inst0 & 0x3) {
 397     case 0:
 398     case 1:
 399       fprintf(stderr,"\t1:RGB_ADDR   0x%08x:", code->inst[n].inst1);
 400       inst = code->inst[n].inst1;
 401
 402       fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
 403               inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
 404               (inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't',
 405               (inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
 406               (inst >> 30));
 407
 408       fprintf(stderr,"\t2:ALPHA_ADDR 0x%08x:", code->inst[n].inst2);
 409       inst = code->inst[n].inst2;
 410       fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
 411               inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
 412               (inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't',
 413               (inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
 414               (inst >> 30));
 415       fprintf(stderr,"\t3 RGB_INST:  0x%08x:", code->inst[n].inst3);
 416       inst = code->inst[n].inst3;
 417       fprintf(stderr,"rgb_A_src:%d %s/%s/%s %d rgb_B_src:%d %s/%s/%s %d\n",
 418               (inst) & 0x3, toswiz((inst >> 2) & 0x7), toswiz((inst >> 5) & 0x7), toswiz((inst >> 8) & 0x7),
 419               (inst >> 11) & 0x3,
 420               (inst >> 13) & 0x3, toswiz((inst >> 15) & 0x7), toswiz((inst >> 18) & 0x7), toswiz((inst >> 21) & 0x7),
 421               (inst >> 24) & 0x3);
 422
 423
 424       fprintf(stderr,"\t4 ALPHA_INST:0x%08x:", code->inst[n].inst4);
 425       inst = code->inst[n].inst4;
 426       fprintf(stderr,"%s dest:%d%s alp_A_src:%d %s %d alp_B_src:%d %s %d w:%d\n", to_alpha_op(inst & 0xf),
 427               (inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
 428               (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), (inst >> 17) & 0x3,
 429               (inst >> 19) & 0x3, toswiz((inst >> 21) & 0x7), (inst >> 24) & 0x3,
 430               (inst >> 31) & 0x1);
 431
 432       fprintf(stderr,"\t5 RGBA_INST: 0x%08x:", code->inst[n].inst5);
 433       inst = code->inst[n].inst5;
 434       fprintf(stderr,"%s dest:%d%s rgb_C_src:%d %s/%s/%s %d alp_C_src:%d %s %d\n", toop(inst & 0xf),
 435               (inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
 436               (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), toswiz((inst >> 17) & 0x7), toswiz((inst >> 20) & 0x7),
 437               (inst >> 23) & 0x3,
 438               (inst >> 25) & 0x3, toswiz((inst >> 27) & 0x7), (inst >> 30) & 0x3);
 439       break;
 440     case 2:
 441       break;
 442     case 3:
 443       inst = code->inst[n].inst1;
 444       fprintf(stderr,"\t1:TEX_INST:  0x%08x: id: %d op:%s, %s, %s %s\n", inst, (inst >> 16) & 0xf,
 445               to_texop((inst >> 22) & 0x7), (inst & (1<<25)) ? "ACQ" : "",
 446               (inst & (1<<26)) ? "IGNUNC" : "", (inst & (1<<27)) ? "UNSCALED" : "SCALED");
 447       inst = code->inst[n].inst2;
 448       fprintf(stderr,"\t2:TEX_ADDR:  0x%08x: src: %d%s %s/%s/%s/%s dst: %d%s %s/%s/%s/%s\n", inst,
 449               inst & 127, inst & (1<<7) ? "(rel)" : "",
 450               toswiz((inst >> 8) & 0x3), toswiz((inst >> 10) & 0x3),
 451               toswiz((inst >> 12) & 0x3), toswiz((inst >> 14) & 0x3),
 452               (inst >> 16) & 127, inst & (1<<23) ? "(rel)" : "",
 453               toswiz((inst >> 24) & 0x3), toswiz((inst >> 26) & 0x3),
 454               toswiz((inst >> 28) & 0x3), toswiz((inst >> 30) & 0x3));
 455
 456       fprintf(stderr,"\t3:TEX_DXDY:  0x%08x\n", code->inst[n].inst3);
 457       break;
 458     }
 459     fprintf(stderr,"\n");
 460   }
 461
 462 }