r300/compiler: fix repeat wrap mode for TXP and NPOTs
[mesa.git] / src / mesa / drivers / dri / r300 / compiler / r500_fragprog.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 */
27
28 #include "r500_fragprog.h"
29
30 #include <stdio.h>
31
32 #include "../r300_reg.h"
33
34 static struct rc_src_register shadow_ambient(struct radeon_compiler * c, int tmu)
35 {
36 struct rc_src_register reg = { 0, };
37
38 reg.File = RC_FILE_CONSTANT;
39 reg.Index = rc_constants_add_state(&c->Program.Constants, RC_STATE_SHADOW_AMBIENT, tmu);
40 reg.Swizzle = RC_SWIZZLE_WWWW;
41 return reg;
42 }
43
44 /**
45 * Transform TEX, TXP, TXB, and KIL instructions in the following way:
46 * - implement texture compare (shadow extensions)
47 * - extract non-native source / destination operands
48 */
49 int r500_transform_TEX(
50 struct radeon_compiler * c,
51 struct rc_instruction * inst,
52 void* data)
53 {
54 struct r300_fragment_program_compiler *compiler =
55 (struct r300_fragment_program_compiler*)data;
56
57 if (inst->U.I.Opcode != RC_OPCODE_TEX &&
58 inst->U.I.Opcode != RC_OPCODE_TXB &&
59 inst->U.I.Opcode != RC_OPCODE_TXP &&
60 inst->U.I.Opcode != RC_OPCODE_KIL)
61 return 0;
62
63 /* ARB_shadow & EXT_shadow_funcs */
64 if (inst->U.I.Opcode != RC_OPCODE_KIL &&
65 c->Program.ShadowSamplers & (1 << inst->U.I.TexSrcUnit)) {
66 rc_compare_func comparefunc = compiler->state.unit[inst->U.I.TexSrcUnit].texture_compare_func;
67
68 if (comparefunc == RC_COMPARE_FUNC_NEVER || comparefunc == RC_COMPARE_FUNC_ALWAYS) {
69 inst->U.I.Opcode = RC_OPCODE_MOV;
70
71 if (comparefunc == RC_COMPARE_FUNC_ALWAYS) {
72 inst->U.I.SrcReg[0].File = RC_FILE_NONE;
73 inst->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_1111;
74 } else {
75 inst->U.I.SrcReg[0] = shadow_ambient(c, inst->U.I.TexSrcUnit);
76 }
77
78 return 1;
79 } else {
80 rc_compare_func comparefunc = compiler->state.unit[inst->U.I.TexSrcUnit].texture_compare_func;
81 unsigned int depthmode = compiler->state.unit[inst->U.I.TexSrcUnit].depth_texture_mode;
82 struct rc_instruction * inst_rcp = rc_insert_new_instruction(c, inst);
83 struct rc_instruction * inst_mad = rc_insert_new_instruction(c, inst_rcp);
84 struct rc_instruction * inst_cmp = rc_insert_new_instruction(c, inst_mad);
85 int pass, fail;
86
87 inst_rcp->U.I.Opcode = RC_OPCODE_RCP;
88 inst_rcp->U.I.DstReg.File = RC_FILE_TEMPORARY;
89 inst_rcp->U.I.DstReg.Index = rc_find_free_temporary(c);
90 inst_rcp->U.I.DstReg.WriteMask = RC_MASK_W;
91 inst_rcp->U.I.SrcReg[0] = inst->U.I.SrcReg[0];
92 inst_rcp->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_WWWW;
93
94 inst_cmp->U.I.DstReg = inst->U.I.DstReg;
95 inst->U.I.DstReg.File = RC_FILE_TEMPORARY;
96 inst->U.I.DstReg.Index = rc_find_free_temporary(c);
97 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW;
98
99 inst_mad->U.I.Opcode = RC_OPCODE_MAD;
100 inst_mad->U.I.DstReg.File = RC_FILE_TEMPORARY;
101 inst_mad->U.I.DstReg.Index = rc_find_free_temporary(c);
102 inst_mad->U.I.SrcReg[0] = inst->U.I.SrcReg[0];
103 inst_mad->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_ZZZZ;
104 inst_mad->U.I.SrcReg[1].File = RC_FILE_TEMPORARY;
105 inst_mad->U.I.SrcReg[1].Index = inst_rcp->U.I.DstReg.Index;
106 inst_mad->U.I.SrcReg[1].Swizzle = RC_SWIZZLE_WWWW;
107 inst_mad->U.I.SrcReg[2].File = RC_FILE_TEMPORARY;
108 inst_mad->U.I.SrcReg[2].Index = inst->U.I.DstReg.Index;
109 if (depthmode == 0) /* GL_LUMINANCE */
110 inst_mad->U.I.SrcReg[2].Swizzle = RC_MAKE_SWIZZLE(RC_SWIZZLE_X, RC_SWIZZLE_Y, RC_SWIZZLE_Z, RC_SWIZZLE_Z);
111 else if (depthmode == 2) /* GL_ALPHA */
112 inst_mad->U.I.SrcReg[2].Swizzle = RC_SWIZZLE_WWWW;
113
114 /* Recall that SrcReg[0] is tex, SrcReg[2] is r and:
115 * r < tex <=> -tex+r < 0
116 * r >= tex <=> not (-tex+r < 0 */
117 if (comparefunc == RC_COMPARE_FUNC_LESS || comparefunc == RC_COMPARE_FUNC_GEQUAL)
118 inst_mad->U.I.SrcReg[2].Negate = inst_mad->U.I.SrcReg[2].Negate ^ RC_MASK_XYZW;
119 else
120 inst_mad->U.I.SrcReg[0].Negate = inst_mad->U.I.SrcReg[0].Negate ^ RC_MASK_XYZW;
121
122 inst_cmp->U.I.Opcode = RC_OPCODE_CMP;
123 /* DstReg has been filled out above */
124 inst_cmp->U.I.SrcReg[0].File = RC_FILE_TEMPORARY;
125 inst_cmp->U.I.SrcReg[0].Index = inst_mad->U.I.DstReg.Index;
126
127 if (comparefunc == RC_COMPARE_FUNC_LESS || comparefunc == RC_COMPARE_FUNC_GREATER) {
128 pass = 1;
129 fail = 2;
130 } else {
131 pass = 2;
132 fail = 1;
133 }
134
135 inst_cmp->U.I.SrcReg[pass].File = RC_FILE_NONE;
136 inst_cmp->U.I.SrcReg[pass].Swizzle = RC_SWIZZLE_1111;
137 inst_cmp->U.I.SrcReg[fail] = shadow_ambient(c, inst->U.I.TexSrcUnit);
138 }
139 }
140
141 /* Texture wrap modes don't work on NPOT textures or texrects.
142 *
143 * The game plan is simple. We have two flags, fake_npot and
144 * non_normalized_coords, as well as a tex target. The RECT tex target
145 * will make the emitted code use non-scaled texcoords.
146 *
147 * Non-wrapped/clamped texcoords with NPOT are free in HW. Repeat and
148 * mirroring are not. If we need to repeat, we do:
149 *
150 * MUL temp, texcoord, <scaling factor constant>
151 * FRC temp, temp ; Discard integer portion of coords
152 *
153 * This gives us coords in [0, 1].
154 *
155 * Mirroring is trickier. We're going to start out like repeat:
156 *
157 * MUL temp0, texcoord, <scaling factor constant> ; De-mirror across axes
158 * MUL temp0, abs(temp0), 0.5 ; Pattern repeats in [0, 2]
159 * ; so scale to [0, 1]
160 * FRC temp0, temp0 ; Make the pattern repeat
161 * SGE temp1, temp0, 0.5 ; Select components that need to be "reflected"
162 * ; across the mirror
163 * MAD temp0, neg(0.5), temp1, temp0 ; Add -0.5 to the
164 * ; selected components
165 * ADD temp0, temp0, temp0 ; Poor man's 2x to undo earlier MUL
166 *
167 * This gives us coords in [0, 1].
168 *
169 * ~ C.
170 */
171 if (inst->U.I.Opcode != RC_OPCODE_KIL &&
172 (inst->U.I.TexSrcTarget == RC_TEXTURE_RECT ||
173 compiler->state.unit[inst->U.I.TexSrcUnit].fake_npot ||
174 compiler->state.unit[inst->U.I.TexSrcUnit].non_normalized_coords)) {
175 rc_wrap_mode wrapmode = compiler->state.unit[inst->U.I.TexSrcUnit].wrap_mode;
176 struct rc_instruction *inst_rect = NULL;
177 unsigned temp = rc_find_free_temporary(c);
178
179 if (compiler->state.unit[inst->U.I.TexSrcUnit].fake_npot &&
180 wrapmode != RC_WRAP_NONE) {
181
182 if ((inst->U.I.TexSrcTarget == RC_TEXTURE_RECT ||
183 compiler->state.unit[inst->U.I.TexSrcUnit].non_normalized_coords)) {
184 inst_rect = rc_insert_new_instruction(c, inst->Prev);
185
186 inst_rect->U.I.Opcode = RC_OPCODE_MUL;
187 inst_rect->U.I.DstReg.File = RC_FILE_TEMPORARY;
188 inst_rect->U.I.DstReg.Index = temp;
189 inst_rect->U.I.SrcReg[0] = inst->U.I.SrcReg[0];
190 inst_rect->U.I.SrcReg[1].File = RC_FILE_CONSTANT;
191 inst_rect->U.I.SrcReg[1].Index =
192 rc_constants_add_state(&c->Program.Constants,
193 RC_STATE_R300_TEXRECT_FACTOR, inst->U.I.TexSrcUnit);
194
195 reset_srcreg(&inst->U.I.SrcReg[0]);
196 inst->U.I.SrcReg[0].File = RC_FILE_TEMPORARY;
197 inst->U.I.SrcReg[0].Index = temp;
198
199 inst->U.I.TexSrcTarget = RC_TEXTURE_2D;
200 }
201
202 if (wrapmode == RC_WRAP_REPEAT) {
203 /* Both instructions will be paired up. */
204 struct rc_instruction *inst_frc = rc_insert_new_instruction(c, inst->Prev);
205 struct rc_instruction *inst_mov = rc_insert_new_instruction(c, inst_frc);
206
207 inst_frc->U.I.Opcode = RC_OPCODE_FRC;
208 inst_frc->U.I.DstReg.File = RC_FILE_TEMPORARY;
209 inst_frc->U.I.DstReg.Index = temp;
210 inst_frc->U.I.DstReg.WriteMask = RC_MASK_XYZ;
211 inst_frc->U.I.SrcReg[0] = inst->U.I.SrcReg[0];
212
213 /* Preserve W for TXP. */
214 inst_mov->U.I.Opcode = RC_OPCODE_MOV;
215 inst_mov->U.I.DstReg.File = RC_FILE_TEMPORARY;
216 inst_mov->U.I.DstReg.Index = temp;
217 inst_mov->U.I.DstReg.WriteMask = RC_MASK_W;
218 inst_mov->U.I.SrcReg[0] = inst->U.I.SrcReg[0];
219
220 reset_srcreg(&inst->U.I.SrcReg[0]);
221 inst->U.I.SrcReg[0].File = RC_FILE_TEMPORARY;
222 inst->U.I.SrcReg[0].Index = temp;
223 } else if (wrapmode == RC_WRAP_MIRROR) {
224 unsigned temp1;
225 /*
226 * MUL temp0, abs(temp0), 0.5
227 * FRC temp0, temp0
228 * SGE temp1, temp0, 0.5
229 * MAD temp0, neg(0.5), temp1, temp0
230 * ADD temp0, temp0, temp0
231 */
232 inst_rect = rc_insert_new_instruction(c, inst->Prev);
233
234 inst_rect->U.I.Opcode = RC_OPCODE_MUL;
235 inst_rect->U.I.DstReg.File = RC_FILE_TEMPORARY;
236 inst_rect->U.I.DstReg.Index = temp;
237 inst_rect->U.I.SrcReg[0] = inst->U.I.SrcReg[0];
238 inst_rect->U.I.SrcReg[1].Swizzle = RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_HALF);
239
240 inst_rect = rc_insert_new_instruction(c, inst->Prev);
241
242 inst_rect->U.I.Opcode = RC_OPCODE_FRC;
243 inst_rect->U.I.DstReg.File = RC_FILE_TEMPORARY;
244 inst_rect->U.I.DstReg.Index = temp;
245 inst_rect->U.I.SrcReg[0].File = RC_FILE_TEMPORARY;
246 inst_rect->U.I.SrcReg[0].Index = temp;
247
248 temp1 = rc_find_free_temporary(c);
249 inst_rect = rc_insert_new_instruction(c, inst->Prev);
250
251 inst_rect->U.I.Opcode = RC_OPCODE_SGE;
252 inst_rect->U.I.DstReg.File = RC_FILE_TEMPORARY;
253 inst_rect->U.I.DstReg.Index = temp1;
254 inst_rect->U.I.SrcReg[0].File = RC_FILE_TEMPORARY;
255 inst_rect->U.I.SrcReg[0].Index = temp;
256 inst_rect->U.I.SrcReg[1].Swizzle = RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_HALF);
257
258 inst_rect = rc_insert_new_instruction(c, inst->Prev);
259
260 inst_rect->U.I.Opcode = RC_OPCODE_MAD;
261 inst_rect->U.I.DstReg.File = RC_FILE_TEMPORARY;
262 inst_rect->U.I.DstReg.Index = temp;
263 inst_rect->U.I.SrcReg[0].File = RC_FILE_TEMPORARY;
264 inst_rect->U.I.SrcReg[0].Index = temp1;
265 inst_rect->U.I.SrcReg[1].Swizzle = RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_HALF);
266 inst_rect->U.I.SrcReg[1].Negate = 1;
267 inst_rect->U.I.SrcReg[2].File = RC_FILE_TEMPORARY;
268 inst_rect->U.I.SrcReg[2].Index = temp;
269
270 inst_rect = rc_insert_new_instruction(c, inst->Prev);
271
272 inst_rect->U.I.Opcode = RC_OPCODE_ADD;
273 inst_rect->U.I.DstReg.File = RC_FILE_TEMPORARY;
274 inst_rect->U.I.DstReg.Index = temp;
275 inst_rect->U.I.SrcReg[0].File = RC_FILE_TEMPORARY;
276 inst_rect->U.I.SrcReg[0].Index = temp;
277 inst_rect->U.I.SrcReg[1].File = RC_FILE_TEMPORARY;
278 inst_rect->U.I.SrcReg[1].Index = temp;
279
280 reset_srcreg(&inst->U.I.SrcReg[0]);
281 inst->U.I.SrcReg[0].File = RC_FILE_TEMPORARY;
282 inst->U.I.SrcReg[0].Index = temp;
283 }
284 }
285 }
286
287 /* Cannot write texture to output registers */
288 if (inst->U.I.Opcode != RC_OPCODE_KIL && inst->U.I.DstReg.File != RC_FILE_TEMPORARY) {
289 struct rc_instruction * inst_mov = rc_insert_new_instruction(c, inst);
290
291 inst_mov->U.I.Opcode = RC_OPCODE_MOV;
292 inst_mov->U.I.DstReg = inst->U.I.DstReg;
293 inst_mov->U.I.SrcReg[0].File = RC_FILE_TEMPORARY;
294 inst_mov->U.I.SrcReg[0].Index = rc_find_free_temporary(c);
295
296 inst->U.I.DstReg.File = RC_FILE_TEMPORARY;
297 inst->U.I.DstReg.Index = inst_mov->U.I.SrcReg[0].Index;
298 inst->U.I.DstReg.WriteMask = RC_MASK_XYZW;
299 }
300
301 /* Cannot read texture coordinate from constants file */
302 if (inst->U.I.SrcReg[0].File != RC_FILE_TEMPORARY && inst->U.I.SrcReg[0].File != RC_FILE_INPUT) {
303 struct rc_instruction * inst_mov = rc_insert_new_instruction(c, inst->Prev);
304
305 inst_mov->U.I.Opcode = RC_OPCODE_MOV;
306 inst_mov->U.I.DstReg.File = RC_FILE_TEMPORARY;
307 inst_mov->U.I.DstReg.Index = rc_find_free_temporary(c);
308 inst_mov->U.I.SrcReg[0] = inst->U.I.SrcReg[0];
309
310 reset_srcreg(&inst->U.I.SrcReg[0]);
311 inst->U.I.SrcReg[0].File = RC_FILE_TEMPORARY;
312 inst->U.I.SrcReg[0].Index = inst_mov->U.I.DstReg.Index;
313 }
314
315 return 1;
316 }
317
318 /**
319 * Rewrite IF instructions to use the ALU result special register.
320 */
321 int r500_transform_IF(
322 struct radeon_compiler * c,
323 struct rc_instruction * inst,
324 void* data)
325 {
326 if (inst->U.I.Opcode != RC_OPCODE_IF)
327 return 0;
328
329 struct rc_instruction * inst_mov = rc_insert_new_instruction(c, inst->Prev);
330 inst_mov->U.I.Opcode = RC_OPCODE_MOV;
331 inst_mov->U.I.DstReg.WriteMask = 0;
332 inst_mov->U.I.WriteALUResult = RC_ALURESULT_W;
333 inst_mov->U.I.ALUResultCompare = RC_COMPARE_FUNC_NOTEQUAL;
334 inst_mov->U.I.SrcReg[0] = inst->U.I.SrcReg[0];
335 inst_mov->U.I.SrcReg[0].Swizzle = combine_swizzles4(inst_mov->U.I.SrcReg[0].Swizzle,
336 RC_SWIZZLE_UNUSED, RC_SWIZZLE_UNUSED, RC_SWIZZLE_UNUSED, RC_SWIZZLE_X);
337
338 inst->U.I.SrcReg[0].File = RC_FILE_SPECIAL;
339 inst->U.I.SrcReg[0].Index = RC_SPECIAL_ALU_RESULT;
340 inst->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_XYZW;
341 inst->U.I.SrcReg[0].Negate = 0;
342
343 return 1;
344 }
345
346 static int r500_swizzle_is_native(rc_opcode opcode, struct rc_src_register reg)
347 {
348 unsigned int relevant;
349 int i;
350
351 if (opcode == RC_OPCODE_TEX ||
352 opcode == RC_OPCODE_TXB ||
353 opcode == RC_OPCODE_TXP ||
354 opcode == RC_OPCODE_KIL) {
355 if (reg.Abs)
356 return 0;
357
358 if (opcode == RC_OPCODE_KIL && (reg.Swizzle != RC_SWIZZLE_XYZW || reg.Negate != RC_MASK_NONE))
359 return 0;
360
361 if (reg.Negate)
362 reg.Negate ^= RC_MASK_XYZW;
363
364 for(i = 0; i < 4; ++i) {
365 unsigned int swz = GET_SWZ(reg.Swizzle, i);
366 if (swz == RC_SWIZZLE_UNUSED) {
367 reg.Negate &= ~(1 << i);
368 continue;
369 }
370 if (swz >= 4)
371 return 0;
372 }
373
374 if (reg.Negate)
375 return 0;
376
377 return 1;
378 } else if (opcode == RC_OPCODE_DDX || opcode == RC_OPCODE_DDY) {
379 /* DDX/MDH and DDY/MDV explicitly ignore incoming swizzles;
380 * if it doesn't fit perfectly into a .xyzw case... */
381 if (reg.Swizzle == RC_SWIZZLE_XYZW && !reg.Abs && !reg.Negate)
382 return 1;
383
384 return 0;
385 } else {
386 /* ALU instructions support almost everything */
387 if (reg.Abs)
388 return 1;
389
390 relevant = 0;
391 for(i = 0; i < 3; ++i) {
392 unsigned int swz = GET_SWZ(reg.Swizzle, i);
393 if (swz != RC_SWIZZLE_UNUSED && swz != RC_SWIZZLE_ZERO)
394 relevant |= 1 << i;
395 }
396 if ((reg.Negate & relevant) && ((reg.Negate & relevant) != relevant))
397 return 0;
398
399 return 1;
400 }
401 }
402
403 /**
404 * Split source register access.
405 *
406 * The only thing we *cannot* do in an ALU instruction is per-component
407 * negation.
408 */
409 static void r500_swizzle_split(struct rc_src_register src, unsigned int usemask,
410 struct rc_swizzle_split * split)
411 {
412 unsigned int negatebase[2] = { 0, 0 };
413 int i;
414
415 for(i = 0; i < 4; ++i) {
416 unsigned int swz = GET_SWZ(src.Swizzle, i);
417 if (swz == RC_SWIZZLE_UNUSED || !GET_BIT(usemask, i))
418 continue;
419 negatebase[GET_BIT(src.Negate, i)] |= 1 << i;
420 }
421
422 split->NumPhases = 0;
423
424 for(i = 0; i <= 1; ++i) {
425 if (!negatebase[i])
426 continue;
427
428 split->Phase[split->NumPhases++] = negatebase[i];
429 }
430 }
431
432 struct rc_swizzle_caps r500_swizzle_caps = {
433 .IsNative = r500_swizzle_is_native,
434 .Split = r500_swizzle_split
435 };
436
437 static char *toswiz(int swiz_val) {
438 switch(swiz_val) {
439 case 0: return "R";
440 case 1: return "G";
441 case 2: return "B";
442 case 3: return "A";
443 case 4: return "0";
444 case 5: return "H";
445 case 6: return "1";
446 case 7: return "U";
447 }
448 return NULL;
449 }
450
451 static char *toop(int op_val)
452 {
453 char *str = NULL;
454 switch (op_val) {
455 case 0: str = "MAD"; break;
456 case 1: str = "DP3"; break;
457 case 2: str = "DP4"; break;
458 case 3: str = "D2A"; break;
459 case 4: str = "MIN"; break;
460 case 5: str = "MAX"; break;
461 case 6: str = "Reserved"; break;
462 case 7: str = "CND"; break;
463 case 8: str = "CMP"; break;
464 case 9: str = "FRC"; break;
465 case 10: str = "SOP"; break;
466 case 11: str = "MDH"; break;
467 case 12: str = "MDV"; break;
468 }
469 return str;
470 }
471
472 static char *to_alpha_op(int op_val)
473 {
474 char *str = NULL;
475 switch (op_val) {
476 case 0: str = "MAD"; break;
477 case 1: str = "DP"; break;
478 case 2: str = "MIN"; break;
479 case 3: str = "MAX"; break;
480 case 4: str = "Reserved"; break;
481 case 5: str = "CND"; break;
482 case 6: str = "CMP"; break;
483 case 7: str = "FRC"; break;
484 case 8: str = "EX2"; break;
485 case 9: str = "LN2"; break;
486 case 10: str = "RCP"; break;
487 case 11: str = "RSQ"; break;
488 case 12: str = "SIN"; break;
489 case 13: str = "COS"; break;
490 case 14: str = "MDH"; break;
491 case 15: str = "MDV"; break;
492 }
493 return str;
494 }
495
496 static char *to_mask(int val)
497 {
498 char *str = NULL;
499 switch(val) {
500 case 0: str = "NONE"; break;
501 case 1: str = "R"; break;
502 case 2: str = "G"; break;
503 case 3: str = "RG"; break;
504 case 4: str = "B"; break;
505 case 5: str = "RB"; break;
506 case 6: str = "GB"; break;
507 case 7: str = "RGB"; break;
508 case 8: str = "A"; break;
509 case 9: str = "AR"; break;
510 case 10: str = "AG"; break;
511 case 11: str = "ARG"; break;
512 case 12: str = "AB"; break;
513 case 13: str = "ARB"; break;
514 case 14: str = "AGB"; break;
515 case 15: str = "ARGB"; break;
516 }
517 return str;
518 }
519
520 static char *to_texop(int val)
521 {
522 switch(val) {
523 case 0: return "NOP";
524 case 1: return "LD";
525 case 2: return "TEXKILL";
526 case 3: return "PROJ";
527 case 4: return "LODBIAS";
528 case 5: return "LOD";
529 case 6: return "DXDY";
530 }
531 return NULL;
532 }
533
534 void r500FragmentProgramDump(struct rX00_fragment_program_code *c)
535 {
536 struct r500_fragment_program_code *code = &c->code.r500;
537 fprintf(stderr, "R500 Fragment Program:\n--------\n");
538
539 int n;
540 uint32_t inst;
541 uint32_t inst0;
542 char *str = NULL;
543
544 for (n = 0; n < code->inst_end+1; n++) {
545 inst0 = inst = code->inst[n].inst0;
546 fprintf(stderr,"%d\t0:CMN_INST 0x%08x:", n, inst);
547 switch(inst & 0x3) {
548 case R500_INST_TYPE_ALU: str = "ALU"; break;
549 case R500_INST_TYPE_OUT: str = "OUT"; break;
550 case R500_INST_TYPE_FC: str = "FC"; break;
551 case R500_INST_TYPE_TEX: str = "TEX"; break;
552 };
553 fprintf(stderr,"%s %s %s %s %s ", str,
554 inst & R500_INST_TEX_SEM_WAIT ? "TEX_WAIT" : "",
555 inst & R500_INST_LAST ? "LAST" : "",
556 inst & R500_INST_NOP ? "NOP" : "",
557 inst & R500_INST_ALU_WAIT ? "ALU WAIT" : "");
558 fprintf(stderr,"wmask: %s omask: %s\n", to_mask((inst >> 11) & 0xf),
559 to_mask((inst >> 15) & 0xf));
560
561 switch(inst0 & 0x3) {
562 case 0:
563 case 1:
564 fprintf(stderr,"\t1:RGB_ADDR 0x%08x:", code->inst[n].inst1);
565 inst = code->inst[n].inst1;
566
567 fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
568 inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
569 (inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't',
570 (inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
571 (inst >> 30));
572
573 fprintf(stderr,"\t2:ALPHA_ADDR 0x%08x:", code->inst[n].inst2);
574 inst = code->inst[n].inst2;
575 fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
576 inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
577 (inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't',
578 (inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
579 (inst >> 30));
580 fprintf(stderr,"\t3 RGB_INST: 0x%08x:", code->inst[n].inst3);
581 inst = code->inst[n].inst3;
582 fprintf(stderr,"rgb_A_src:%d %s/%s/%s %d rgb_B_src:%d %s/%s/%s %d targ: %d\n",
583 (inst) & 0x3, toswiz((inst >> 2) & 0x7), toswiz((inst >> 5) & 0x7), toswiz((inst >> 8) & 0x7),
584 (inst >> 11) & 0x3,
585 (inst >> 13) & 0x3, toswiz((inst >> 15) & 0x7), toswiz((inst >> 18) & 0x7), toswiz((inst >> 21) & 0x7),
586 (inst >> 24) & 0x3, (inst >> 29) & 0x3);
587
588
589 fprintf(stderr,"\t4 ALPHA_INST:0x%08x:", code->inst[n].inst4);
590 inst = code->inst[n].inst4;
591 fprintf(stderr,"%s dest:%d%s alp_A_src:%d %s %d alp_B_src:%d %s %d targ %d w:%d\n", to_alpha_op(inst & 0xf),
592 (inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
593 (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), (inst >> 17) & 0x3,
594 (inst >> 19) & 0x3, toswiz((inst >> 21) & 0x7), (inst >> 24) & 0x3,
595 (inst >> 29) & 0x3,
596 (inst >> 31) & 0x1);
597
598 fprintf(stderr,"\t5 RGBA_INST: 0x%08x:", code->inst[n].inst5);
599 inst = code->inst[n].inst5;
600 fprintf(stderr,"%s dest:%d%s rgb_C_src:%d %s/%s/%s %d alp_C_src:%d %s %d\n", toop(inst & 0xf),
601 (inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
602 (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), toswiz((inst >> 17) & 0x7), toswiz((inst >> 20) & 0x7),
603 (inst >> 23) & 0x3,
604 (inst >> 25) & 0x3, toswiz((inst >> 27) & 0x7), (inst >> 30) & 0x3);
605 break;
606 case 2:
607 break;
608 case 3:
609 inst = code->inst[n].inst1;
610 fprintf(stderr,"\t1:TEX_INST: 0x%08x: id: %d op:%s, %s, %s %s\n", inst, (inst >> 16) & 0xf,
611 to_texop((inst >> 22) & 0x7), (inst & (1<<25)) ? "ACQ" : "",
612 (inst & (1<<26)) ? "IGNUNC" : "", (inst & (1<<27)) ? "UNSCALED" : "SCALED");
613 inst = code->inst[n].inst2;
614 fprintf(stderr,"\t2:TEX_ADDR: 0x%08x: src: %d%s %s/%s/%s/%s dst: %d%s %s/%s/%s/%s\n", inst,
615 inst & 127, inst & (1<<7) ? "(rel)" : "",
616 toswiz((inst >> 8) & 0x3), toswiz((inst >> 10) & 0x3),
617 toswiz((inst >> 12) & 0x3), toswiz((inst >> 14) & 0x3),
618 (inst >> 16) & 127, inst & (1<<23) ? "(rel)" : "",
619 toswiz((inst >> 24) & 0x3), toswiz((inst >> 26) & 0x3),
620 toswiz((inst >> 28) & 0x3), toswiz((inst >> 30) & 0x3));
621
622 fprintf(stderr,"\t3:TEX_DXDY: 0x%08x\n", code->inst[n].inst3);
623 break;
624 }
625 fprintf(stderr,"\n");
626 }
627
628 }