Merge branch 'mesa_7_5_branch'
[mesa.git] / src / mesa / drivers / dri / r300 / compiler / r500_fragprog.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 */
27
28 #include "r500_fragprog.h"
29
30 #include "../r300_reg.h"
31
32 static struct prog_src_register shadow_ambient(struct radeon_compiler * c, int tmu)
33 {
34 struct prog_src_register reg = { 0, };
35
36 reg.File = PROGRAM_STATE_VAR;
37 reg.Index = rc_constants_add_state(&c->Program.Constants, RC_STATE_SHADOW_AMBIENT, tmu);
38 reg.Swizzle = SWIZZLE_WWWW;
39 return reg;
40 }
41
42 /**
43 * Transform TEX, TXP, TXB, and KIL instructions in the following way:
44 * - implement texture compare (shadow extensions)
45 * - extract non-native source / destination operands
46 */
47 GLboolean r500_transform_TEX(
48 struct radeon_compiler * c,
49 struct rc_instruction * inst,
50 void* data)
51 {
52 struct r300_fragment_program_compiler *compiler =
53 (struct r300_fragment_program_compiler*)data;
54
55 if (inst->I.Opcode != OPCODE_TEX &&
56 inst->I.Opcode != OPCODE_TXB &&
57 inst->I.Opcode != OPCODE_TXP &&
58 inst->I.Opcode != OPCODE_KIL)
59 return GL_FALSE;
60
61 /* ARB_shadow & EXT_shadow_funcs */
62 if (inst->I.Opcode != OPCODE_KIL &&
63 c->Program.ShadowSamplers & (1 << inst->I.TexSrcUnit)) {
64 GLuint comparefunc = GL_NEVER + compiler->state.unit[inst->I.TexSrcUnit].texture_compare_func;
65
66 if (comparefunc == GL_NEVER || comparefunc == GL_ALWAYS) {
67 inst->I.Opcode = OPCODE_MOV;
68
69 if (comparefunc == GL_ALWAYS) {
70 inst->I.SrcReg[0].File = PROGRAM_BUILTIN;
71 inst->I.SrcReg[0].Swizzle = SWIZZLE_1111;
72 } else {
73 inst->I.SrcReg[0] = shadow_ambient(c, inst->I.TexSrcUnit);
74 }
75
76 return GL_TRUE;
77 } else {
78 GLuint comparefunc = GL_NEVER + compiler->state.unit[inst->I.TexSrcUnit].texture_compare_func;
79 GLuint depthmode = compiler->state.unit[inst->I.TexSrcUnit].depth_texture_mode;
80 struct rc_instruction * inst_rcp = rc_insert_new_instruction(c, inst);
81 struct rc_instruction * inst_mad = rc_insert_new_instruction(c, inst_rcp);
82 struct rc_instruction * inst_cmp = rc_insert_new_instruction(c, inst_mad);
83 int pass, fail;
84
85 inst_rcp->I.Opcode = OPCODE_RCP;
86 inst_rcp->I.DstReg.File = PROGRAM_TEMPORARY;
87 inst_rcp->I.DstReg.Index = rc_find_free_temporary(c);
88 inst_rcp->I.DstReg.WriteMask = WRITEMASK_W;
89 inst_rcp->I.SrcReg[0] = inst->I.SrcReg[0];
90 inst_rcp->I.SrcReg[0].Swizzle = SWIZZLE_WWWW;
91
92 inst_cmp->I.DstReg = inst->I.DstReg;
93 inst->I.DstReg.File = PROGRAM_TEMPORARY;
94 inst->I.DstReg.Index = rc_find_free_temporary(c);
95 inst->I.DstReg.WriteMask = WRITEMASK_XYZW;
96
97 inst_mad->I.Opcode = OPCODE_MAD;
98 inst_mad->I.DstReg.File = PROGRAM_TEMPORARY;
99 inst_mad->I.DstReg.Index = rc_find_free_temporary(c);
100 inst_mad->I.SrcReg[0] = inst->I.SrcReg[0];
101 inst_mad->I.SrcReg[0].Swizzle = SWIZZLE_ZZZZ;
102 inst_mad->I.SrcReg[1].File = PROGRAM_TEMPORARY;
103 inst_mad->I.SrcReg[1].Index = inst_rcp->I.DstReg.Index;
104 inst_mad->I.SrcReg[1].Swizzle = SWIZZLE_WWWW;
105 inst_mad->I.SrcReg[2].File = PROGRAM_TEMPORARY;
106 inst_mad->I.SrcReg[2].Index = inst->I.DstReg.Index;
107 if (depthmode == 0) /* GL_LUMINANCE */
108 inst_mad->I.SrcReg[2].Swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z);
109 else if (depthmode == 2) /* GL_ALPHA */
110 inst_mad->I.SrcReg[2].Swizzle = SWIZZLE_WWWW;
111
112 /* Recall that SrcReg[0] is tex, SrcReg[2] is r and:
113 * r < tex <=> -tex+r < 0
114 * r >= tex <=> not (-tex+r < 0 */
115 if (comparefunc == GL_LESS || comparefunc == GL_GEQUAL)
116 inst_mad->I.SrcReg[2].Negate = inst_mad->I.SrcReg[2].Negate ^ NEGATE_XYZW;
117 else
118 inst_mad->I.SrcReg[0].Negate = inst_mad->I.SrcReg[0].Negate ^ NEGATE_XYZW;
119
120 inst_cmp->I.Opcode = OPCODE_CMP;
121 /* DstReg has been filled out above */
122 inst_cmp->I.SrcReg[0].File = PROGRAM_TEMPORARY;
123 inst_cmp->I.SrcReg[0].Index = inst_mad->I.DstReg.Index;
124
125 if (comparefunc == GL_LESS || comparefunc == GL_GREATER) {
126 pass = 1;
127 fail = 2;
128 } else {
129 pass = 2;
130 fail = 1;
131 }
132
133 inst_cmp->I.SrcReg[pass].File = PROGRAM_BUILTIN;
134 inst_cmp->I.SrcReg[pass].Swizzle = SWIZZLE_1111;
135 inst_cmp->I.SrcReg[fail] = shadow_ambient(c, inst->I.TexSrcUnit);
136 }
137 }
138
139 /* Cannot write texture to output registers */
140 if (inst->I.Opcode != OPCODE_KIL && inst->I.DstReg.File != PROGRAM_TEMPORARY) {
141 struct rc_instruction * inst_mov = rc_insert_new_instruction(c, inst);
142
143 inst_mov->I.Opcode = OPCODE_MOV;
144 inst_mov->I.DstReg = inst->I.DstReg;
145 inst_mov->I.SrcReg[0].File = PROGRAM_TEMPORARY;
146 inst_mov->I.SrcReg[0].Index = rc_find_free_temporary(c);
147
148 inst->I.DstReg.File = PROGRAM_TEMPORARY;
149 inst->I.DstReg.Index = inst_mov->I.SrcReg[0].Index;
150 inst->I.DstReg.WriteMask = WRITEMASK_XYZW;
151 }
152
153 /* Cannot read texture coordinate from constants file */
154 if (inst->I.SrcReg[0].File != PROGRAM_TEMPORARY && inst->I.SrcReg[0].File != PROGRAM_INPUT) {
155 struct rc_instruction * inst_mov = rc_insert_new_instruction(c, inst->Prev);
156
157 inst_mov->I.Opcode = OPCODE_MOV;
158 inst_mov->I.DstReg.File = PROGRAM_TEMPORARY;
159 inst_mov->I.DstReg.Index = rc_find_free_temporary(c);
160 inst_mov->I.SrcReg[0] = inst->I.SrcReg[0];
161
162 reset_srcreg(&inst->I.SrcReg[0]);
163 inst->I.SrcReg[0].File = PROGRAM_TEMPORARY;
164 inst->I.SrcReg[0].Index = inst_mov->I.DstReg.Index;
165 }
166
167 return GL_TRUE;
168 }
169
170 GLboolean r500FPIsNativeSwizzle(GLuint opcode, struct prog_src_register reg)
171 {
172 GLuint relevant;
173 int i;
174
175 if (opcode == OPCODE_TEX ||
176 opcode == OPCODE_TXB ||
177 opcode == OPCODE_TXP ||
178 opcode == OPCODE_KIL) {
179 if (reg.Abs)
180 return GL_FALSE;
181
182 if (opcode == OPCODE_KIL && (reg.Swizzle != SWIZZLE_NOOP || reg.Negate != NEGATE_NONE))
183 return GL_FALSE;
184
185 if (reg.Negate)
186 reg.Negate ^= NEGATE_XYZW;
187
188 for(i = 0; i < 4; ++i) {
189 GLuint swz = GET_SWZ(reg.Swizzle, i);
190 if (swz == SWIZZLE_NIL) {
191 reg.Negate &= ~(1 << i);
192 continue;
193 }
194 if (swz >= 4)
195 return GL_FALSE;
196 }
197
198 if (reg.Negate)
199 return GL_FALSE;
200
201 return GL_TRUE;
202 } else if (opcode == OPCODE_DDX || opcode == OPCODE_DDY) {
203 /* DDX/MDH and DDY/MDV explicitly ignore incoming swizzles;
204 * if it doesn't fit perfectly into a .xyzw case... */
205 if (reg.Swizzle == SWIZZLE_NOOP && !reg.Abs && !reg.Negate)
206 return GL_TRUE;
207
208 return GL_FALSE;
209 } else {
210 /* ALU instructions support almost everything */
211 if (reg.Abs)
212 return GL_TRUE;
213
214 relevant = 0;
215 for(i = 0; i < 3; ++i) {
216 GLuint swz = GET_SWZ(reg.Swizzle, i);
217 if (swz != SWIZZLE_NIL && swz != SWIZZLE_ZERO)
218 relevant |= 1 << i;
219 }
220 if ((reg.Negate & relevant) && ((reg.Negate & relevant) != relevant))
221 return GL_FALSE;
222
223 return GL_TRUE;
224 }
225 }
226
227 /**
228 * Implement a MOV with a potentially non-native swizzle.
229 *
230 * The only thing we *cannot* do in an ALU instruction is per-component
231 * negation. Therefore, we split the MOV into two instructions when necessary.
232 */
233 void r500FPBuildSwizzle(struct nqssadce_state *s, struct prog_dst_register dst, struct prog_src_register src)
234 {
235 GLuint negatebase[2] = { 0, 0 };
236 int i;
237
238 for(i = 0; i < 4; ++i) {
239 GLuint swz = GET_SWZ(src.Swizzle, i);
240 if (swz == SWIZZLE_NIL)
241 continue;
242 negatebase[GET_BIT(src.Negate, i)] |= 1 << i;
243 }
244
245 for(i = 0; i <= 1; ++i) {
246 if (!negatebase[i])
247 continue;
248
249 struct rc_instruction *inst = rc_insert_new_instruction(s->Compiler, s->IP->Prev);
250 inst->I.Opcode = OPCODE_MOV;
251 inst->I.DstReg = dst;
252 inst->I.DstReg.WriteMask = negatebase[i];
253 inst->I.SrcReg[0] = src;
254 inst->I.SrcReg[0].Negate = (i == 0) ? NEGATE_NONE : NEGATE_XYZW;
255 }
256 }
257
258
259 static char *toswiz(int swiz_val) {
260 switch(swiz_val) {
261 case 0: return "R";
262 case 1: return "G";
263 case 2: return "B";
264 case 3: return "A";
265 case 4: return "0";
266 case 5: return "1/2";
267 case 6: return "1";
268 case 7: return "U";
269 }
270 return NULL;
271 }
272
273 static char *toop(int op_val)
274 {
275 char *str = NULL;
276 switch (op_val) {
277 case 0: str = "MAD"; break;
278 case 1: str = "DP3"; break;
279 case 2: str = "DP4"; break;
280 case 3: str = "D2A"; break;
281 case 4: str = "MIN"; break;
282 case 5: str = "MAX"; break;
283 case 6: str = "Reserved"; break;
284 case 7: str = "CND"; break;
285 case 8: str = "CMP"; break;
286 case 9: str = "FRC"; break;
287 case 10: str = "SOP"; break;
288 case 11: str = "MDH"; break;
289 case 12: str = "MDV"; break;
290 }
291 return str;
292 }
293
294 static char *to_alpha_op(int op_val)
295 {
296 char *str = NULL;
297 switch (op_val) {
298 case 0: str = "MAD"; break;
299 case 1: str = "DP"; break;
300 case 2: str = "MIN"; break;
301 case 3: str = "MAX"; break;
302 case 4: str = "Reserved"; break;
303 case 5: str = "CND"; break;
304 case 6: str = "CMP"; break;
305 case 7: str = "FRC"; break;
306 case 8: str = "EX2"; break;
307 case 9: str = "LN2"; break;
308 case 10: str = "RCP"; break;
309 case 11: str = "RSQ"; break;
310 case 12: str = "SIN"; break;
311 case 13: str = "COS"; break;
312 case 14: str = "MDH"; break;
313 case 15: str = "MDV"; break;
314 }
315 return str;
316 }
317
318 static char *to_mask(int val)
319 {
320 char *str = NULL;
321 switch(val) {
322 case 0: str = "NONE"; break;
323 case 1: str = "R"; break;
324 case 2: str = "G"; break;
325 case 3: str = "RG"; break;
326 case 4: str = "B"; break;
327 case 5: str = "RB"; break;
328 case 6: str = "GB"; break;
329 case 7: str = "RGB"; break;
330 case 8: str = "A"; break;
331 case 9: str = "AR"; break;
332 case 10: str = "AG"; break;
333 case 11: str = "ARG"; break;
334 case 12: str = "AB"; break;
335 case 13: str = "ARB"; break;
336 case 14: str = "AGB"; break;
337 case 15: str = "ARGB"; break;
338 }
339 return str;
340 }
341
342 static char *to_texop(int val)
343 {
344 switch(val) {
345 case 0: return "NOP";
346 case 1: return "LD";
347 case 2: return "TEXKILL";
348 case 3: return "PROJ";
349 case 4: return "LODBIAS";
350 case 5: return "LOD";
351 case 6: return "DXDY";
352 }
353 return NULL;
354 }
355
356 void r500FragmentProgramDump(struct rX00_fragment_program_code *c)
357 {
358 struct r500_fragment_program_code *code = &c->code.r500;
359 fprintf(stderr, "R500 Fragment Program:\n--------\n");
360
361 int n;
362 uint32_t inst;
363 uint32_t inst0;
364 char *str = NULL;
365
366 for (n = 0; n < code->inst_end+1; n++) {
367 inst0 = inst = code->inst[n].inst0;
368 fprintf(stderr,"%d\t0:CMN_INST 0x%08x:", n, inst);
369 switch(inst & 0x3) {
370 case R500_INST_TYPE_ALU: str = "ALU"; break;
371 case R500_INST_TYPE_OUT: str = "OUT"; break;
372 case R500_INST_TYPE_FC: str = "FC"; break;
373 case R500_INST_TYPE_TEX: str = "TEX"; break;
374 };
375 fprintf(stderr,"%s %s %s %s %s ", str,
376 inst & R500_INST_TEX_SEM_WAIT ? "TEX_WAIT" : "",
377 inst & R500_INST_LAST ? "LAST" : "",
378 inst & R500_INST_NOP ? "NOP" : "",
379 inst & R500_INST_ALU_WAIT ? "ALU WAIT" : "");
380 fprintf(stderr,"wmask: %s omask: %s\n", to_mask((inst >> 11) & 0xf),
381 to_mask((inst >> 15) & 0xf));
382
383 switch(inst0 & 0x3) {
384 case 0:
385 case 1:
386 fprintf(stderr,"\t1:RGB_ADDR 0x%08x:", code->inst[n].inst1);
387 inst = code->inst[n].inst1;
388
389 fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
390 inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
391 (inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't',
392 (inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
393 (inst >> 30));
394
395 fprintf(stderr,"\t2:ALPHA_ADDR 0x%08x:", code->inst[n].inst2);
396 inst = code->inst[n].inst2;
397 fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
398 inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
399 (inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't',
400 (inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
401 (inst >> 30));
402 fprintf(stderr,"\t3 RGB_INST: 0x%08x:", code->inst[n].inst3);
403 inst = code->inst[n].inst3;
404 fprintf(stderr,"rgb_A_src:%d %s/%s/%s %d rgb_B_src:%d %s/%s/%s %d\n",
405 (inst) & 0x3, toswiz((inst >> 2) & 0x7), toswiz((inst >> 5) & 0x7), toswiz((inst >> 8) & 0x7),
406 (inst >> 11) & 0x3,
407 (inst >> 13) & 0x3, toswiz((inst >> 15) & 0x7), toswiz((inst >> 18) & 0x7), toswiz((inst >> 21) & 0x7),
408 (inst >> 24) & 0x3);
409
410
411 fprintf(stderr,"\t4 ALPHA_INST:0x%08x:", code->inst[n].inst4);
412 inst = code->inst[n].inst4;
413 fprintf(stderr,"%s dest:%d%s alp_A_src:%d %s %d alp_B_src:%d %s %d w:%d\n", to_alpha_op(inst & 0xf),
414 (inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
415 (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), (inst >> 17) & 0x3,
416 (inst >> 19) & 0x3, toswiz((inst >> 21) & 0x7), (inst >> 24) & 0x3,
417 (inst >> 31) & 0x1);
418
419 fprintf(stderr,"\t5 RGBA_INST: 0x%08x:", code->inst[n].inst5);
420 inst = code->inst[n].inst5;
421 fprintf(stderr,"%s dest:%d%s rgb_C_src:%d %s/%s/%s %d alp_C_src:%d %s %d\n", toop(inst & 0xf),
422 (inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
423 (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), toswiz((inst >> 17) & 0x7), toswiz((inst >> 20) & 0x7),
424 (inst >> 23) & 0x3,
425 (inst >> 25) & 0x3, toswiz((inst >> 27) & 0x7), (inst >> 30) & 0x3);
426 break;
427 case 2:
428 break;
429 case 3:
430 inst = code->inst[n].inst1;
431 fprintf(stderr,"\t1:TEX_INST: 0x%08x: id: %d op:%s, %s, %s %s\n", inst, (inst >> 16) & 0xf,
432 to_texop((inst >> 22) & 0x7), (inst & (1<<25)) ? "ACQ" : "",
433 (inst & (1<<26)) ? "IGNUNC" : "", (inst & (1<<27)) ? "UNSCALED" : "SCALED");
434 inst = code->inst[n].inst2;
435 fprintf(stderr,"\t2:TEX_ADDR: 0x%08x: src: %d%s %s/%s/%s/%s dst: %d%s %s/%s/%s/%s\n", inst,
436 inst & 127, inst & (1<<7) ? "(rel)" : "",
437 toswiz((inst >> 8) & 0x3), toswiz((inst >> 10) & 0x3),
438 toswiz((inst >> 12) & 0x3), toswiz((inst >> 14) & 0x3),
439 (inst >> 16) & 127, inst & (1<<23) ? "(rel)" : "",
440 toswiz((inst >> 24) & 0x3), toswiz((inst >> 26) & 0x3),
441 toswiz((inst >> 28) & 0x3), toswiz((inst >> 30) & 0x3));
442
443 fprintf(stderr,"\t3:TEX_DXDY: 0x%08x\n", code->inst[n].inst3);
444 break;
445 }
446 fprintf(stderr,"\n");
447 }
448
449 }