2 * Copyright (C) 2005 Ben Skeggs.
4 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
5 * Adaptation and modification for ATI/AMD Radeon R500 GPU chipsets.
9 * Permission is hereby granted, free of charge, to any person obtaining
10 * a copy of this software and associated documentation files (the
11 * "Software"), to deal in the Software without restriction, including
12 * without limitation the rights to use, copy, modify, merge, publish,
13 * distribute, sublicense, and/or sell copies of the Software, and to
14 * permit persons to whom the Software is furnished to do so, subject to
15 * the following conditions:
17 * The above copyright notice and this permission notice (including the
18 * next paragraph) shall be included in all copies or substantial
19 * portions of the Software.
21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
22 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
23 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
24 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
25 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
26 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
27 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
34 * \author Ben Skeggs <darktama@iinet.net.au>
36 * \author Jerome Glisse <j.glisse@gmail.com>
38 * \author Corbin Simpson <MostAwesomeDude@gmail.com>
42 #include "r500_fragprog.h"
44 #include "../r300_reg.h"
46 #include "radeon_program_pair.h"
50 struct r500_fragment_program_code *code = &c->code->code.r500
52 #define error(fmt, args...) do { \
53 rc_error(&c->Base, "%s::%s(): " fmt "\n", \
54 __FILE__, __FUNCTION__, ##args); \
65 struct radeon_compiler
* C
;
66 struct r500_fragment_program_code
* Code
;
68 struct branch_info
* Branches
;
69 unsigned int CurrentBranchDepth
;
70 unsigned int BranchesReserved
;
72 unsigned int MaxBranchDepth
;
75 static unsigned int translate_rgb_op(struct r300_fragment_program_compiler
*c
, rc_opcode opcode
)
78 case RC_OPCODE_CMP
: return R500_ALU_RGBA_OP_CMP
;
79 case RC_OPCODE_DDX
: return R500_ALU_RGBA_OP_MDH
;
80 case RC_OPCODE_DDY
: return R500_ALU_RGBA_OP_MDV
;
81 case RC_OPCODE_DP3
: return R500_ALU_RGBA_OP_DP3
;
82 case RC_OPCODE_DP4
: return R500_ALU_RGBA_OP_DP4
;
83 case RC_OPCODE_FRC
: return R500_ALU_RGBA_OP_FRC
;
85 error("translate_rgb_op(%d): unknown opcode\n", opcode
);
89 case RC_OPCODE_MAD
: return R500_ALU_RGBA_OP_MAD
;
90 case RC_OPCODE_MAX
: return R500_ALU_RGBA_OP_MAX
;
91 case RC_OPCODE_MIN
: return R500_ALU_RGBA_OP_MIN
;
92 case RC_OPCODE_REPL_ALPHA
: return R500_ALU_RGBA_OP_SOP
;
96 static unsigned int translate_alpha_op(struct r300_fragment_program_compiler
*c
, rc_opcode opcode
)
99 case RC_OPCODE_CMP
: return R500_ALPHA_OP_CMP
;
100 case RC_OPCODE_COS
: return R500_ALPHA_OP_COS
;
101 case RC_OPCODE_DDX
: return R500_ALPHA_OP_MDH
;
102 case RC_OPCODE_DDY
: return R500_ALPHA_OP_MDV
;
103 case RC_OPCODE_DP3
: return R500_ALPHA_OP_DP
;
104 case RC_OPCODE_DP4
: return R500_ALPHA_OP_DP
;
105 case RC_OPCODE_EX2
: return R500_ALPHA_OP_EX2
;
106 case RC_OPCODE_FRC
: return R500_ALPHA_OP_FRC
;
107 case RC_OPCODE_LG2
: return R500_ALPHA_OP_LN2
;
109 error("translate_alpha_op(%d): unknown opcode\n", opcode
);
113 case RC_OPCODE_MAD
: return R500_ALPHA_OP_MAD
;
114 case RC_OPCODE_MAX
: return R500_ALPHA_OP_MAX
;
115 case RC_OPCODE_MIN
: return R500_ALPHA_OP_MIN
;
116 case RC_OPCODE_RCP
: return R500_ALPHA_OP_RCP
;
117 case RC_OPCODE_RSQ
: return R500_ALPHA_OP_RSQ
;
118 case RC_OPCODE_SIN
: return R500_ALPHA_OP_SIN
;
122 static unsigned int fix_hw_swizzle(unsigned int swz
)
124 if (swz
== 5) swz
= 6;
125 if (swz
== RC_SWIZZLE_UNUSED
) swz
= 4;
129 static unsigned int translate_arg_rgb(struct rc_pair_instruction
*inst
, int arg
)
131 unsigned int t
= inst
->RGB
.Arg
[arg
].Source
;
133 t
|= inst
->RGB
.Arg
[arg
].Negate
<< 11;
134 t
|= inst
->RGB
.Arg
[arg
].Abs
<< 12;
136 for(comp
= 0; comp
< 3; ++comp
)
137 t
|= fix_hw_swizzle(GET_SWZ(inst
->RGB
.Arg
[arg
].Swizzle
, comp
)) << (3*comp
+ 2);
142 static unsigned int translate_arg_alpha(struct rc_pair_instruction
*inst
, int i
)
144 unsigned int t
= inst
->Alpha
.Arg
[i
].Source
;
145 t
|= fix_hw_swizzle(inst
->Alpha
.Arg
[i
].Swizzle
) << 2;
146 t
|= inst
->Alpha
.Arg
[i
].Negate
<< 5;
147 t
|= inst
->Alpha
.Arg
[i
].Abs
<< 6;
151 static uint32_t translate_alu_result_op(struct r300_fragment_program_compiler
* c
, rc_compare_func func
)
154 case RC_COMPARE_FUNC_EQUAL
: return R500_INST_ALU_RESULT_OP_EQ
;
155 case RC_COMPARE_FUNC_LESS
: return R500_INST_ALU_RESULT_OP_LT
;
156 case RC_COMPARE_FUNC_GEQUAL
: return R500_INST_ALU_RESULT_OP_GE
;
157 case RC_COMPARE_FUNC_NOTEQUAL
: return R500_INST_ALU_RESULT_OP_NE
;
159 rc_error(&c
->Base
, "%s: unsupported compare func %i\n", __FUNCTION__
, func
);
164 static void use_temporary(struct r500_fragment_program_code
* code
, unsigned int index
)
166 if (index
> code
->max_temp_idx
)
167 code
->max_temp_idx
= index
;
170 static unsigned int use_source(struct r500_fragment_program_code
* code
, struct radeon_pair_instruction_source src
)
172 if (src
.File
== RC_FILE_CONSTANT
) {
173 return src
.Index
| 0x100;
174 } else if (src
.File
== RC_FILE_TEMPORARY
) {
175 use_temporary(code
, src
.Index
);
184 * Emit a paired ALU instruction.
186 static void emit_paired(struct r300_fragment_program_compiler
*c
, struct rc_pair_instruction
*inst
)
190 if (code
->inst_end
>= 511) {
191 error("emit_alu: Too many instructions");
195 int ip
= ++code
->inst_end
;
197 code
->inst
[ip
].inst5
= translate_rgb_op(c
, inst
->RGB
.Opcode
);
198 code
->inst
[ip
].inst4
= translate_alpha_op(c
, inst
->Alpha
.Opcode
);
200 if (inst
->RGB
.OutputWriteMask
|| inst
->Alpha
.OutputWriteMask
|| inst
->Alpha
.DepthWriteMask
) {
201 code
->inst
[ip
].inst0
= R500_INST_TYPE_OUT
;
202 if (inst
->WriteALUResult
) {
203 error("%s: cannot write output and ALU result at the same time");
207 code
->inst
[ip
].inst0
= R500_INST_TYPE_ALU
;
209 code
->inst
[ip
].inst0
|= R500_INST_TEX_SEM_WAIT
;
211 code
->inst
[ip
].inst0
|= (inst
->RGB
.WriteMask
<< 11) | (inst
->Alpha
.WriteMask
<< 14);
212 code
->inst
[ip
].inst0
|= (inst
->RGB
.OutputWriteMask
<< 15) | (inst
->Alpha
.OutputWriteMask
<< 18);
213 if (inst
->Alpha
.DepthWriteMask
) {
214 code
->inst
[ip
].inst4
|= R500_ALPHA_W_OMASK
;
215 c
->code
->writes_depth
= 1;
218 code
->inst
[ip
].inst4
|= R500_ALPHA_ADDRD(inst
->Alpha
.DestIndex
);
219 code
->inst
[ip
].inst5
|= R500_ALU_RGBA_ADDRD(inst
->RGB
.DestIndex
);
220 use_temporary(code
, inst
->Alpha
.DestIndex
);
221 use_temporary(code
, inst
->RGB
.DestIndex
);
223 if (inst
->RGB
.Saturate
)
224 code
->inst
[ip
].inst0
|= R500_INST_RGB_CLAMP
;
225 if (inst
->Alpha
.Saturate
)
226 code
->inst
[ip
].inst0
|= R500_INST_ALPHA_CLAMP
;
228 code
->inst
[ip
].inst1
|= R500_RGB_ADDR0(use_source(code
, inst
->RGB
.Src
[0]));
229 code
->inst
[ip
].inst1
|= R500_RGB_ADDR1(use_source(code
, inst
->RGB
.Src
[1]));
230 code
->inst
[ip
].inst1
|= R500_RGB_ADDR2(use_source(code
, inst
->RGB
.Src
[2]));
232 code
->inst
[ip
].inst2
|= R500_ALPHA_ADDR0(use_source(code
, inst
->Alpha
.Src
[0]));
233 code
->inst
[ip
].inst2
|= R500_ALPHA_ADDR1(use_source(code
, inst
->Alpha
.Src
[1]));
234 code
->inst
[ip
].inst2
|= R500_ALPHA_ADDR2(use_source(code
, inst
->Alpha
.Src
[2]));
236 code
->inst
[ip
].inst3
|= translate_arg_rgb(inst
, 0) << R500_ALU_RGB_SEL_A_SHIFT
;
237 code
->inst
[ip
].inst3
|= translate_arg_rgb(inst
, 1) << R500_ALU_RGB_SEL_B_SHIFT
;
238 code
->inst
[ip
].inst5
|= translate_arg_rgb(inst
, 2) << R500_ALU_RGBA_SEL_C_SHIFT
;
240 code
->inst
[ip
].inst4
|= translate_arg_alpha(inst
, 0) << R500_ALPHA_SEL_A_SHIFT
;
241 code
->inst
[ip
].inst4
|= translate_arg_alpha(inst
, 1) << R500_ALPHA_SEL_B_SHIFT
;
242 code
->inst
[ip
].inst5
|= translate_arg_alpha(inst
, 2) << R500_ALU_RGBA_ALPHA_SEL_C_SHIFT
;
244 if (inst
->WriteALUResult
) {
245 code
->inst
[ip
].inst3
|= R500_ALU_RGB_WMASK
;
247 if (inst
->WriteALUResult
== RC_ALURESULT_X
)
248 code
->inst
[ip
].inst0
|= R500_INST_ALU_RESULT_SEL_RED
;
250 code
->inst
[ip
].inst0
|= R500_INST_ALU_RESULT_SEL_ALPHA
;
252 code
->inst
[ip
].inst0
|= translate_alu_result_op(c
, inst
->ALUResultCompare
);
256 static unsigned int translate_strq_swizzle(unsigned int swizzle
)
258 unsigned int swiz
= 0;
260 for (i
= 0; i
< 4; i
++)
261 swiz
|= (GET_SWZ(swizzle
, i
) & 0x3) << i
*2;
266 * Emit a single TEX instruction
268 static int emit_tex(struct r300_fragment_program_compiler
*c
, struct rc_sub_instruction
*inst
)
272 if (code
->inst_end
>= 511) {
273 error("emit_tex: Too many instructions");
277 int ip
= ++code
->inst_end
;
279 code
->inst
[ip
].inst0
= R500_INST_TYPE_TEX
280 | (inst
->DstReg
.WriteMask
<< 11)
281 | R500_INST_TEX_SEM_WAIT
;
282 code
->inst
[ip
].inst1
= R500_TEX_ID(inst
->TexSrcUnit
)
283 | R500_TEX_SEM_ACQUIRE
| R500_TEX_IGNORE_UNCOVERED
;
285 if (inst
->TexSrcTarget
== RC_TEXTURE_RECT
)
286 code
->inst
[ip
].inst1
|= R500_TEX_UNSCALED
;
288 switch (inst
->Opcode
) {
290 code
->inst
[ip
].inst1
|= R500_TEX_INST_TEXKILL
;
293 code
->inst
[ip
].inst1
|= R500_TEX_INST_LD
;
296 code
->inst
[ip
].inst1
|= R500_TEX_INST_LODBIAS
;
299 code
->inst
[ip
].inst1
|= R500_TEX_INST_PROJ
;
302 error("emit_tex can't handle opcode %x\n", inst
->Opcode
);
305 use_temporary(code
, inst
->SrcReg
[0].Index
);
306 if (inst
->Opcode
!= RC_OPCODE_KIL
)
307 use_temporary(code
, inst
->DstReg
.Index
);
309 code
->inst
[ip
].inst2
= R500_TEX_SRC_ADDR(inst
->SrcReg
[0].Index
)
310 | (translate_strq_swizzle(inst
->SrcReg
[0].Swizzle
) << 8)
311 | R500_TEX_DST_ADDR(inst
->DstReg
.Index
)
312 | R500_TEX_DST_R_SWIZ_R
| R500_TEX_DST_G_SWIZ_G
313 | R500_TEX_DST_B_SWIZ_B
| R500_TEX_DST_A_SWIZ_A
;
318 static void grow_branches(struct emit_state
* s
)
320 unsigned int newreserved
= s
->BranchesReserved
* 2;
321 struct branch_info
* newbranches
;
326 newbranches
= memory_pool_malloc(&s
->C
->Pool
, newreserved
*sizeof(struct branch_info
));
327 memcpy(newbranches
, s
->Branches
, s
->CurrentBranchDepth
*sizeof(struct branch_info
));
329 s
->Branches
= newbranches
;
330 s
->BranchesReserved
= newreserved
;
333 static void emit_flowcontrol(struct emit_state
* s
, struct rc_instruction
* inst
)
335 if (s
->Code
->inst_end
>= 511) {
336 rc_error(s
->C
, "emit_tex: Too many instructions");
340 unsigned int newip
= ++s
->Code
->inst_end
;
342 s
->Code
->inst
[newip
].inst0
= R500_INST_TYPE_FC
| R500_INST_ALU_WAIT
;
344 if (inst
->U
.I
.Opcode
== RC_OPCODE_IF
) {
345 if (s
->CurrentBranchDepth
>= 32) {
346 rc_error(s
->C
, "Branch depth exceeds hardware limit");
350 if (s
->CurrentBranchDepth
>= s
->BranchesReserved
)
353 struct branch_info
* branch
= &s
->Branches
[s
->CurrentBranchDepth
++];
358 if (s
->CurrentBranchDepth
> s
->MaxBranchDepth
)
359 s
->MaxBranchDepth
= s
->CurrentBranchDepth
;
361 /* actual instruction is filled in at ENDIF time */
362 } else if (inst
->U
.I
.Opcode
== RC_OPCODE_ELSE
) {
363 if (!s
->CurrentBranchDepth
) {
364 rc_error(s
->C
, "%s: got ELSE outside a branch", __FUNCTION__
);
368 struct branch_info
* branch
= &s
->Branches
[s
->CurrentBranchDepth
- 1];
369 branch
->Else
= newip
;
371 /* actual instruction is filled in at ENDIF time */
372 } else if (inst
->U
.I
.Opcode
== RC_OPCODE_ENDIF
) {
373 if (!s
->CurrentBranchDepth
) {
374 rc_error(s
->C
, "%s: got ELSE outside a branch", __FUNCTION__
);
378 struct branch_info
* branch
= &s
->Branches
[s
->CurrentBranchDepth
- 1];
379 branch
->Endif
= newip
;
381 s
->Code
->inst
[branch
->If
].inst2
= R500_FC_OP_JUMP
382 | R500_FC_A_OP_NONE
/* no address stack */
383 | R500_FC_JUMP_FUNC(0x0f) /* jump if ALU result is false */
384 | R500_FC_B_OP0_INCR
/* increment branch counter if stay */
387 if (branch
->Else
>= 0) {
388 /* increment branch counter also if jump */
389 s
->Code
->inst
[branch
->If
].inst2
|= R500_FC_B_OP1_INCR
;
390 s
->Code
->inst
[branch
->If
].inst3
= R500_FC_JUMP_ADDR(branch
->Else
+ 1);
392 s
->Code
->inst
[branch
->Else
].inst2
= R500_FC_OP_JUMP
393 | R500_FC_A_OP_NONE
/* no address stack */
394 | R500_FC_B_ELSE
/* all active pixels want to jump */
395 | R500_FC_B_OP0_NONE
/* no counter op if stay */
396 | R500_FC_B_OP1_DECR
/* decrement branch counter if jump */
397 | R500_FC_B_POP_CNT(1)
399 s
->Code
->inst
[branch
->Else
].inst3
= R500_FC_JUMP_ADDR(branch
->Endif
+ 1);
401 /* don't touch branch counter on jump */
402 s
->Code
->inst
[branch
->If
].inst2
|= R500_FC_B_OP1_NONE
;
403 s
->Code
->inst
[branch
->If
].inst3
= R500_FC_JUMP_ADDR(branch
->Endif
+ 1);
406 s
->Code
->inst
[branch
->Endif
].inst2
= R500_FC_OP_JUMP
407 | R500_FC_A_OP_NONE
/* no address stack */
408 | R500_FC_JUMP_ANY
/* docs says set this, but I don't understand why */
409 | R500_FC_B_OP0_DECR
/* decrement branch counter if stay */
410 | R500_FC_B_OP1_NONE
/* no branch counter if stay */
411 | R500_FC_B_POP_CNT(1)
413 s
->Code
->inst
[branch
->Endif
].inst3
= R500_FC_JUMP_ADDR(branch
->Endif
+ 1);
415 s
->CurrentBranchDepth
--;
417 rc_error(s
->C
, "%s: unknown opcode %i\n", __FUNCTION__
, inst
->U
.I
.Opcode
);
421 void r500BuildFragmentProgramHwCode(struct r300_fragment_program_compiler
*compiler
)
424 struct r500_fragment_program_code
*code
= &compiler
->code
->code
.r500
;
426 memset(&s
, 0, sizeof(s
));
427 s
.C
= &compiler
->Base
;
430 memset(code
, 0, sizeof(*code
));
431 code
->max_temp_idx
= 1;
434 for(struct rc_instruction
* inst
= compiler
->Base
.Program
.Instructions
.Next
;
435 inst
!= &compiler
->Base
.Program
.Instructions
&& !compiler
->Base
.Error
;
437 if (inst
->Type
== RC_INSTRUCTION_NORMAL
) {
438 const struct rc_opcode_info
* opcode
= rc_get_opcode_info(inst
->U
.I
.Opcode
);
440 if (opcode
->IsFlowControl
) {
441 emit_flowcontrol(&s
, inst
);
442 } else if (inst
->U
.I
.Opcode
== RC_OPCODE_BEGIN_TEX
) {
445 emit_tex(compiler
, &inst
->U
.I
);
448 emit_paired(compiler
, &inst
->U
.P
);
452 if (code
->max_temp_idx
>= 128)
453 rc_error(&compiler
->Base
, "Too many hardware temporaries used");
455 if (compiler
->Base
.Error
)
458 if ((code
->inst
[code
->inst_end
].inst0
& R500_INST_TYPE_MASK
) != R500_INST_TYPE_OUT
) {
459 /* This may happen when dead-code elimination is disabled or
460 * when most of the fragment program logic is leading to a KIL */
461 if (code
->inst_end
>= 511) {
462 rc_error(&compiler
->Base
, "Introducing fake OUT: Too many instructions");
466 int ip
= ++code
->inst_end
;
467 code
->inst
[ip
].inst0
= R500_INST_TYPE_OUT
| R500_INST_TEX_SEM_WAIT
;
470 if (s
.MaxBranchDepth
>= 4) {
471 if (code
->max_temp_idx
< 1)
472 code
->max_temp_idx
= 1;
474 code
->us_fc_ctrl
|= R500_FC_FULL_FC_EN
;