Merge branch '7.8'
[mesa.git] / src / mesa / drivers / dri / r300 / compiler / radeon_dataflow_deadcode.c
1 /*
2 * Copyright (C) 2009 Nicolai Haehnle.
3 *
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 */
27
28 #include "radeon_dataflow.h"
29
30 #include "radeon_compiler.h"
31
32
33 struct updatemask_state {
34 unsigned char Output[RC_REGISTER_MAX_INDEX];
35 unsigned char Temporary[RC_REGISTER_MAX_INDEX];
36 unsigned char Address;
37 unsigned char Special[RC_NUM_SPECIAL_REGISTERS];
38 };
39
40 struct instruction_state {
41 unsigned char WriteMask:4;
42 unsigned char WriteALUResult:1;
43 unsigned char SrcReg[3];
44 };
45
46 struct branchinfo {
47 unsigned int HaveElse:1;
48
49 struct updatemask_state StoreEndif;
50 struct updatemask_state StoreElse;
51 };
52
53 struct deadcode_state {
54 struct radeon_compiler * C;
55 struct instruction_state * Instructions;
56
57 struct updatemask_state R;
58
59 struct branchinfo * BranchStack;
60 unsigned int BranchStackSize;
61 unsigned int BranchStackReserved;
62 };
63
64
65 static void or_updatemasks(
66 struct updatemask_state * dst,
67 struct updatemask_state * a,
68 struct updatemask_state * b)
69 {
70 for(unsigned int i = 0; i < RC_REGISTER_MAX_INDEX; ++i) {
71 dst->Output[i] = a->Output[i] | b->Output[i];
72 dst->Temporary[i] = a->Temporary[i] | b->Temporary[i];
73 }
74
75 for(unsigned int i = 0; i < RC_NUM_SPECIAL_REGISTERS; ++i)
76 dst->Special[i] = a->Special[i] | b->Special[i];
77
78 dst->Address = a->Address | b->Address;
79 }
80
81 static void push_branch(struct deadcode_state * s)
82 {
83 memory_pool_array_reserve(&s->C->Pool, struct branchinfo, s->BranchStack,
84 s->BranchStackSize, s->BranchStackReserved, 1);
85
86 struct branchinfo * branch = &s->BranchStack[s->BranchStackSize++];
87 branch->HaveElse = 0;
88 memcpy(&branch->StoreEndif, &s->R, sizeof(s->R));
89 }
90
91 static unsigned char * get_used_ptr(struct deadcode_state *s, rc_register_file file, unsigned int index)
92 {
93 if (file == RC_FILE_OUTPUT || file == RC_FILE_TEMPORARY) {
94 if (index >= RC_REGISTER_MAX_INDEX) {
95 rc_error(s->C, "%s: index %i is out of bounds for file %i\n", __FUNCTION__, index, file);
96 return 0;
97 }
98
99 if (file == RC_FILE_OUTPUT)
100 return &s->R.Output[index];
101 else
102 return &s->R.Temporary[index];
103 } else if (file == RC_FILE_ADDRESS) {
104 return &s->R.Address;
105 } else if (file == RC_FILE_SPECIAL) {
106 if (index >= RC_NUM_SPECIAL_REGISTERS) {
107 rc_error(s->C, "%s: special file index %i out of bounds\n", __FUNCTION__, index);
108 return 0;
109 }
110
111 return &s->R.Special[index];
112 }
113
114 return 0;
115 }
116
117 static void mark_used(struct deadcode_state * s, rc_register_file file, unsigned int index, unsigned int mask)
118 {
119 unsigned char * pused = get_used_ptr(s, file, index);
120 if (pused)
121 *pused |= mask;
122 }
123
124 static void update_instruction(struct deadcode_state * s, struct rc_instruction * inst)
125 {
126 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode);
127 struct instruction_state * insts = &s->Instructions[inst->IP];
128 unsigned int usedmask = 0;
129
130 if (opcode->HasDstReg) {
131 unsigned char * pused = get_used_ptr(s, inst->U.I.DstReg.File, inst->U.I.DstReg.Index);
132 if (pused) {
133 usedmask = *pused & inst->U.I.DstReg.WriteMask;
134 *pused &= ~usedmask;
135 }
136 }
137
138 insts->WriteMask |= usedmask;
139
140 if (inst->U.I.WriteALUResult) {
141 unsigned char * pused = get_used_ptr(s, RC_FILE_SPECIAL, RC_SPECIAL_ALU_RESULT);
142 if (pused && *pused) {
143 if (inst->U.I.WriteALUResult == RC_ALURESULT_X)
144 usedmask |= RC_MASK_X;
145 else if (inst->U.I.WriteALUResult == RC_ALURESULT_W)
146 usedmask |= RC_MASK_W;
147
148 *pused = 0;
149 insts->WriteALUResult = 1;
150 }
151 }
152
153 unsigned int srcmasks[3];
154 rc_compute_sources_for_writemask(inst, usedmask, srcmasks);
155
156 for(unsigned int src = 0; src < opcode->NumSrcRegs; ++src) {
157 unsigned int refmask = 0;
158 unsigned int newsrcmask = srcmasks[src] & ~insts->SrcReg[src];
159 insts->SrcReg[src] |= newsrcmask;
160
161 for(unsigned int chan = 0; chan < 4; ++chan) {
162 if (GET_BIT(newsrcmask, chan))
163 refmask |= 1 << GET_SWZ(inst->U.I.SrcReg[src].Swizzle, chan);
164 }
165
166 /* get rid of spurious bits from ZERO, ONE, etc. swizzles */
167 refmask &= RC_MASK_XYZW;
168
169 if (!refmask)
170 continue;
171
172 mark_used(s, inst->U.I.SrcReg[src].File, inst->U.I.SrcReg[src].Index, refmask);
173
174 if (inst->U.I.SrcReg[src].RelAddr)
175 mark_used(s, RC_FILE_ADDRESS, 0, RC_MASK_X);
176 }
177 }
178
179 static void mark_output_use(void * data, unsigned int index, unsigned int mask)
180 {
181 struct deadcode_state * s = data;
182
183 mark_used(s, RC_FILE_OUTPUT, index, mask);
184 }
185
186 void rc_dataflow_deadcode(struct radeon_compiler * c, rc_dataflow_mark_outputs_fn dce, void * userdata)
187 {
188 struct deadcode_state s;
189 unsigned int nr_instructions;
190
191 memset(&s, 0, sizeof(s));
192 s.C = c;
193
194 nr_instructions = rc_recompute_ips(c);
195 s.Instructions = memory_pool_malloc(&c->Pool, sizeof(struct instruction_state)*nr_instructions);
196 memset(s.Instructions, 0, sizeof(struct instruction_state)*nr_instructions);
197
198 dce(userdata, &s, &mark_output_use);
199
200 for(struct rc_instruction * inst = c->Program.Instructions.Prev;
201 inst != &c->Program.Instructions;
202 inst = inst->Prev) {
203 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode);
204
205 if (opcode->IsFlowControl) {
206 if (opcode->Opcode == RC_OPCODE_ENDIF) {
207 push_branch(&s);
208 } else {
209 if (s.BranchStackSize) {
210 struct branchinfo * branch = &s.BranchStack[s.BranchStackSize-1];
211
212 if (opcode->Opcode == RC_OPCODE_IF) {
213 or_updatemasks(&s.R,
214 &s.R,
215 branch->HaveElse ? &branch->StoreElse : &branch->StoreEndif);
216
217 s.BranchStackSize--;
218 } else if (opcode->Opcode == RC_OPCODE_ELSE) {
219 if (branch->HaveElse) {
220 rc_error(c, "%s: Multiple ELSE for one IF/ENDIF\n", __FUNCTION__);
221 } else {
222 memcpy(&branch->StoreElse, &s.R, sizeof(s.R));
223 memcpy(&s.R, &branch->StoreEndif, sizeof(s.R));
224 branch->HaveElse = 1;
225 }
226 } else {
227 rc_error(c, "%s: Unhandled control flow instruction %s\n", __FUNCTION__, opcode->Name);
228 }
229 } else {
230 rc_error(c, "%s: Unexpected control flow instruction\n", __FUNCTION__);
231 }
232 }
233 }
234
235 update_instruction(&s, inst);
236 }
237
238 unsigned int ip = 0;
239 for(struct rc_instruction * inst = c->Program.Instructions.Next;
240 inst != &c->Program.Instructions;
241 inst = inst->Next, ++ip) {
242 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode);
243 int dead = 1;
244
245 if (!opcode->HasDstReg) {
246 dead = 0;
247 } else {
248 inst->U.I.DstReg.WriteMask = s.Instructions[ip].WriteMask;
249 if (s.Instructions[ip].WriteMask)
250 dead = 0;
251
252 if (s.Instructions[ip].WriteALUResult)
253 dead = 0;
254 else
255 inst->U.I.WriteALUResult = RC_ALURESULT_NONE;
256 }
257
258 if (dead) {
259 struct rc_instruction * todelete = inst;
260 inst = inst->Prev;
261 rc_remove_instruction(todelete);
262 continue;
263 }
264
265 unsigned int srcmasks[3];
266 unsigned int usemask = s.Instructions[ip].WriteMask;
267
268 if (inst->U.I.WriteALUResult == RC_ALURESULT_X)
269 usemask |= RC_MASK_X;
270 else if (inst->U.I.WriteALUResult == RC_ALURESULT_W)
271 usemask |= RC_MASK_W;
272
273 rc_compute_sources_for_writemask(inst, usemask, srcmasks);
274
275 for(unsigned int src = 0; src < 3; ++src) {
276 for(unsigned int chan = 0; chan < 4; ++chan) {
277 if (!GET_BIT(srcmasks[src], chan))
278 SET_SWZ(inst->U.I.SrcReg[src].Swizzle, chan, RC_SWIZZLE_UNUSED);
279 }
280 }
281 }
282
283 rc_calculate_inputs_outputs(c);
284 }