2 * Copyright (C) 2009 Nicolai Haehnle.
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 #include "radeon_opcodes.h"
29 #include "radeon_program.h"
31 #include "radeon_program_constants.h"
33 struct rc_opcode_info rc_opcodes
[MAX_RC_OPCODE
] = {
35 .Opcode
= RC_OPCODE_NOP
,
39 .Opcode
= RC_OPCODE_ILLEGAL_OPCODE
,
40 .Name
= "ILLEGAL OPCODE"
43 .Opcode
= RC_OPCODE_ABS
,
50 .Opcode
= RC_OPCODE_ADD
,
57 .Opcode
= RC_OPCODE_ARL
,
63 .Opcode
= RC_OPCODE_CEIL
,
70 .Opcode
= RC_OPCODE_CMP
,
77 .Opcode
= RC_OPCODE_COS
,
84 .Opcode
= RC_OPCODE_DDX
,
91 .Opcode
= RC_OPCODE_DDY
,
98 .Opcode
= RC_OPCODE_DP3
,
104 .Opcode
= RC_OPCODE_DP4
,
110 .Opcode
= RC_OPCODE_DPH
,
116 .Opcode
= RC_OPCODE_DST
,
122 .Opcode
= RC_OPCODE_EX2
,
126 .IsStandardScalar
= 1
129 .Opcode
= RC_OPCODE_EXP
,
135 .Opcode
= RC_OPCODE_FLR
,
142 .Opcode
= RC_OPCODE_FRC
,
149 .Opcode
= RC_OPCODE_KIL
,
154 .Opcode
= RC_OPCODE_LG2
,
158 .IsStandardScalar
= 1
161 .Opcode
= RC_OPCODE_LIT
,
167 .Opcode
= RC_OPCODE_LOG
,
173 .Opcode
= RC_OPCODE_LRP
,
180 .Opcode
= RC_OPCODE_MAD
,
187 .Opcode
= RC_OPCODE_MAX
,
194 .Opcode
= RC_OPCODE_MIN
,
201 .Opcode
= RC_OPCODE_MOV
,
208 .Opcode
= RC_OPCODE_MUL
,
215 .Opcode
= RC_OPCODE_POW
,
219 .IsStandardScalar
= 1
222 .Opcode
= RC_OPCODE_RCP
,
226 .IsStandardScalar
= 1
229 .Opcode
= RC_OPCODE_RSQ
,
233 .IsStandardScalar
= 1
236 .Opcode
= RC_OPCODE_SCS
,
242 .Opcode
= RC_OPCODE_SEQ
,
249 .Opcode
= RC_OPCODE_SFL
,
256 .Opcode
= RC_OPCODE_SGE
,
263 .Opcode
= RC_OPCODE_SGT
,
270 .Opcode
= RC_OPCODE_SIN
,
274 .IsStandardScalar
= 1
277 .Opcode
= RC_OPCODE_SLE
,
284 .Opcode
= RC_OPCODE_SLT
,
291 .Opcode
= RC_OPCODE_SNE
,
298 .Opcode
= RC_OPCODE_SUB
,
305 .Opcode
= RC_OPCODE_SWZ
,
312 .Opcode
= RC_OPCODE_XPD
,
318 .Opcode
= RC_OPCODE_TEX
,
325 .Opcode
= RC_OPCODE_TXB
,
332 .Opcode
= RC_OPCODE_TXD
,
339 .Opcode
= RC_OPCODE_TXL
,
346 .Opcode
= RC_OPCODE_TXP
,
353 .Opcode
= RC_OPCODE_IF
,
359 .Opcode
= RC_OPCODE_ELSE
,
365 .Opcode
= RC_OPCODE_ENDIF
,
371 .Opcode
= RC_OPCODE_REPL_ALPHA
,
372 .Name
= "REPL_ALPHA",
376 .Opcode
= RC_OPCODE_BEGIN_TEX
,
381 void rc_compute_sources_for_writemask(
382 const struct rc_instruction
*inst
,
383 unsigned int writemask
,
384 unsigned int *srcmasks
)
386 const struct rc_opcode_info
* opcode
= rc_get_opcode_info(inst
->U
.I
.Opcode
);
391 if (opcode
->Opcode
== RC_OPCODE_KIL
)
392 srcmasks
[0] |= RC_MASK_XYZW
;
393 else if (opcode
->Opcode
== RC_OPCODE_IF
)
394 srcmasks
[0] |= RC_MASK_X
;
399 if (opcode
->IsComponentwise
) {
400 for(unsigned int src
= 0; src
< opcode
->NumSrcRegs
; ++src
)
401 srcmasks
[src
] |= writemask
;
402 } else if (opcode
->IsStandardScalar
) {
403 for(unsigned int src
= 0; src
< opcode
->NumSrcRegs
; ++src
)
404 srcmasks
[src
] |= RC_MASK_X
;
406 switch(opcode
->Opcode
) {
408 srcmasks
[0] |= RC_MASK_X
;
411 srcmasks
[0] |= RC_MASK_XYZ
;
412 srcmasks
[1] |= RC_MASK_XYZ
;
415 srcmasks
[0] |= RC_MASK_XYZW
;
416 srcmasks
[1] |= RC_MASK_XYZW
;
420 srcmasks
[0] |= RC_MASK_W
;
423 switch (inst
->U
.I
.TexSrcTarget
) {
425 srcmasks
[0] |= RC_MASK_X
;
428 case RC_TEXTURE_RECT
:
429 case RC_TEXTURE_1D_ARRAY
:
430 srcmasks
[0] |= RC_MASK_XY
;
433 case RC_TEXTURE_CUBE
:
434 case RC_TEXTURE_2D_ARRAY
:
435 srcmasks
[0] |= RC_MASK_XYZ
;
440 srcmasks
[0] |= RC_MASK_Y
| RC_MASK_Z
;
441 srcmasks
[1] |= RC_MASK_Y
| RC_MASK_W
;
445 srcmasks
[0] |= RC_MASK_XY
;
448 srcmasks
[0] |= RC_MASK_X
| RC_MASK_Y
| RC_MASK_W
;