src/mesa/drivers/dri/r300/compiler/radeon_optimize.c

   1 /*
   2  * Copyright (C) 2009 Nicolai Haehnle.
   3  *
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining
   7  * a copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sublicense, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial
  16  * portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  */
  27
  28 #include "radeon_dataflow.h"
  29
  30 #include "radeon_compiler.h"
  31 #include "radeon_swizzle.h"
  32
  33
  34 static struct rc_src_register chain_srcregs(struct rc_src_register outer, struct rc_src_register inner)
  35 {
  36         struct rc_src_register combine;
  37         combine.File = inner.File;
  38         combine.Index = inner.Index;
  39         combine.RelAddr = inner.RelAddr;
  40         if (outer.Abs) {
  41                 combine.Abs = 1;
  42                 combine.Negate = outer.Negate;
  43         } else {
  44                 combine.Abs = inner.Abs;
  45                 combine.Negate = 0;
  46                 for(unsigned int chan = 0; chan < 4; ++chan) {
  47                         unsigned int swz = GET_SWZ(outer.Swizzle, chan);
  48                         if (swz < 4)
  49                                 combine.Negate |= GET_BIT(inner.Negate, swz) << chan;
  50                 }
  51                 combine.Negate ^= outer.Negate;
  52         }
  53         combine.Swizzle = combine_swizzles(inner.Swizzle, outer.Swizzle);
  54         return combine;
  55 }
  56
  57 struct peephole_state {
  58         struct radeon_compiler * C;
  59         struct rc_instruction * Mov;
  60         unsigned int Conflict:1;
  61
  62         /** Whether Mov's source has been clobbered */
  63         unsigned int SourceClobbered:1;
  64
  65         /** Which components of Mov's destination register are still from that Mov? */
  66         unsigned int MovMask:4;
  67
  68         /** Which components of Mov's destination register are clearly *not* from that Mov */
  69         unsigned int DefinedMask:4;
  70
  71         /** Which components of Mov's source register are sourced */
  72         unsigned int SourcedMask:4;
  73
  74         /** Branch depth beyond Mov; negative value indicates we left the Mov's block */
  75         int BranchDepth;
  76 };
  77
  78 /**
  79  * This is a callback function that is meant to be passed to
  80  * rc_for_all_reads_mask.  This function will be called once for each source
  81  * register in inst.
  82  * @param inst The instruction that the source register belongs to.
  83  * @param file The register file of the source register.
  84  * @param index The index of the source register.
  85  * @param mask The components of the source register that are being read from.
  86  */
  87 static void peephole_scan_read(void * data, struct rc_instruction * inst,
  88                 rc_register_file file, unsigned int index, unsigned int mask)
  89 {
  90         struct peephole_state * s = data;
  91
  92         if (file != RC_FILE_TEMPORARY || index != s->Mov->U.I.DstReg.Index)
  93                 return;
  94
  95         /* These instructions cannot read from the constants file.
  96          * see radeonTransformTEX()
  97          */
  98         if(s->Mov->U.I.SrcReg[0].File != RC_FILE_TEMPORARY &&
  99                         s->Mov->U.I.SrcReg[0].File != RC_FILE_INPUT &&
 100                                 (inst->U.I.Opcode == RC_OPCODE_TEX ||
 101                                 inst->U.I.Opcode == RC_OPCODE_TXB ||
 102                                 inst->U.I.Opcode == RC_OPCODE_TXP ||
 103                                 inst->U.I.Opcode == RC_OPCODE_KIL)){
 104                 s->Conflict = 1;
 105                 return;
 106         }
 107         if ((mask & s->MovMask) == mask) {
 108                 if (s->SourceClobbered) {
 109                         s->Conflict = 1;
 110                 }
 111         } else if ((mask & s->DefinedMask) == mask) {
 112                 /* read from something entirely written by other instruction: this is okay */
 113         } else {
 114                 /* read from component combination that is not well-defined without
 115                  * the MOV: cannot remove it */
 116                 s->Conflict = 1;
 117         }
 118 }
 119
 120 static void peephole_scan_write(void * data, struct rc_instruction * inst,
 121                 rc_register_file file, unsigned int index, unsigned int mask)
 122 {
 123         struct peephole_state * s = data;
 124
 125         if (s->BranchDepth < 0)
 126                 return;
 127
 128         if (file == s->Mov->U.I.DstReg.File && index == s->Mov->U.I.DstReg.Index) {
 129                 s->MovMask &= ~mask;
 130                 if (s->BranchDepth == 0)
 131                         s->DefinedMask |= mask;
 132                 else
 133                         s->DefinedMask &= ~mask;
 134         }
 135         if (file == s->Mov->U.I.SrcReg[0].File && index == s->Mov->U.I.SrcReg[0].Index) {
 136                 if (mask & s->SourcedMask)
 137                         s->SourceClobbered = 1;
 138         } else if (s->Mov->U.I.SrcReg[0].RelAddr && file == RC_FILE_ADDRESS) {
 139                 s->SourceClobbered = 1;
 140         }
 141 }
 142
 143 static void peephole(struct radeon_compiler * c, struct rc_instruction * inst_mov)
 144 {
 145         struct peephole_state s;
 146
 147         if (inst_mov->U.I.DstReg.File != RC_FILE_TEMPORARY || inst_mov->U.I.WriteALUResult)
 148                 return;
 149
 150         memset(&s, 0, sizeof(s));
 151         s.C = c;
 152         s.Mov = inst_mov;
 153         s.MovMask = inst_mov->U.I.DstReg.WriteMask;
 154         s.DefinedMask = RC_MASK_XYZW & ~s.MovMask;
 155
 156         for(unsigned int chan = 0; chan < 4; ++chan) {
 157                 unsigned int swz = GET_SWZ(inst_mov->U.I.SrcReg[0].Swizzle, chan);
 158                 s.SourcedMask |= (1 << swz) & RC_MASK_XYZW;
 159         }
 160
 161         /* 1st pass: Check whether all subsequent readers can be changed */
 162         for(struct rc_instruction * inst = inst_mov->Next;
 163             inst != &c->Program.Instructions;
 164             inst = inst->Next) {
 165                 /* XXX In the future we might be able to make the optimizer
 166                  * smart enough to handle loops. */
 167                 if(inst->U.I.Opcode == RC_OPCODE_BGNLOOP){
 168                         return;
 169                 }
 170                 rc_for_all_reads_mask(inst, peephole_scan_read, &s);
 171                 rc_for_all_writes_mask(inst, peephole_scan_write, &s);
 172                 if (s.Conflict)
 173                         return;
 174
 175                 if (s.BranchDepth >= 0) {
 176                         if (inst->U.I.Opcode == RC_OPCODE_IF) {
 177                                 s.BranchDepth++;
 178                         } else if (inst->U.I.Opcode == RC_OPCODE_ENDIF
 179                                 || inst->U.I.Opcode == RC_OPCODE_ELSE) {
 180                                 s.BranchDepth--;
 181                                 if (s.BranchDepth < 0) {
 182                                         s.DefinedMask &= ~s.MovMask;
 183                                         s.MovMask = 0;
 184                                 }
 185                         }
 186                 }
 187         }
 188
 189         if (s.Conflict)
 190                 return;
 191
 192         /* 2nd pass: We can satisfy all readers, so switch them over all at once */
 193         s.MovMask = inst_mov->U.I.DstReg.WriteMask;
 194         s.BranchDepth = 0;
 195
 196         for(struct rc_instruction * inst = inst_mov->Next;
 197             inst != &c->Program.Instructions;
 198             inst = inst->Next) {
 199                 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode);
 200
 201                 for(unsigned int src = 0; src < opcode->NumSrcRegs; ++src) {
 202                         if (inst->U.I.SrcReg[src].File == RC_FILE_TEMPORARY &&
 203                             inst->U.I.SrcReg[src].Index == s.Mov->U.I.DstReg.Index) {
 204                                 unsigned int refmask = 0;
 205
 206                                 for(unsigned int chan = 0; chan < 4; ++chan) {
 207                                         unsigned int swz = GET_SWZ(inst->U.I.SrcReg[src].Swizzle, chan);
 208                                         refmask |= (1 << swz) & RC_MASK_XYZW;
 209                                 }
 210
 211                                 if ((refmask & s.MovMask) == refmask)
 212                                         inst->U.I.SrcReg[src] = chain_srcregs(inst->U.I.SrcReg[src], s.Mov->U.I.SrcReg[0]);
 213                         }
 214                 }
 215
 216                 if (opcode->HasDstReg) {
 217                         if (inst->U.I.DstReg.File == RC_FILE_TEMPORARY &&
 218                             inst->U.I.DstReg.Index == s.Mov->U.I.DstReg.Index) {
 219                                 s.MovMask &= ~inst->U.I.DstReg.WriteMask;
 220                         }
 221                 }
 222
 223                 if (s.BranchDepth >= 0) {
 224                         if (inst->U.I.Opcode == RC_OPCODE_IF) {
 225                                 s.BranchDepth++;
 226                         } else if (inst->U.I.Opcode == RC_OPCODE_ENDIF
 227                                 || inst->U.I.Opcode == RC_OPCODE_ELSE) {
 228                                 s.BranchDepth--;
 229                                 if (s.BranchDepth < 0)
 230                                         break; /* no more readers after this point */
 231                         }
 232                 }
 233         }
 234
 235         /* Finally, remove the original MOV instruction */
 236         rc_remove_instruction(inst_mov);
 237 }
 238
 239 /**
 240  * Check if a source register is actually always the same
 241  * swizzle constant.
 242  */
 243 static int is_src_uniform_constant(struct rc_src_register src,
 244                 rc_swizzle * pswz, unsigned int * pnegate)
 245 {
 246         int have_used = 0;
 247
 248         if (src.File != RC_FILE_NONE) {
 249                 *pswz = 0;
 250                 return 0;
 251         }
 252
 253         for(unsigned int chan = 0; chan < 4; ++chan) {
 254                 unsigned int swz = GET_SWZ(src.Swizzle, chan);
 255                 if (swz < 4) {
 256                         *pswz = 0;
 257                         return 0;
 258                 }
 259                 if (swz == RC_SWIZZLE_UNUSED)
 260                         continue;
 261
 262                 if (!have_used) {
 263                         *pswz = swz;
 264                         *pnegate = GET_BIT(src.Negate, chan);
 265                         have_used = 1;
 266                 } else {
 267                         if (swz != *pswz || *pnegate != GET_BIT(src.Negate, chan)) {
 268                                 *pswz = 0;
 269                                 return 0;
 270                         }
 271                 }
 272         }
 273
 274         return 1;
 275 }
 276
 277
 278 static void constant_folding_mad(struct rc_instruction * inst)
 279 {
 280         rc_swizzle swz;
 281         unsigned int negate;
 282
 283         if (is_src_uniform_constant(inst->U.I.SrcReg[2], &swz, &negate)) {
 284                 if (swz == RC_SWIZZLE_ZERO) {
 285                         inst->U.I.Opcode = RC_OPCODE_MUL;
 286                         return;
 287                 }
 288         }
 289
 290         if (is_src_uniform_constant(inst->U.I.SrcReg[1], &swz, &negate)) {
 291                 if (swz == RC_SWIZZLE_ONE) {
 292                         inst->U.I.Opcode = RC_OPCODE_ADD;
 293                         if (negate)
 294                                 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW;
 295                         inst->U.I.SrcReg[1] = inst->U.I.SrcReg[2];
 296                         return;
 297                 } else if (swz == RC_SWIZZLE_ZERO) {
 298                         inst->U.I.Opcode = RC_OPCODE_MOV;
 299                         inst->U.I.SrcReg[0] = inst->U.I.SrcReg[2];
 300                         return;
 301                 }
 302         }
 303
 304         if (is_src_uniform_constant(inst->U.I.SrcReg[0], &swz, &negate)) {
 305                 if (swz == RC_SWIZZLE_ONE) {
 306                         inst->U.I.Opcode = RC_OPCODE_ADD;
 307                         if (negate)
 308                                 inst->U.I.SrcReg[1].Negate ^= RC_MASK_XYZW;
 309                         inst->U.I.SrcReg[0] = inst->U.I.SrcReg[2];
 310                         return;
 311                 } else if (swz == RC_SWIZZLE_ZERO) {
 312                         inst->U.I.Opcode = RC_OPCODE_MOV;
 313                         inst->U.I.SrcReg[0] = inst->U.I.SrcReg[2];
 314                         return;
 315                 }
 316         }
 317 }
 318
 319 static void constant_folding_mul(struct rc_instruction * inst)
 320 {
 321         rc_swizzle swz;
 322         unsigned int negate;
 323
 324         if (is_src_uniform_constant(inst->U.I.SrcReg[0], &swz, &negate)) {
 325                 if (swz == RC_SWIZZLE_ONE) {
 326                         inst->U.I.Opcode = RC_OPCODE_MOV;
 327                         inst->U.I.SrcReg[0] = inst->U.I.SrcReg[1];
 328                         if (negate)
 329                                 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW;
 330                         return;
 331                 } else if (swz == RC_SWIZZLE_ZERO) {
 332                         inst->U.I.Opcode = RC_OPCODE_MOV;
 333                         inst->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_0000;
 334                         return;
 335                 }
 336         }
 337
 338         if (is_src_uniform_constant(inst->U.I.SrcReg[1], &swz, &negate)) {
 339                 if (swz == RC_SWIZZLE_ONE) {
 340                         inst->U.I.Opcode = RC_OPCODE_MOV;
 341                         if (negate)
 342                                 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW;
 343                         return;
 344                 } else if (swz == RC_SWIZZLE_ZERO) {
 345                         inst->U.I.Opcode = RC_OPCODE_MOV;
 346                         inst->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_0000;
 347                         return;
 348                 }
 349         }
 350 }
 351
 352 static void constant_folding_add(struct rc_instruction * inst)
 353 {
 354         rc_swizzle swz;
 355         unsigned int negate;
 356
 357         if (is_src_uniform_constant(inst->U.I.SrcReg[0], &swz, &negate)) {
 358                 if (swz == RC_SWIZZLE_ZERO) {
 359                         inst->U.I.Opcode = RC_OPCODE_MOV;
 360                         inst->U.I.SrcReg[0] = inst->U.I.SrcReg[1];
 361                         return;
 362                 }
 363         }
 364
 365         if (is_src_uniform_constant(inst->U.I.SrcReg[1], &swz, &negate)) {
 366                 if (swz == RC_SWIZZLE_ZERO) {
 367                         inst->U.I.Opcode = RC_OPCODE_MOV;
 368                         return;
 369                 }
 370         }
 371 }
 372
 373
 374 /**
 375  * Replace 0.0, 1.0 and 0.5 immediate constants by their
 376  * respective swizzles. Simplify instructions like ADD dst, src, 0;
 377  */
 378 static void constant_folding(struct radeon_compiler * c, struct rc_instruction * inst)
 379 {
 380         const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode);
 381
 382         /* Replace 0.0, 1.0 and 0.5 immediates by their explicit swizzles */
 383         for(unsigned int src = 0; src < opcode->NumSrcRegs; ++src) {
 384                 if (inst->U.I.SrcReg[src].File != RC_FILE_CONSTANT ||
 385                     inst->U.I.SrcReg[src].RelAddr ||
 386                     inst->U.I.SrcReg[src].Index >= c->Program.Constants.Count)
 387                         continue;
 388
 389                 struct rc_constant * constant =
 390                         &c->Program.Constants.Constants[inst->U.I.SrcReg[src].Index];
 391
 392                 if (constant->Type != RC_CONSTANT_IMMEDIATE)
 393                         continue;
 394
 395                 struct rc_src_register newsrc = inst->U.I.SrcReg[src];
 396                 int have_real_reference = 0;
 397                 for(unsigned int chan = 0; chan < 4; ++chan) {
 398                         unsigned int swz = GET_SWZ(newsrc.Swizzle, chan);
 399                         if (swz >= 4)
 400                                 continue;
 401
 402                         unsigned int newswz;
 403                         float imm = constant->u.Immediate[swz];
 404                         float baseimm = imm;
 405                         if (imm < 0.0)
 406                                 baseimm = -baseimm;
 407
 408                         if (baseimm == 0.0) {
 409                                 newswz = RC_SWIZZLE_ZERO;
 410                         } else if (baseimm == 1.0) {
 411                                 newswz = RC_SWIZZLE_ONE;
 412                         } else if (baseimm == 0.5) {
 413                                 newswz = RC_SWIZZLE_HALF;
 414                         } else {
 415                                 have_real_reference = 1;
 416                                 continue;
 417                         }
 418
 419                         SET_SWZ(newsrc.Swizzle, chan, newswz);
 420                         if (imm < 0.0 && !newsrc.Abs)
 421                                 newsrc.Negate ^= 1 << chan;
 422                 }
 423
 424                 if (!have_real_reference) {
 425                         newsrc.File = RC_FILE_NONE;
 426                         newsrc.Index = 0;
 427                 }
 428
 429                 /* don't make the swizzle worse */
 430                 if (!c->SwizzleCaps->IsNative(inst->U.I.Opcode, newsrc) &&
 431                     c->SwizzleCaps->IsNative(inst->U.I.Opcode, inst->U.I.SrcReg[src]))
 432                         continue;
 433
 434                 inst->U.I.SrcReg[src] = newsrc;
 435         }
 436
 437         /* Simplify instructions based on constants */
 438         if (inst->U.I.Opcode == RC_OPCODE_MAD)
 439                 constant_folding_mad(inst);
 440
 441         /* note: MAD can simplify to MUL or ADD */
 442         if (inst->U.I.Opcode == RC_OPCODE_MUL)
 443                 constant_folding_mul(inst);
 444         else if (inst->U.I.Opcode == RC_OPCODE_ADD)
 445                 constant_folding_add(inst);
 446 }
 447
 448 void rc_optimize(struct radeon_compiler * c)
 449 {
 450         struct rc_instruction * inst = c->Program.Instructions.Next;
 451         while(inst != &c->Program.Instructions) {
 452                 struct rc_instruction * cur = inst;
 453                 inst = inst->Next;
 454
 455                 constant_folding(c, cur);
 456
 457                 if (cur->U.I.Opcode == RC_OPCODE_MOV) {
 458                         peephole(c, cur);
 459                         /* cur may no longer be part of the program */
 460                 }
 461         }
 462 }