src/mesa/drivers/dri/r300/compiler/radeon_optimize.c

   1 /*
   2  * Copyright (C) 2009 Nicolai Haehnle.
   3  *
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining
   7  * a copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sublicense, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial
  16  * portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  */
  27
  28 #include "radeon_dataflow.h"
  29
  30 #include "radeon_compiler.h"
  31 #include "radeon_swizzle.h"
  32
  33
  34 static struct rc_src_register chain_srcregs(struct rc_src_register outer, struct rc_src_register inner)
  35 {
  36         struct rc_src_register combine;
  37         combine.File = inner.File;
  38         combine.Index = inner.Index;
  39         combine.RelAddr = inner.RelAddr;
  40         if (outer.Abs) {
  41                 combine.Abs = 1;
  42                 combine.Negate = outer.Negate;
  43         } else {
  44                 combine.Abs = inner.Abs;
  45                 combine.Negate = 0;
  46                 for(unsigned int chan = 0; chan < 4; ++chan) {
  47                         unsigned int swz = GET_SWZ(outer.Swizzle, chan);
  48                         if (swz < 4)
  49                                 combine.Negate |= GET_BIT(inner.Negate, swz) << chan;
  50                 }
  51                 combine.Negate ^= outer.Negate;
  52         }
  53         combine.Swizzle = combine_swizzles(inner.Swizzle, outer.Swizzle);
  54         return combine;
  55 }
  56
  57 struct peephole_state {
  58         struct radeon_compiler * C;
  59         struct rc_instruction * Mov;
  60         unsigned int Conflict:1;
  61
  62         /** Whether Mov's source has been clobbered */
  63         unsigned int SourceClobbered:1;
  64
  65         /** Which components of Mov's destination register are still from that Mov? */
  66         unsigned int MovMask:4;
  67
  68         /** Which components of Mov's destination register are clearly *not* from that Mov */
  69         unsigned int DefinedMask:4;
  70
  71         /** Which components of Mov's source register are sourced */
  72         unsigned int SourcedMask:4;
  73
  74         /** Branch depth beyond Mov; negative value indicates we left the Mov's block */
  75         int BranchDepth;
  76 };
  77
  78 /**
  79  * This is a callback function that is meant to be passed to
  80  * rc_for_all_reads_mask.  This function will be called once for each source
  81  * register in inst.
  82  * @param inst The instruction that the source register belongs to.
  83  * @param file The register file of the source register.
  84  * @param index The index of the source register.
  85  * @param mask The components of the source register that are being read from.
  86  */
  87 static void peephole_scan_read(void * data, struct rc_instruction * inst,
  88                 rc_register_file file, unsigned int index, unsigned int mask)
  89 {
  90         struct peephole_state * s = data;
  91
  92         if (file != RC_FILE_TEMPORARY || index != s->Mov->U.I.DstReg.Index)
  93                 return;
  94
  95         /* These instructions cannot read from the constants file.
  96          * see radeonTransformTEX()
  97          */
  98         if(s->Mov->U.I.SrcReg[0].File != RC_FILE_TEMPORARY &&
  99                         s->Mov->U.I.SrcReg[0].File != RC_FILE_INPUT &&
 100                                 (inst->U.I.Opcode == RC_OPCODE_TEX ||
 101                                 inst->U.I.Opcode == RC_OPCODE_TXB ||
 102                                 inst->U.I.Opcode == RC_OPCODE_TXP ||
 103                                 inst->U.I.Opcode == RC_OPCODE_KIL)){
 104                 s->Conflict = 1;
 105                 return;
 106         }
 107         if ((mask & s->MovMask) == mask) {
 108                 if (s->SourceClobbered) {
 109                         s->Conflict = 1;
 110                 }
 111         } else if ((mask & s->DefinedMask) == mask) {
 112                 /* read from something entirely written by other instruction: this is okay */
 113         } else {
 114                 /* read from component combination that is not well-defined without
 115                  * the MOV: cannot remove it */
 116                 s->Conflict = 1;
 117         }
 118 }
 119
 120 static void peephole_scan_write(void * data, struct rc_instruction * inst,
 121                 rc_register_file file, unsigned int index, unsigned int mask)
 122 {
 123         struct peephole_state * s = data;
 124
 125         if (s->BranchDepth < 0)
 126                 return;
 127
 128         if (file == s->Mov->U.I.DstReg.File && index == s->Mov->U.I.DstReg.Index) {
 129                 s->MovMask &= ~mask;
 130                 if (s->BranchDepth == 0)
 131                         s->DefinedMask |= mask;
 132                 else
 133                         s->DefinedMask &= ~mask;
 134         }
 135         if (file == s->Mov->U.I.SrcReg[0].File && index == s->Mov->U.I.SrcReg[0].Index) {
 136                 if (mask & s->SourcedMask)
 137                         s->SourceClobbered = 1;
 138         } else if (s->Mov->U.I.SrcReg[0].RelAddr && file == RC_FILE_ADDRESS) {
 139                 s->SourceClobbered = 1;
 140         }
 141 }
 142
 143 static void peephole(struct radeon_compiler * c, struct rc_instruction * inst_mov)
 144 {
 145         struct peephole_state s;
 146
 147         if (inst_mov->U.I.DstReg.File != RC_FILE_TEMPORARY || inst_mov->U.I.WriteALUResult)
 148                 return;
 149
 150         memset(&s, 0, sizeof(s));
 151         s.C = c;
 152         s.Mov = inst_mov;
 153         s.MovMask = inst_mov->U.I.DstReg.WriteMask;
 154         s.DefinedMask = RC_MASK_XYZW & ~s.MovMask;
 155
 156         for(unsigned int chan = 0; chan < 4; ++chan) {
 157                 unsigned int swz = GET_SWZ(inst_mov->U.I.SrcReg[0].Swizzle, chan);
 158                 s.SourcedMask |= (1 << swz) & RC_MASK_XYZW;
 159         }
 160
 161         /* 1st pass: Check whether all subsequent readers can be changed */
 162         for(struct rc_instruction * inst = inst_mov->Next;
 163             inst != &c->Program.Instructions;
 164             inst = inst->Next) {
 165                 rc_for_all_reads_mask(inst, peephole_scan_read, &s);
 166                 rc_for_all_writes_mask(inst, peephole_scan_write, &s);
 167                 if (s.Conflict)
 168                         return;
 169
 170                 if (s.BranchDepth >= 0) {
 171                         if (inst->U.I.Opcode == RC_OPCODE_IF) {
 172                                 s.BranchDepth++;
 173                         } else if (inst->U.I.Opcode == RC_OPCODE_ENDIF
 174                                 || inst->U.I.Opcode == RC_OPCODE_ELSE) {
 175                                 s.BranchDepth--;
 176                                 if (s.BranchDepth < 0) {
 177                                         s.DefinedMask &= ~s.MovMask;
 178                                         s.MovMask = 0;
 179                                 }
 180                         }
 181                 }
 182         }
 183
 184         if (s.Conflict)
 185                 return;
 186
 187         /* 2nd pass: We can satisfy all readers, so switch them over all at once */
 188         s.MovMask = inst_mov->U.I.DstReg.WriteMask;
 189         s.BranchDepth = 0;
 190
 191         for(struct rc_instruction * inst = inst_mov->Next;
 192             inst != &c->Program.Instructions;
 193             inst = inst->Next) {
 194                 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode);
 195
 196                 for(unsigned int src = 0; src < opcode->NumSrcRegs; ++src) {
 197                         if (inst->U.I.SrcReg[src].File == RC_FILE_TEMPORARY &&
 198                             inst->U.I.SrcReg[src].Index == s.Mov->U.I.DstReg.Index) {
 199                                 unsigned int refmask = 0;
 200
 201                                 for(unsigned int chan = 0; chan < 4; ++chan) {
 202                                         unsigned int swz = GET_SWZ(inst->U.I.SrcReg[src].Swizzle, chan);
 203                                         refmask |= (1 << swz) & RC_MASK_XYZW;
 204                                 }
 205
 206                                 if ((refmask & s.MovMask) == refmask)
 207                                         inst->U.I.SrcReg[src] = chain_srcregs(inst->U.I.SrcReg[src], s.Mov->U.I.SrcReg[0]);
 208                         }
 209                 }
 210
 211                 if (opcode->HasDstReg) {
 212                         if (inst->U.I.DstReg.File == RC_FILE_TEMPORARY &&
 213                             inst->U.I.DstReg.Index == s.Mov->U.I.DstReg.Index) {
 214                                 s.MovMask &= ~inst->U.I.DstReg.WriteMask;
 215                         }
 216                 }
 217
 218                 if (s.BranchDepth >= 0) {
 219                         if (inst->U.I.Opcode == RC_OPCODE_IF) {
 220                                 s.BranchDepth++;
 221                         } else if (inst->U.I.Opcode == RC_OPCODE_ENDIF
 222                                 || inst->U.I.Opcode == RC_OPCODE_ELSE) {
 223                                 s.BranchDepth--;
 224                                 if (s.BranchDepth < 0)
 225                                         break; /* no more readers after this point */
 226                         }
 227                 }
 228         }
 229
 230         /* Finally, remove the original MOV instruction */
 231         rc_remove_instruction(inst_mov);
 232 }
 233
 234 /**
 235  * Check if a source register is actually always the same
 236  * swizzle constant.
 237  */
 238 static int is_src_uniform_constant(struct rc_src_register src,
 239                 rc_swizzle * pswz, unsigned int * pnegate)
 240 {
 241         int have_used = 0;
 242
 243         if (src.File != RC_FILE_NONE) {
 244                 *pswz = 0;
 245                 return 0;
 246         }
 247
 248         for(unsigned int chan = 0; chan < 4; ++chan) {
 249                 unsigned int swz = GET_SWZ(src.Swizzle, chan);
 250                 if (swz < 4) {
 251                         *pswz = 0;
 252                         return 0;
 253                 }
 254                 if (swz == RC_SWIZZLE_UNUSED)
 255                         continue;
 256
 257                 if (!have_used) {
 258                         *pswz = swz;
 259                         *pnegate = GET_BIT(src.Negate, chan);
 260                         have_used = 1;
 261                 } else {
 262                         if (swz != *pswz || *pnegate != GET_BIT(src.Negate, chan)) {
 263                                 *pswz = 0;
 264                                 return 0;
 265                         }
 266                 }
 267         }
 268
 269         return 1;
 270 }
 271
 272
 273 static void constant_folding_mad(struct rc_instruction * inst)
 274 {
 275         rc_swizzle swz;
 276         unsigned int negate;
 277
 278         if (is_src_uniform_constant(inst->U.I.SrcReg[2], &swz, &negate)) {
 279                 if (swz == RC_SWIZZLE_ZERO) {
 280                         inst->U.I.Opcode = RC_OPCODE_MUL;
 281                         return;
 282                 }
 283         }
 284
 285         if (is_src_uniform_constant(inst->U.I.SrcReg[1], &swz, &negate)) {
 286                 if (swz == RC_SWIZZLE_ONE) {
 287                         inst->U.I.Opcode = RC_OPCODE_ADD;
 288                         if (negate)
 289                                 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW;
 290                         inst->U.I.SrcReg[1] = inst->U.I.SrcReg[2];
 291                         return;
 292                 } else if (swz == RC_SWIZZLE_ZERO) {
 293                         inst->U.I.Opcode = RC_OPCODE_MOV;
 294                         inst->U.I.SrcReg[0] = inst->U.I.SrcReg[2];
 295                         return;
 296                 }
 297         }
 298
 299         if (is_src_uniform_constant(inst->U.I.SrcReg[0], &swz, &negate)) {
 300                 if (swz == RC_SWIZZLE_ONE) {
 301                         inst->U.I.Opcode = RC_OPCODE_ADD;
 302                         if (negate)
 303                                 inst->U.I.SrcReg[1].Negate ^= RC_MASK_XYZW;
 304                         inst->U.I.SrcReg[0] = inst->U.I.SrcReg[2];
 305                         return;
 306                 } else if (swz == RC_SWIZZLE_ZERO) {
 307                         inst->U.I.Opcode = RC_OPCODE_MOV;
 308                         inst->U.I.SrcReg[0] = inst->U.I.SrcReg[2];
 309                         return;
 310                 }
 311         }
 312 }
 313
 314 static void constant_folding_mul(struct rc_instruction * inst)
 315 {
 316         rc_swizzle swz;
 317         unsigned int negate;
 318
 319         if (is_src_uniform_constant(inst->U.I.SrcReg[0], &swz, &negate)) {
 320                 if (swz == RC_SWIZZLE_ONE) {
 321                         inst->U.I.Opcode = RC_OPCODE_MOV;
 322                         inst->U.I.SrcReg[0] = inst->U.I.SrcReg[1];
 323                         if (negate)
 324                                 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW;
 325                         return;
 326                 } else if (swz == RC_SWIZZLE_ZERO) {
 327                         inst->U.I.Opcode = RC_OPCODE_MOV;
 328                         inst->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_0000;
 329                         return;
 330                 }
 331         }
 332
 333         if (is_src_uniform_constant(inst->U.I.SrcReg[1], &swz, &negate)) {
 334                 if (swz == RC_SWIZZLE_ONE) {
 335                         inst->U.I.Opcode = RC_OPCODE_MOV;
 336                         if (negate)
 337                                 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW;
 338                         return;
 339                 } else if (swz == RC_SWIZZLE_ZERO) {
 340                         inst->U.I.Opcode = RC_OPCODE_MOV;
 341                         inst->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_0000;
 342                         return;
 343                 }
 344         }
 345 }
 346
 347 static void constant_folding_add(struct rc_instruction * inst)
 348 {
 349         rc_swizzle swz;
 350         unsigned int negate;
 351
 352         if (is_src_uniform_constant(inst->U.I.SrcReg[0], &swz, &negate)) {
 353                 if (swz == RC_SWIZZLE_ZERO) {
 354                         inst->U.I.Opcode = RC_OPCODE_MOV;
 355                         inst->U.I.SrcReg[0] = inst->U.I.SrcReg[1];
 356                         return;
 357                 }
 358         }
 359
 360         if (is_src_uniform_constant(inst->U.I.SrcReg[1], &swz, &negate)) {
 361                 if (swz == RC_SWIZZLE_ZERO) {
 362                         inst->U.I.Opcode = RC_OPCODE_MOV;
 363                         return;
 364                 }
 365         }
 366 }
 367
 368
 369 /**
 370  * Replace 0.0, 1.0 and 0.5 immediate constants by their
 371  * respective swizzles. Simplify instructions like ADD dst, src, 0;
 372  */
 373 static void constant_folding(struct radeon_compiler * c, struct rc_instruction * inst)
 374 {
 375         const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode);
 376
 377         /* Replace 0.0, 1.0 and 0.5 immediates by their explicit swizzles */
 378         for(unsigned int src = 0; src < opcode->NumSrcRegs; ++src) {
 379                 if (inst->U.I.SrcReg[src].File != RC_FILE_CONSTANT ||
 380                     inst->U.I.SrcReg[src].RelAddr ||
 381                     inst->U.I.SrcReg[src].Index >= c->Program.Constants.Count)
 382                         continue;
 383
 384                 struct rc_constant * constant =
 385                         &c->Program.Constants.Constants[inst->U.I.SrcReg[src].Index];
 386
 387                 if (constant->Type != RC_CONSTANT_IMMEDIATE)
 388                         continue;
 389
 390                 struct rc_src_register newsrc = inst->U.I.SrcReg[src];
 391                 int have_real_reference = 0;
 392                 for(unsigned int chan = 0; chan < 4; ++chan) {
 393                         unsigned int swz = GET_SWZ(newsrc.Swizzle, chan);
 394                         if (swz >= 4)
 395                                 continue;
 396
 397                         unsigned int newswz;
 398                         float imm = constant->u.Immediate[swz];
 399                         float baseimm = imm;
 400                         if (imm < 0.0)
 401                                 baseimm = -baseimm;
 402
 403                         if (baseimm == 0.0) {
 404                                 newswz = RC_SWIZZLE_ZERO;
 405                         } else if (baseimm == 1.0) {
 406                                 newswz = RC_SWIZZLE_ONE;
 407                         } else if (baseimm == 0.5) {
 408                                 newswz = RC_SWIZZLE_HALF;
 409                         } else {
 410                                 have_real_reference = 1;
 411                                 continue;
 412                         }
 413
 414                         SET_SWZ(newsrc.Swizzle, chan, newswz);
 415                         if (imm < 0.0 && !newsrc.Abs)
 416                                 newsrc.Negate ^= 1 << chan;
 417                 }
 418
 419                 if (!have_real_reference) {
 420                         newsrc.File = RC_FILE_NONE;
 421                         newsrc.Index = 0;
 422                 }
 423
 424                 /* don't make the swizzle worse */
 425                 if (!c->SwizzleCaps->IsNative(inst->U.I.Opcode, newsrc) &&
 426                     c->SwizzleCaps->IsNative(inst->U.I.Opcode, inst->U.I.SrcReg[src]))
 427                         continue;
 428
 429                 inst->U.I.SrcReg[src] = newsrc;
 430         }
 431
 432         /* Simplify instructions based on constants */
 433         if (inst->U.I.Opcode == RC_OPCODE_MAD)
 434                 constant_folding_mad(inst);
 435
 436         /* note: MAD can simplify to MUL or ADD */
 437         if (inst->U.I.Opcode == RC_OPCODE_MUL)
 438                 constant_folding_mul(inst);
 439         else if (inst->U.I.Opcode == RC_OPCODE_ADD)
 440                 constant_folding_add(inst);
 441 }
 442
 443 void rc_optimize(struct radeon_compiler * c)
 444 {
 445         struct rc_instruction * inst = c->Program.Instructions.Next;
 446         while(inst != &c->Program.Instructions) {
 447                 struct rc_instruction * cur = inst;
 448                 inst = inst->Next;
 449
 450                 constant_folding(c, cur);
 451
 452                 if (cur->U.I.Opcode == RC_OPCODE_MOV) {
 453                         peephole(c, cur);
 454                         /* cur may no longer be part of the program */
 455                 }
 456         }
 457 }