src/mesa/drivers/dri/r300/r300_context.c

   1 /*
   2 Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
   3
   4 The Weather Channel (TM) funded Tungsten Graphics to develop the
   5 initial release of the Radeon 8500 driver under the XFree86 license.
   6 This notice must be preserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /**
  31  * \file
  32  *
  33  * \author Keith Whitwell <keith@tungstengraphics.com>
  34  *
  35  * \author Nicolai Haehnle <prefect_@gmx.net>
  36  */
  37
  38 #include "main/glheader.h"
  39 #include "main/api_arrayelt.h"
  40 #include "main/context.h"
  41 #include "main/simple_list.h"
  42 #include "main/imports.h"
  43 #include "main/matrix.h"
  44 #include "main/extensions.h"
  45 #include "main/state.h"
  46 #include "main/bufferobj.h"
  47 #include "main/texobj.h"
  48
  49 #include "swrast/swrast.h"
  50 #include "swrast_setup/swrast_setup.h"
  51 #include "vbo/vbo.h"
  52
  53 #include "tnl/tnl.h"
  54 #include "tnl/t_pipeline.h"
  55 #include "tnl/t_vp_build.h"
  56
  57 #include "drivers/common/driverfuncs.h"
  58
  59 #include "r300_context.h"
  60 #include "radeon_context.h"
  61 #include "radeon_span.h"
  62 #include "r300_cmdbuf.h"
  63 #include "r300_state.h"
  64 #include "r300_ioctl.h"
  65 #include "r300_tex.h"
  66 #include "r300_emit.h"
  67 #include "r300_swtcl.h"
  68 #include "radeon_bocs_wrapper.h"
  69
  70
  71 #include "vblank.h"
  72 #include "utils.h"
  73 #include "xmlpool.h"            /* for symbolic values of enum-type options */
  74
  75 /* hw_tcl_on derives from future_hw_tcl_on when its safe to change it. */
  76 int future_hw_tcl_on = 1;
  77 int hw_tcl_on = 1;
  78
  79 #define need_GL_VERSION_2_0
  80 #define need_GL_ARB_point_parameters
  81 #define need_GL_ARB_vertex_program
  82 #define need_GL_EXT_blend_equation_separate
  83 #define need_GL_EXT_blend_func_separate
  84 #define need_GL_EXT_blend_minmax
  85 #define need_GL_EXT_framebuffer_object
  86 #define need_GL_EXT_fog_coord
  87 #define need_GL_EXT_gpu_program_parameters
  88 #define need_GL_EXT_secondary_color
  89 #define need_GL_EXT_stencil_two_side
  90 #define need_GL_ATI_separate_stencil
  91 #define need_GL_NV_vertex_program
  92
  93 #include "extension_helper.h"
  94
  95
  96 const struct dri_extension card_extensions[] = {
  97   /* *INDENT-OFF* */
  98   {"GL_ARB_depth_texture",              NULL},
  99   {"GL_ARB_fragment_program",           NULL},
 100   {"GL_ARB_multitexture",               NULL},
 101   {"GL_ARB_point_parameters",           GL_ARB_point_parameters_functions},
 102   {"GL_ARB_shadow",                     NULL},
 103   {"GL_ARB_shadow_ambient",             NULL},
 104   {"GL_ARB_texture_border_clamp",       NULL},
 105   {"GL_ARB_texture_cube_map",           NULL},
 106   {"GL_ARB_texture_env_add",            NULL},
 107   {"GL_ARB_texture_env_combine",        NULL},
 108   {"GL_ARB_texture_env_crossbar",       NULL},
 109   {"GL_ARB_texture_env_dot3",           NULL},
 110   {"GL_ARB_texture_mirrored_repeat",    NULL},
 111   {"GL_ARB_vertex_program",             GL_ARB_vertex_program_functions},
 112   {"GL_EXT_blend_equation_separate",    GL_EXT_blend_equation_separate_functions},
 113   {"GL_EXT_blend_func_separate",        GL_EXT_blend_func_separate_functions},
 114   {"GL_EXT_blend_minmax",               GL_EXT_blend_minmax_functions},
 115   {"GL_EXT_blend_subtract",             NULL},
 116   {"GL_EXT_packed_depth_stencil",       NULL},
 117   {"GL_EXT_fog_coord",                  GL_EXT_fog_coord_functions },
 118   {"GL_EXT_gpu_program_parameters",     GL_EXT_gpu_program_parameters_functions},
 119   {"GL_EXT_secondary_color",            GL_EXT_secondary_color_functions},
 120   {"GL_EXT_shadow_funcs",               NULL},
 121   {"GL_EXT_stencil_two_side",           GL_EXT_stencil_two_side_functions},
 122   {"GL_EXT_stencil_wrap",               NULL},
 123   {"GL_EXT_texture_edge_clamp",         NULL},
 124   {"GL_EXT_texture_env_combine",        NULL},
 125   {"GL_EXT_texture_env_dot3",           NULL},
 126   {"GL_EXT_texture_filter_anisotropic", NULL},
 127   {"GL_EXT_texture_lod_bias",           NULL},
 128   {"GL_EXT_texture_mirror_clamp",       NULL},
 129   {"GL_EXT_texture_rectangle",          NULL},
 130   {"GL_ATI_separate_stencil",           GL_ATI_separate_stencil_functions},
 131   {"GL_ATI_texture_env_combine3",       NULL},
 132   {"GL_ATI_texture_mirror_once",        NULL},
 133   {"GL_MESA_pack_invert",               NULL},
 134   {"GL_MESA_ycbcr_texture",             NULL},
 135   {"GL_MESAX_texture_float",            NULL},
 136   {"GL_NV_blend_square",                NULL},
 137   {"GL_NV_vertex_program",              GL_NV_vertex_program_functions},
 138   {"GL_SGIS_generate_mipmap",           NULL},
 139   {NULL,                                NULL}
 140   /* *INDENT-ON* */
 141 };
 142
 143
 144 const struct dri_extension mm_extensions[] = {
 145   { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
 146   { NULL, NULL }
 147 };
 148
 149 /**
 150  * The GL 2.0 functions are needed to make display lists work with
 151  * functions added by GL_ATI_separate_stencil.
 152  */
 153 const struct dri_extension gl_20_extension[] = {
 154   {"GL_VERSION_2_0",                    GL_VERSION_2_0_functions },
 155 };
 156
 157
 158 extern struct tnl_pipeline_stage _r300_render_stage;
 159 extern const struct tnl_pipeline_stage _r300_tcl_stage;
 160
 161 static const struct tnl_pipeline_stage *r300_pipeline[] = {
 162
 163         /* Try and go straight to t&l
 164          */
 165         &_r300_tcl_stage,
 166
 167         /* Catch any t&l fallbacks
 168          */
 169         &_tnl_vertex_transform_stage,
 170         &_tnl_normal_transform_stage,
 171         &_tnl_lighting_stage,
 172         &_tnl_fog_coordinate_stage,
 173         &_tnl_texgen_stage,
 174         &_tnl_texture_transform_stage,
 175         &_tnl_point_attenuation_stage,
 176         &_tnl_vertex_program_stage,
 177
 178         /* Try again to go to tcl?
 179          *     - no good for asymmetric-twoside (do with multipass)
 180          *     - no good for asymmetric-unfilled (do with multipass)
 181          *     - good for material
 182          *     - good for texgen
 183          *     - need to manipulate a bit of state
 184          *
 185          * - worth it/not worth it?
 186          */
 187
 188         /* Else do them here.
 189          */
 190         &_r300_render_stage,
 191         &_tnl_render_stage,     /* FALLBACK  */
 192         0,
 193 };
 194
 195 static void r300_get_lock(radeonContextPtr rmesa)
 196 {
 197         drm_radeon_sarea_t *sarea = rmesa->sarea;
 198
 199         if (sarea->ctx_owner != rmesa->dri.hwContext) {
 200                 sarea->ctx_owner = rmesa->dri.hwContext;
 201                 if (!rmesa->radeonScreen->kernel_mm)
 202                         radeon_bo_legacy_texture_age(rmesa->radeonScreen->bom);
 203         }
 204 }
 205
 206 static void r300_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
 207 {
 208     /* please flush pipe do all pending work */
 209     radeon_cs_write_dword(cs, cmdpacket0(rmesa->radeonScreen,
 210                                   R300_SC_SCREENDOOR, 1));
 211     radeon_cs_write_dword(cs, 0x0);
 212     radeon_cs_write_dword(cs, cmdpacket0(rmesa->radeonScreen,
 213                                   R300_SC_SCREENDOOR, 1));
 214     radeon_cs_write_dword(cs, 0x00FFFFFF);
 215     radeon_cs_write_dword(cs, cmdpacket0(rmesa->radeonScreen,
 216                                   R300_SC_HYPERZ, 1));
 217     radeon_cs_write_dword(cs, 0x0);
 218     radeon_cs_write_dword(cs, cmdpacket0(rmesa->radeonScreen,
 219                                   R300_US_CONFIG, 1));
 220     radeon_cs_write_dword(cs, 0x0);
 221     radeon_cs_write_dword(cs, cmdpacket0(rmesa->radeonScreen,
 222                                   R300_ZB_CNTL, 1));
 223     radeon_cs_write_dword(cs, 0x0);
 224     radeon_cs_write_dword(cs, cmdwait(rmesa->radeonScreen, R300_WAIT_3D));
 225     radeon_cs_write_dword(cs, cmdpacket0(rmesa->radeonScreen,
 226                                   R300_RB3D_DSTCACHE_CTLSTAT, 1));
 227     radeon_cs_write_dword(cs, R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D);
 228     radeon_cs_write_dword(cs, cmdpacket0(rmesa->radeonScreen,
 229                                   R300_ZB_ZCACHE_CTLSTAT, 1));
 230     radeon_cs_write_dword(cs, R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE);
 231     radeon_cs_write_dword(cs, cmdwait(rmesa->radeonScreen,
 232                                R300_WAIT_3D | R300_WAIT_3D_CLEAN));
 233 }
 234
 235 static void r300_vtbl_pre_emit_atoms(radeonContextPtr radeon)
 236 {
 237         r300ContextPtr r300 = (r300ContextPtr)radeon;
 238         BATCH_LOCALS(radeon);
 239
 240         r300->vap_flush_needed = GL_TRUE;
 241
 242         cp_wait(radeon, R300_WAIT_3D | R300_WAIT_3D_CLEAN);
 243         BEGIN_BATCH_NO_AUTOSTATE(2);
 244         OUT_BATCH_REGVAL(R300_TX_INVALTAGS, R300_TX_FLUSH);
 245         END_BATCH();
 246         end_3d(radeon);
 247 }
 248
 249 static void r300_fallback(GLcontext *ctx, GLuint bit, GLboolean mode)
 250 {
 251         r300ContextPtr r300 = R300_CONTEXT(ctx);
 252         if (mode)
 253                 r300->radeon.Fallback |= bit;
 254         else
 255                 r300->radeon.Fallback &= ~bit;
 256 }
 257
 258 static void r300_init_vtbl(radeonContextPtr radeon)
 259 {
 260         radeon->vtbl.get_lock = r300_get_lock;
 261         radeon->vtbl.update_viewport_offset = r300UpdateViewportOffset;
 262         radeon->vtbl.emit_cs_header = r300_vtbl_emit_cs_header;
 263         radeon->vtbl.swtcl_flush = r300_swtcl_flush;
 264         radeon->vtbl.pre_emit_atoms = r300_vtbl_pre_emit_atoms;
 265         radeon->vtbl.fallback = r300_fallback;
 266 }
 267
 268 static void r300InitConstValues(GLcontext *ctx, radeonScreenPtr screen)
 269 {
 270         r300ContextPtr r300 = R300_CONTEXT(ctx);
 271
 272         ctx->Const.MaxTextureImageUnits =
 273             driQueryOptioni(&r300->radeon.optionCache, "texture_image_units");
 274         ctx->Const.MaxTextureCoordUnits =
 275             driQueryOptioni(&r300->radeon.optionCache, "texture_coord_units");
 276         ctx->Const.MaxTextureUnits = MIN2(ctx->Const.MaxTextureImageUnits,
 277                  ctx->Const.MaxTextureCoordUnits);
 278         ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 279         ctx->Const.MaxTextureLodBias = 16.0;
 280
 281         if (screen->chip_family >= CHIP_FAMILY_RV515)
 282                 ctx->Const.MaxTextureLevels = 13;
 283         else
 284                 ctx->Const.MaxTextureLevels = 12;
 285
 286         ctx->Const.MinPointSize = 1.0;
 287         ctx->Const.MinPointSizeAA = 1.0;
 288         ctx->Const.MaxPointSize = R300_POINTSIZE_MAX;
 289         ctx->Const.MaxPointSizeAA = R300_POINTSIZE_MAX;
 290
 291         ctx->Const.MinLineWidth = 1.0;
 292         ctx->Const.MinLineWidthAA = 1.0;
 293         ctx->Const.MaxLineWidth = R300_LINESIZE_MAX;
 294         ctx->Const.MaxLineWidthAA = R300_LINESIZE_MAX;
 295
 296         ctx->Const.MaxDrawBuffers = 1;
 297
 298         /* currently bogus data */
 299         if (screen->chip_flags & RADEON_CHIPSET_TCL) {
 300                 ctx->Const.VertexProgram.MaxInstructions = VSF_MAX_FRAGMENT_LENGTH / 4;
 301                 ctx->Const.VertexProgram.MaxNativeInstructions =
 302                   VSF_MAX_FRAGMENT_LENGTH / 4;
 303                 ctx->Const.VertexProgram.MaxNativeAttribs = 16; /* r420 */
 304                 ctx->Const.VertexProgram.MaxTemps = 32;
 305                 ctx->Const.VertexProgram.MaxNativeTemps =
 306                   /*VSF_MAX_FRAGMENT_TEMPS */ 32;
 307                 ctx->Const.VertexProgram.MaxNativeParameters = 256;     /* r420 */
 308                 ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
 309         }
 310
 311         if (screen->chip_family >= CHIP_FAMILY_RV515) {
 312                 ctx->Const.FragmentProgram.MaxNativeTemps = R500_PFS_NUM_TEMP_REGS;
 313                 ctx->Const.FragmentProgram.MaxNativeAttribs = 11;       /* copy i915... */
 314                 ctx->Const.FragmentProgram.MaxNativeParameters = R500_PFS_NUM_CONST_REGS;
 315                 ctx->Const.FragmentProgram.MaxNativeAluInstructions = R500_PFS_MAX_INST;
 316                 ctx->Const.FragmentProgram.MaxNativeTexInstructions = R500_PFS_MAX_INST;
 317                 ctx->Const.FragmentProgram.MaxNativeInstructions = R500_PFS_MAX_INST;
 318                 ctx->Const.FragmentProgram.MaxNativeTexIndirections = R500_PFS_MAX_INST;
 319                 ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0;
 320         } else {
 321                 ctx->Const.FragmentProgram.MaxNativeTemps = R300_PFS_NUM_TEMP_REGS;
 322                 ctx->Const.FragmentProgram.MaxNativeAttribs = 11;       /* copy i915... */
 323                 ctx->Const.FragmentProgram.MaxNativeParameters = R300_PFS_NUM_CONST_REGS;
 324                 ctx->Const.FragmentProgram.MaxNativeAluInstructions = R300_PFS_MAX_ALU_INST;
 325                 ctx->Const.FragmentProgram.MaxNativeTexInstructions = R300_PFS_MAX_TEX_INST;
 326                 ctx->Const.FragmentProgram.MaxNativeInstructions = R300_PFS_MAX_ALU_INST + R300_PFS_MAX_TEX_INST;
 327                 ctx->Const.FragmentProgram.MaxNativeTexIndirections = R300_PFS_MAX_TEX_INDIRECT;
 328                 ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0;
 329         }
 330 }
 331
 332 /* Create the device specific rendering context.
 333  */
 334 GLboolean r300CreateContext(const __GLcontextModes * glVisual,
 335                             __DRIcontextPrivate * driContextPriv,
 336                             void *sharedContextPrivate)
 337 {
 338         __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
 339         radeonScreenPtr screen = (radeonScreenPtr) (sPriv->private);
 340         struct dd_function_table functions;
 341         r300ContextPtr r300;
 342         GLcontext *ctx;
 343         int tcl_mode;
 344
 345         assert(glVisual);
 346         assert(driContextPriv);
 347         assert(screen);
 348
 349         r300 = (r300ContextPtr) CALLOC(sizeof(*r300));
 350         if (!r300)
 351                 return GL_FALSE;
 352
 353         if (!(screen->chip_flags & RADEON_CHIPSET_TCL))
 354                 hw_tcl_on = future_hw_tcl_on = 0;
 355
 356         driParseConfigFiles(&r300->radeon.optionCache, &screen->optionCache,
 357                             screen->driScreen->myNum, "r300");
 358
 359         r300_init_vtbl(&r300->radeon);
 360
 361         _mesa_init_driver_functions(&functions);
 362         r300InitIoctlFuncs(&functions);
 363         r300InitStateFuncs(&functions);
 364         r300InitTextureFuncs(&functions);
 365         r300InitShaderFuncs(&functions);
 366
 367         if (!radeonInitContext(&r300->radeon, &functions,
 368                                glVisual, driContextPriv,
 369                                sharedContextPrivate)) {
 370                 FREE(r300);
 371                 return GL_FALSE;
 372         }
 373
 374         ctx = r300->radeon.glCtx;
 375         r300InitConstValues(ctx, screen);
 376
 377         if (hw_tcl_on)
 378                 ctx->VertexProgram._MaintainTnlProgram = GL_TRUE;
 379
 380         ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE;
 381
 382         /* Initialize the software rasterizer and helper modules.
 383          */
 384         _swrast_CreateContext(ctx);
 385         _vbo_CreateContext(ctx);
 386         _tnl_CreateContext(ctx);
 387         _swsetup_CreateContext(ctx);
 388         _swsetup_Wakeup(ctx);
 389
 390         /* Install the customized pipeline:
 391          */
 392         _tnl_destroy_pipeline(ctx);
 393         _tnl_install_pipeline(ctx, r300_pipeline);
 394         TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
 395
 396         /* Configure swrast and TNL to match hardware characteristics:
 397          */
 398         _swrast_allow_pixel_fog(ctx, GL_FALSE);
 399         _swrast_allow_vertex_fog(ctx, GL_TRUE);
 400         _tnl_allow_pixel_fog(ctx, GL_FALSE);
 401         _tnl_allow_vertex_fog(ctx, GL_TRUE);
 402
 403         radeon_fbo_init(&r300->radeon);
 404         radeonInitSpanFuncs( ctx );
 405         r300InitCmdBuf(r300);
 406         r300InitState(r300);
 407         r300InitShaderFunctions(r300);
 408         if (!(screen->chip_flags & RADEON_CHIPSET_TCL))
 409                 r300InitSwtcl(ctx);
 410
 411         driInitExtensions(ctx, card_extensions, GL_TRUE);
 412         if (r300->radeon.radeonScreen->kernel_mm)
 413           driInitExtensions(ctx, mm_extensions, GL_FALSE);
 414
 415         if (screen->chip_family == CHIP_FAMILY_RS600 || screen->chip_family == CHIP_FAMILY_RS690 ||
 416                 screen->chip_family == CHIP_FAMILY_RS740) {
 417                 r300->radeon.texture_row_align = 64;
 418         }
 419
 420         r300->radeon.initialMaxAnisotropy = driQueryOptionf(&r300->radeon.optionCache,
 421                                                      "def_max_anisotropy");
 422
 423         if (driQueryOptionb(&r300->radeon.optionCache, "disable_stencil_two_side"))
 424                 _mesa_disable_extension(ctx, "GL_EXT_stencil_two_side");
 425
 426         if (ctx->Mesa_DXTn && !driQueryOptionb(&r300->radeon.optionCache, "disable_s3tc")) {
 427                 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
 428                 _mesa_enable_extension(ctx, "GL_S3_s3tc");
 429         } else if (driQueryOptionb(&r300->radeon.optionCache, "force_s3tc_enable")) {
 430                 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
 431         }
 432
 433         r300->disable_lowimpact_fallback =
 434                  driQueryOptionb(&r300->radeon.optionCache, "disable_lowimpact_fallback");
 435
 436         tcl_mode = driQueryOptioni(&r300->radeon.optionCache, "tcl_mode");
 437         if (driQueryOptionb(&r300->radeon.optionCache, "no_rast")) {
 438                 fprintf(stderr, "disabling 3D acceleration\n");
 439 #if R200_MERGED
 440                 FALLBACK(&r300->radeon, RADEON_FALLBACK_DISABLE, 1);
 441 #endif
 442         }
 443         if (tcl_mode == DRI_CONF_TCL_SW ||
 444             !(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
 445                 if (r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
 446                         r300->radeon.radeonScreen->chip_flags &=
 447                             ~RADEON_CHIPSET_TCL;
 448                         fprintf(stderr, "Disabling HW TCL support\n");
 449                 }
 450                 TCL_FALLBACK(r300->radeon.glCtx,
 451                              RADEON_TCL_FALLBACK_TCL_DISABLE, 1);
 452         }
 453
 454         return GL_TRUE;
 455 }
 456